ATF15xx-DK3
CPLD Development/Programmer Kit
USER GUIDE
Introduction
The Atmel® ATF15xx-DK3 Complex Programmable Logic Device (CPLD) Development/Programmer Kit is a
complete development system and an In-System Programming (ISP) programmer for the Atmel ATF15xx
Family of industry standard pin compatible CPLDs with Logic Doubling® features. This kit provides designers a
very quick and easy way to develop prototypes and evaluate new designs with an ATF15xx ISP CPLD. The
ATF15xx Family of ISP CPLDs includes the Atmel ATF15xxAS, ATF15xxASL, ATF15xxASV, and
ATF15xxASVL CPLDs. With the availability of the different socket adapter boards to support most of the
package types(1) offered in the ATF15xx Family of ISP CPLDs, this kit can be used as an ISP programmer to
program the ATF15xx ISP CPLDs in most of the available package types(1) through the industry standard JTAG
interface (IEEE 1149.1).
Kit Contents
Atmel CPLD Development/Programmer Board (P/N: ATF15xx-DK3)
Atmel 44-pin TQFP Socket Adapter Board (P/N: ATF15xx-DK3-SAA44)(2)
Atmel ATF15xx LPT-based JTAG ISP Download Cable (P/N: ATDH1150VPC)
Two Atmel 44-pin TQFP Sample Devices
Device Support
The ATF15xx-DK3 CPLD Development/Programmer Kit supports the following devices in all currently available
Atmel speed grades and packages (except the 100-PQFP):
ATF1502AS/ASL
ATF1504AS/ASL
ATF1508ASV/ASVL
1.
2.
ATF1502ASV
ATF1504ASV/ASVL
ATF1508AS/ASL
The socket adapter board is not offered for the 100-pin PQFP.
Only the 44-pin TQFP Socket Adapter Board is included in this kit. Other socket adapter boards are sold separately. See
Section, “Hardware Description” for more information on socket adapter board ordering codes.
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T a b l e o f C o n ten ts
Kit Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
CPLD Development/Programmer Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logic Doubling CPLDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ATF15xx ISP Download Cable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PLD Development Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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System Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Ordering Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Hardware Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
CPLD Development/Programmer Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
7-segment Displays with Selectable Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
LEDs with Selectable Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Push-button Switches with Selectable Jumpers for I/O Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Push-button Switches with Selectable Jumpers for GCLR and OE1 Pins . . . . . . . . . . . . . . . . . . . . . 9
2MHz Oscillator and Clock Selection Jumper . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
VCCIO and VCCINT Voltage Selection Jumpers and LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
ICCIO and ICCINT Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Voltage Regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Power Supply Switch and Power LED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Power Supply Jack and Power Supply Header . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
JTAG ISP Connector and TDO Selection Jumper . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Socket Adapter Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Atmel ATF15xx ISP Download Cable. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Schematic Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
References and Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Atmel ProChip Designer Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Atmel WinCUPL Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Atmel ATMISP Software. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Atmel POF2JED Conversion Software. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Technical Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
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ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]
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Kit Features
CPLD Development/Programmer Board
10-pin JTAG-ISP Port
Regulated Power Supply Circuits for 9VDC Power Source
Selectable 5V, 3.3V, 2.5V, or 1.8V I/O Voltage Supply
Selectable 1.8V, 3.3V, or 5.0V Core Voltage Supply
44-pin TQFP Socket Adapter Board
Headers for I/O Pins of the ATF15xx Device
2MHz Crystal Oscillator
Four 7-segment LED Displays
Eight Individual LEDs
Eight Push-button Switches
Global Clear and Output Enable Push-button Switches
Current Measurement Jumpers
Logic Doubling CPLDs
ATF15xx ISP CPLD with Logic Doubling Architecture
ATF15xx ISP Download Cable
5V, 3.3V, 2.5V, or 1.8V ISP Download Cable for PC Parallel Printer (LPT) Port
PLD Development Software
The Atmel PLD development software tools are available online for PLD designer’s use of the ATF15xx
ISP CPLDs. Please reference the Overview document, “PLD Design Software Overview” available at:
http://www.atmel.com/images/atmel-3629-pld-design-software-overview.pdf
System Requirements
The minimum hardware and software required to program an ATF15xx ISP CPLD device which is
designed using the Atmel ProChip Designer Software on the CPLD Development/Programmer Board
through the Atmel ATMISP v6.x (ATF15xx CPLD ISP Software) are:
x86 Microprocessor-based Computer
Windows XP®, Windows® 98, Windows NT® 4.0, or Windows 2000
128-MByte RAM
500-MByte Free Hard Disk Space
Windows-supported Mouse
Available Parallel Printer (LPT) Port
9VDC Power Supply with 500mA of Supply Current
SVGA Monitor (800 x 600 Resolution)
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Ordering Information
Atmel Part Number
Description
ATF15xx-DK3
CPLD Development/Programmer Kit (includes the ATF15xxDK3-SAA44*)
ATF15xxDK3-SAA100
100-pin TQFP Socket Adapter Board for DK3 Board
ATF15xxDK3-SAJ44
44-pin PLCC Socket Adapter Board for DK3 Board
ATF15xxDK3-SAJ84
84-pin PLCC Socket Adapter Board for DK3 Board
ATF15xxDK3-SAA44*
44-pin TQFP Socket Adapter Board for DK3 Board
Hardware Description
CPLD Development/Programmer Board
The CPLD Development/Programmer and Socket Adapter Boards shown in the below figure contain
features that are useful for developing, prototyping, or evaluating ATF15xx CPLD designs. Features
that make this a very versatile starter/development kit and an ISP programmer for the ATF15xx family
of JTAG-ISP CPLDs include:
Push-button Switches
LEDs
7-segment Displays
2MHz Crystal Oscillator
Figure 1.
5V, 3.3V, 2.5V, or 1.8V VCCIO Selector
1.8V, 3.3V, or 5.0V VCCINT Selector
JTAG ISP Port
Socket Adapters
CPLD Development/Programmer Kit with 44-pin TQFP Socket Adapter Board
Voltage
VccIO
g
Regulators
Selector
GCLR
Switch
GOE
Switch
VccIO LED
VCCINT Selector
7-Segment
Displays
IccIO Jumper
IccINT Jumper
VccINT LED
Power LED
Clock Selector
ATF15xxDK3-SAA44
Socket Adapter Board
Power Switch
Oscillator
User I/O
Pin Headers
Power Supply Jack
Power Supply Header
JTAG Cascade Jumper
Device Socket
JTAG ISP Header
LEDs
Push-Button Switches
4
ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]
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7-segment Displays with Selectable Jumpers
The CPLD Development/Programmer Board contains four 7-segment displays which allow the
observation of the ATF15xx CPLD outputs. These four displays are labeled as DSP1, DSP2, DSP3,
and DSP4. The 7-segment displays have common anode LEDs with the common anode lines
connected to the VCCIO (I/O supply voltage for the CPLD) through a series of resistors with selectable
jumpers labeled as JPDSP1, JPDSP2, JPDSP3, and JPDSP4. These jumpers can be removed to
disable the displays by unconnecting the VCCIO to the displays. Individual cathode lines are connected
to the I/O pins of the ATF15xx CPLD on the CPLD Development/Programmer Kit. To turn on a
particular segment, including the DOT of a display, the corresponding ATF15xx I/O pin connected to
this LED segment must be in a logic low state with the corresponding selectable jumper set; therefore,
the outputs of the ATF15xx device will require configuration for active-low outputs in the design file.
The displays work best at 2.5V VCCIO or higher.
Each segment of each display is hard-wired to one specific I/O pin of the ATF15xx device. For the
higher pin count devices (100-pin and larger), all seven segments and the DOT segments of the four
displays are connected to the I/O pins; however, for the lower pin count devices, only a subset of the
displays, first and fourth displays, are connected to the ATF15xx device’s I/O pins. Tables 1 and 2
show the 7-segment display package connections to the ATF15xx device. The circuit schematic of the
displays and jumpers is shown in the figure below.
RDOT1
RDOT2
DOT4
DOT3
DOT2
Circuit Diagram of 7-segment Display and Jumpers
DOT1
Figure 2.
RDOT3
RDOT4
VccIO
e
d
b
c
RDSP47
RDSP45
RDSP46
RDSP43
RDSP41
RDSP37
RDSP35
RDSP36
g
a
b
c
d
e
f
g
c
RDSP42
d
f
D4A
D4B
D4C
D4D
D4E
D4F
D4G
g
RDSP33
RDSP31
RDSP27
RDSP25
DOT
Vc2
Vc1
DOT
Vc2
Vc1
e
a
b
a
b
c
d
e
f
g
c
RDSP26
RDSP24
RDSP23
RDSP21
RDSP17
RDSP15
RDSP16
RDSP14
RDSP13
RDSP11
RDSP12
D1A
D1B
D1C
D1D
D1E
D1F
D1G
d
RDSP32
e
g
f
a
b
c
d
e
f
g
c
RDSP22
d
a
b
D2A
D2B
D2C
D2D
D2E
D2F
D2G
g
f
a
b
c
d
e
f
g
e
a
b
DSP4
D3A
D3B
D3C
D3D
D3E
D3F
D3G
a
f
JPDSP4
JPLED4
DSP3
DOT
Vc2
Vc1
DSP2
DOT
Vc2
Vc1
DSP1
JPDSP3
JPLED3
RDSP44
JPDSP2
JPLED2
RDSP34
JPDSP1
JPLED1
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Table 1.
44-pin TQFP
44-pin PLCC
DSP/Segment PLD Pin DSP/Segment PLD Pin
DSP/Segment PLD Pin DSP/Segment PLD Pin
1/A
27
3/A
NC
1/A
33
3/A
NC
1/B
33
3/B
NC
1/B
39
3/B
NC
1/C
30
3/C
NC
1/C
36
3/C
NC
1/D
21
3/D
NC
1/D
27
3/D
NC
1/E
18
3/E
NC
1/E
24
3/E
NC
1/F
23
3/F
NC
1/F
29
3/F
NC
1/G
20
3/G
NC
1/G
26
3/G
NC
1/DOT
31
3/DOT
NC
1/DOT
37
3/DOT
NC
2/A
NC
4/A
3
2/A
NC
4/A
9
2/B
NC
4/B
10
2/B
NC
4/B
16
2/C
NC
4/C
6
2/C
NC
4/C
12
2/D
NC
4/D
43
2/D
NC
4/D
5
2/E
NC
4/E
35
2/E
NC
4/E
41
2/F
NC
4/F
42
2/F
NC
4/F
4
2/G
NC
4/G
34
2/G
NC
4/G
40
2/DOT
NC
4/DOT
11
2/DOT
NC
4/DOT
17
Table 2.
6
ATF15xx 44-pin Connections to 7-segment Displays
ATF15xx 84-pin and 100-pin Connections to 7-segment Displays
84-pin PLCC
100-pin TQFP
DSP/Segment PLD Pin DSP/Segment PLD Pin
DSP/Segment PLD Pin DSP/Segment PLD Pin
1/A
68
3/A
22
1/A
67
3/A
13
1/B
74
3/B
28
1/B
71
3/B
19
1/C
70
3/C
25
1/C
69
3/C
16
1/D
63
3/D
21
1/D
61
3/D
8
1/E
58
3/E
16
1/E
57
3/E
83
1/F
65
3/F
17
1/F
64
3/F
6
1/G
61
3/G
12
1/G
60
3/G
92
1/DOT
73
3/DOT
29
1/DOT
75
3/DOT
20
2/A
52
4/A
5
2/A
52
4/A
100
2/B
57
4/B
10
2/B
54
4/B
94
2/C
55
4/C
8
2/C
47
4/C
97
2/D
48
4/D
79
2/D
41
4/D
81
2/E
41
4/E
76
2/E
46
4/E
76
2/F
50
4/F
77
2/F
40
4/F
80
2/G
45
4/G
75
2/G
45
4/G
79
2/DOT
50
4/DOT
11
2/DOT
56
4/DOT
93
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LEDs with Selectable Jumpers
The CPLD Development/Programmer Board has eight individual LEDs, which allow designers to
display the output signals from the user I/Os of the ATF15xx devices. These eight LEDs are labeled
LED1 to LED8 on the CPLD Development/Programmer Board. The cathode of each LED is connected
to Ground (GND) through a series resistor, while the anode of each LED is connected to a user I/O pin
of the CPLD through the JPL1/2/3/4/5/6/7/8 selectable jumper. These jumpers can be removed to
disable the LEDs by unconnecting the anodes of the LEDs to the I/O pins of the CPLD. The figure
below illustrates the circuit diagram of the LEDs with the selection jumpers.
To turn on a particular LED, the corresponding ATF15xx I/O pin connected to the LED must be in a
logic high state with the corresponding jumper set; therefore, the outputs of the ATF15xx device will
need to be configured as active high outputs. The LEDs work best at 2.5V VCCIO or higher.
The lower pin count devices (44-pin) only have four I/Os connected to LED1/2/3/4. For the higher
pin-count devices (100-pin and larger), all eight LEDs are connected to the I/Os of the device. Table 3
shows the different package connections of the CPLD I/Os to the LEDs.
Circuit Diagram of the LEDs and Jumpers
Table 3.
LED4
GREEN
JPL3
SIP2
RL6
330
LED5
GREEN
JPL4
SIP2
RL7
330
LED6
GREEN
JPL5
SIP2
RL8
330
LED7
GREEN
JPL6
SIP2
LED8
GREEN
JPL7
SIP2
JPL8
SIP2
LED8
JPL2
SIP2
LED2
LED1
JPL1
SIP2
LED3
GREEN
RL5
330
LED7
LED2
GREEN
RL4
330
LED6
LED1
GREEN
RL3
330
LED5
RL2
330
LED4
RL1
330
LED3
Figure 3.
ATF15xx Connections to LEDs
44-pin TQFP
44-pin PLCC
84-pin PLCC
100-pin TQFP
LED
PLD Pin
LED
PLD Pin
LED
PLD Pin
LED
PLD Pin
LED1
28
LED1
34
LED1
69
LED1
68
LED2
25
LED2
31
LED2
67
LED2
65
LED3
22
LED3
28
LED3
64
LED3
63
LED4
19
LED4
25
LED4
60
LED4
58
LED5
27
LED5
17
LED6
24
LED6
14
LED7
18
LED7
10
LED8
15
LED8
9
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Push-button Switches with Selectable Jumpers for I/O Pins
The CPLD Development/Programmer Board contains eight push-button switches, which are
connected to the I/O pins of the CPLD. The switches send input logic signals to the user I/O pins of the
ATF15xx device. These switches are labeled SW1 to SW8 on the CPLD Development/Programmer
Board. One end of each input push-button switch is connected to VCCIO, while the other end of each
push-button switch is connected to a pull-down resistor and then connected to the specific I/O pin of
the CPLD through the JPS1/2/3/4/5/6/7/8 selectable jumper.
If any one of these switches is pressed and the corresponding jumper is set, the specific I/O pin of the
device will be driven to a logic high state by the output of switch circuit. Since each push-button switch
is also connected to a pull-down resistor, the input will have a logic low state if the switch is not pressed
with the corresponding jumper set. If the push-button jumper is not set, the corresponding pin will be
treated as an unconnected pin. Figure 4 is a circuit diagram of the push-button switch and selectable
jumper. Table 4 shows the connections of these eight push-button switches to the CPLD I/O pins in the
different package types.
Figure 4.
Circuit Diagram of the Push-button Switches and Jumpers for the I/O Pins
R19
1K
SW1
JPS1
R29
SIP2
1K
SW1
C13
0.001uF
VCCIO
Table 4.
8
ATF15xx Connections to the I/O Pin Switches
44-pin TQFP
44-pin PLCC
84-pin PLCC
100-pin TQFP
Push Button PLD Pin
Push Button PLD Pin
Push Button PLD Pin
Push Button PLD Pin
SW1
15
SW1
21
SW1
54
SW1
48
SW2
14
SW2
20
SW2
51
SW2
36
SW3
13
SW3
19
SW3
49
SW3
44
SW4
12
SW4
18
SW4
44
SW4
37
SW5
8
SW5
14
SW5
9
SW5
96
SW6
5
SW6
11
SW6
6
SW6
98
SW7
2
SW7
8
SW7
4
SW7
84
SW8
44
SW8
6
SW8
80
SW8
99
ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]
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Push-button Switches with Selectable Jumpers for GCLR and OE1 Pins
The CPLD Development/Programmer Board contains two push-button switches for the Global Clear
(GCLR) and Output Enable (OE1) pins of the CPLD. The switches control the logic states of the OE1
and GCLR inputs of the ATF15xx devices. These switches are labeled SW-GCLR and SW-GOE1 on
the board. One end of the SW-GCLR input push-button switch is connected to GND. The other end of
the push-button switch is connected to a pull-up resistor to VCCIO, and then connected to the GCLR
dedicated input pin of the ATF15xx device. It is intended to be used as an active-low reset signal to
reset the registers in the ATF15xx device with the JPGCLR selectable jumper set. Similarly, one end of
the SW-GOE1 input push-button switch is connected to GND. The other end of the push-button switch
is connected to a pull-up resistor to VCCIO, and then connected to the OE1 dedicated input pin of the
ATF15xx device. It is intended to be used as an active-low output enable signal to control the
enabling/disabling of the tri-state output buffers in the ATF15xx with the JPGOE selectable jumper set.
Figure 5 is the circuit diagram of the push-button switches and the jumpers for the GCLR and OE1
pins.
If any of these push-button switches is pressed and the corresponding jumper is set, the specific I/O of
the CPLD will be driven to a logic low state. Since each push-button is also connected to a pull-up
resistor, the corresponding CPLD input will have a logic high state if the push-button switch is not
pressed with the corresponding selectable jumper set. If the selectable jumper is not set, the
corresponding dedicated input pin of the CPLD can be considered a No Connect (NC) pin. Table 5
shows the pin numbers of the GCLR and OE1 dedicated input pins of the ATF15xx devices in all
available package types.
Figure 5.
Circuit Diagram of Push-button Switches and Selectable Jumpers for GCLR and OE1
VccIO
R15
1K
GCLR
R37
R16
1K
JPGCLR
JPGOE
1K
GOE
1K
C7
0.001uF
C8
0.001uF
SW-GCLR
SW-GCLR
Table 5.
R38
SW-GOE
SW-GOE
Pin Numbers of GCLR and OE1
44-pin TQFP
44-pin PLCC
84-pin PLCC
100-pin TQFP
GCLR
39
1
1
89
OE1
38
44
84
88
ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]
Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014
9
2MHz Oscillator and Clock Selection Jumper
The Clock Selection Jumper labeled JP-GCLK on the CPLD Development/Programmer Board is a
two-position jumper that allows the users to select which GCLK dedicated input pin (either GCLK1 or
GCLK2) of the ATF15xx device should be connected to the output of the 2MHz oscillator. In addition,
the jumper can be removed to allow an external clock source to be connected to GCLK1 and/or GCLK2
of the ATF15xx device. Figure 6 is an illustration of the circuit diagram of the oscillator and selection
jumper. Table 6 shows the pin numbers for the GCLK1 and GCLK2 dedicated input pins of the
ATF15xx device in all the different available package types.
If GCLK1 jumper is set, the jumper will be located toward the side of the board. On the other
hand, if GCLK2 jumper is set, the jumper will be located toward the middle of the board.
Figure 6.
Circuit Diagram of Oscillator and Clock Selection Jumper
1
2
3
JPGCLK
GCLK2
GCLK1
R18
1K
R17
1K
R39
100
VccOSC
C21
0.1uF
OSC
1
4
2
3
2MHZ
Table 6.
10
Pin Numbers of GCLK1 and GCLK2
44-pin TQFP
44-pin PLCC
84-pin PLCC
100-pin TQFP
GCLK1
37
43
83
87
GCLK2
40
2
2
90
ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]
Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014
VCCIO and VCCINT Voltage Selection Jumpers and LEDs
The VCCIO and VCCINT Voltage Selection Jumpers, labeled VCCIO Selector and VCCINT Selector
respectively on ATF15xx-DK3 Development/Programming Kit, allow the selection of the I/O supply
voltage level (VCCIO) and core supply voltage level (VCCINT) that are used for the target CPLD on the
kit. Once these jumpers are set correctly, the LEDs (labeled VCCINT LED and VCCIO LED) will turn
on; however, at lower supply voltage levels (i.e. 2.5V or lower), the LEDs might be very dim.
For ATF15xxAS/ASL (5.0V) CPLDs, both the VCCIO Selector and VCCINT Selector jumpers
must be set to 5.0V.
For ATF15xxASV/ASVL (3.3V) CPLDs, both the VCCIO Selector and VCCINT Selector Jumpers
must be set to 3.3V only.
The power of the CPLD Development/Programmer Kit must be turned OFF when
changing the position of the VCCIO or VCCINT Voltage Selection Jumper (VCCIO
Selector or VCCINT Selector).
ICCIO and ICCINT Jumpers
The ICCIO and ICCINT jumpers can be removed and used as ICC measurement points. When the
jumpers are removed, current meters can be connected to the posts to measure the current
consumption of the target CPLD. When users are not using these jumpers to measure the current,
these jumpers must be set in order for the kit and CPLD to operate.
Voltage Regulators
Two voltage regulators, labeled VR1 and VR2, are used to independently generate and regulate the
VCCINT and VCCIO voltages from the 9VDC power supply. For details, please see the ATF15xx-DK3 kit
schematic, Figure 12.
Power Supply Switch and Power LED
The Power Supply Switch, labeled POWER SWITCH, can be switched to the on or off position, which
is used to turn on or off the power of the ATF15xx-DK3 board respectively. It allows the 9VDC voltage
at the Power Supply Jack to pass to the voltage regulators when it is in the on position. When the
Power Supply Switch is turned on, the Power LED (labeled POWER LED) will light up to indicate that
the ATF15xx-DK3 Kit is supplied with power.
Power Supply Jack and Power Supply Header
The ATF15xx-DK3 board contains two different types of power supply connectors labeled JPower and
JP Power. Either one of these power supply connectors can be used to connect a 9VDC power source
to the kit. The first power connector labeled JPower, is a barrel power jack with a 2.1mm diameter post,
and it mates to a 2.1mm (inner diameter) x 5.5mm (outer diameter) female plug. The second power
supply header labeled JP Power, is a 4-pin male 0.100" header with 0.025" square posts. The
availability of these two types of power connectors allows the users to choose the type of power supply
equipment to use for ATF15xx-DK3 Development/Programmer Kit.
Only one of these two power supply connectors should be powered with a 9VDC
source but not both at the same time.
ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]
Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014
11
JTAG ISP Connector and TDO Selection Jumper
The JTAG ISP Connector labeled JTAG-IN, is used to connect the ATF15xx JTAG port pins (TCK, TDI,
TMS, and TDO) through the ISP download cable to the parallel printer (LPT) port of a PC for JTAG ISP
programming of the ATF15xx device. Polarized connectors are used on the ATF15xx-DK3 and ISP
Download Cable to minimize connection problems. The PIN1 label at the bottom of the JTAG ISP
connector indicates the pin 1 position of the 10-pin header and further reduces the chance of
connecting the ISP Download Cable incorrectly.
To the left of the JTAG-IN connector, there are two columns of vias, and they are labeled JTAG-OUT.
They are intended to allow the users to create a JTAG daisy chain to perform JTAG operations to
multiple devices. Users will need to solder the same type of connector as the one used for JTAG-IN
into the JTAG-OUT position in order to utilize this available feature.
To create a JTAG daisy chain using multiple ATF15xx-DK3 boards, the TDO Selection Jumper,
labeled JP-TDO, must be set to the appropriate position. For all the devices in the daisy chain except
the last device, this jumper must be set to the TO NEXT DEVICE position. For the last device in the
chain, this jumper must be set to the TO ISP CABLE position. When this jumper is in the TO NEXT
DEVICE position, the TDO of that particular JTAG device will be connected to the TDI of the next JTAG
device in the chain. When this jumper is in the TO ISP CABLE position, the TDO of that device will be
connected to the TDO of the JTAG 10-pin connector, which will allow the TDO signal of the that device
in the chain to be transmitted back to the host PC with the ISP software. The figure below is a circuit
diagram of the JTAG connectors and the JP-TDO jumper. The table below lists the pin numbers of the
four JTAG pins for the ATF15xx device in all the available packages.
For a single device setup, the position of the JP-TDO jumper must be set to TO ISP CABLE.
Figure 7.
Circuit Diagram of the JTAG ISP Connectors and TDO Jumper
1
2
3
JPGCLK
GCLK2
GCLK1
R18
1K
R17
1K
R39
100
VccOSC
C21
0.1uF
OSC
1
4
2
3
2MHZ
Table 7.
12
Pin Numbers of JTAG Port Signals
44-pin TQFP
44-pin PLCC
84-pin PLCC
100-pin TQFP
TDI
1
7
14
4
TDO
32
38
71
73
TMS
7
13
23
15
TCK
26
32
62
62
ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]
Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014
The ISP algorithm is controlled by the ATMISP software, which is running on the PC. The four JTAG
signals are generated by the LPT port, and they are buffered by the ISP download cable before going
into the ATF15xx device on the CPLD Development/Programmer board. The 10-pin JTAG Port Header
pinout on the CPLD Development/Programmer board is shown in Figure 8, and the dimensions of this
10-pin male JTAG header are shown in Figure 9.
Figure 8.
10-pin JTAG Port Header Pinout
10-Pin JTAG Port Header
(Top View)
GND
10
9
TDI
NC
8
7
NC
NC
6
5
TMS
VCC
4
3
TDO
GND
2
1
TCK
Figure 9.
10-pin Male Header Dimensions
Top View
Side View
0.100
0.100
0.025 Sq.
0.235
All dimensions are in inches.
The 10-pin JTAG Port Header pinout is compatible with the ATDH1150PC/VPC LPT port based cable
and ATDH1150USB USB port based cable, as well as the Altera ByteBlaster/MV/II LPT port based
cables. In addition, the ATMISP v6.7 software allows the use of either the Atmel
ATDH1150PC/VPC/USB cable or the ByteBlaster/MV/II cable to implement ISP.
ATMISP v7.0 only supports the ATDH1150USB cable.
ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]
Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014
13
Socket Adapter Board
The ATF15xx-DK3 CPLD Development/Programmer Socket Adapter Boards (ATF15xx-DK3-XXXXX)
are circuit boards that interface with the ATF15xx-DK3 CPLD Development/Programmer Board. They
are used in conjunction with the ATF15xx-DK3 CPLD Development/Programmer Board to evaluate or
program ATF15xx ISP CPLD devices in different package types. There are four Socket Adapter
Boards available for the ATF15xx-DK3 covering the 44-TQFP, 44-PLCC, 84-PLCC, and 100-TQFP
package types in the ATF15xx family of CPLDs.
Each socket adapter board contains a socket for the ATF15xx device and has male headers on the
bottom side, labeled JP1 and JP2. The headers on the bottom side mate with the female headers on
the ATF15xx-DK3 board, labeled JP4 and JP3. The four 7-segment displays, push-button switches,
JTAG port signals, oscillator, VCCINT, VCCIO, and GND on the CPLD Development/Programmer Board
are connected to the ATF15xx device on the Socket Adapter Board through these two sets of
connectors.
On the top of the 44-TQFP socket adapter, there are four 10-pin connectors with the same dimensions
as the JTAG ISP connector. The pins of these four connectors are connected to the input and I/O pins
(except the four JTAG pins) of the target CPLD device. They can be used to connect to an oscilloscope
or logic analyzer to capture the activities of the input and I/O pins of the CPLD. They also can be used
to connect the input and I/O pins of the CPLD to other external boards or devices for system level
evaluation or testing.
Atmel ATF15xx ISP Download Cable
The ATF15xx ISP Download Cable (P/N: ATDH1150VPC) connects the LPT port of the PC to the
10-pin JTAG header on the CPLD Development/Programmer Board or a custom circuit board. This is
shown in Figure 10. This ISP cable acts as a buffer to buffer the JTAG signals between the PC’s LPT
port and the ATF15xx on the circuit board. The Power-On LED on the back of the 25-pin male
connector housing indicates that the cable is connected properly.
Be sure this LED is turned on before using the Atmel CPLD ISP Software (ATMISP).
This ISP cable consists of a 25-pin (DB25) male connector, which is connected to the LPT port of a PC.
The 10-pin female plug connects to the 10-pin male JTAG header on the ISP circuit board. The red
color stripe on the ribbon cable indicates the orientation of pin 1 of the female plug. The 10-pin male
JTAG header on the CPLD Development/Programmer Board is polarized to prevent users from
inserting the female plug in the wrong orientation.
The CPLD Development/Programmer kits includes the ATF15xx ISP Download Cable
(ATDH1150VPC); however, other supported ISP cables can also be used. The ATDH1150VPC,
ATDH1150USB, ByteBlasterMV, and ByteBlasterII cables can be used for the ATF15xx/ASL (5V) and
ATF15xxASV/ASVL (3.3V) devices, while the older ATDH1150PC and the ByteBlaster cables can be
used for the ATF15xxAS/ASL (5V) only.
14
ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]
Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014
ATF15xx ISP Download Cable Connection to ISP Hardware Board/Circuit Board
Co
D
O IS
W
C N P
A LO
B A
LE D
Figure 10.
r
lo
e
rip
St
D
LE
in
P
1
Figure 11 illustrates the 10-pin female header pinout for the ATF15xx ISP Download Cable. The
10-pin male header pinout on the PC board (if used for ISP) must match this pinout.
Figure 11.
ATF15xx ISP Download Cable 10-pin Female Header Pinout
Color Stripe
1
3
5
7
9
2
4
6
8
10
Note:
The circuit board must supply VCC and GND to the CPLD ISP Cable through the 10-pin male header.
ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]
Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014
15
GCLR
1K
R37
0.001uF
C7
R15
1K
VccIO
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
JP
JP Power
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
SW-GCLR
SW-GCLR
R16
1K
SW-GOE
SW-GOE
JPGOE
1N4001
D1
VCCINT
GND
D4G
D4E
D4F
D4D
TDI
D4A
D4C
D4B
TMS
D3G
D3E
D3F
D3D
D3A
D3C
D3B
GND
VCCIO
C8
0.001uF
1K
R38
C1
100uF
RDSP11
C2
0.1uF
C9
0.1uF
VccIO
POWER SWITCH
e
f
d
g
a
c
b
DSP1
DOT1
DOT
RDSP17
RDSP15
RDSP13
RDSP12
JP4
JPGCLR
9VDC
500mA
9V DC Center Positive
JPower
DOT3
GND
GND
LED8
LED7
LED6
LED5
GND
GND
GOE
GCLR
GCLK2
GCLK1
SW8
SW7
SW6
SW5
DOT4
Vc1
JPDSP1
JPLED1
C10
0.1uF
GOE
VccIN
C12
0.1uF
Vin
e
f
d
g
a
c
b
DSP2
JPDSP2
JPLED2
DOT2
DOT
+Vout
e
f
d
g
a
c
b
DSP3
JPDSP3
JPLED3
R5
330
R4
270
R3
240
R2
510
2
JPIO50
5V(AS)
R6
JPIO33
680
3.3V(ASV/BE)
JPIO25
2.5V(BE)
JPIO18
1.8V(BE)
C11
0.1uF
VR1
LM317
VccINT
R28
1K
D4
3
RDSP21
Vc2
RDSP14
Vc1
RDSP22
GND
GND
VccIO
RDSP23
DOT2
SW1
SW2
SW3
SW4
RDSP31
TCK
D2B
D2A
D2C
D2F
D2D
D2G
D2E
GND
VCCIO
RDSP25
Vc1
RDSP32
RDOT2
RDSP33
RDOT1
RDSP26
DOT3
RDOT3
DOT
GND
GND
DOT1
LED1
LED2
LED3
TDO
LED4
RDSP35
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
C3
0.1uF
C4
10uF
RDSP41
Vc2
RDSP34
e
f
d
g
a
c
b
DSP4
JPDSP4
JPLED4
Vc1
RDSP42
a
b
c
d
e
f
g
RDSP16
D1A
D1B
D1C
D1D
D1E
D1F
D1G
RDSP43
Vc2
RDSP24
ADJ
RDSP45
a
b
c
d
e
f
g
RDSP27
D2A
D2B
D2C
D2D
D2E
D2F
D2G
RDSP36
DOT4
RDOT4
DOT
RDSP47
a
b
c
d
e
f
g
RDSP37
D3A
D3B
D3C
D3D
D3E
D3F
D3G
Vc2
RDSP44
a
b
c
d
e
f
g
RDSP46
VccIO
BIGATMEL
ATMEL
MARK
R1
1K
D2
IccIO
JP1
D4A
D4B
D4C
D4D
D4E
D4F
D4G
JP3
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
1
2
3
4
VCCIN
VR2
LM317
Vin
SIP2
JPS5
C14
0.001uF
1K
R20
C13
0.001uF
SIP2
JPS1
R19
1K
JPINT18
1.8V(BE)
3
VCCIO
SW5
VCCIO
SW1
ADJ
1K
R30
1K
R29
+Vout
JPINT50
5.0(AS)
JPINT33
3.3V(ASV)
1
Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014
1
ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]
LED1
R10
680
R9
620
R8
240
R7
510
2
SW5
SW1
JPL1
SIP2
C5
0.1uF
LED1
GREEN
RL1
330
LED2
10uF
C6
VCCIO
SW6
VCCIO
SW2
JPL2
SIP2
LED2
GREEN
RL2
330
SIP2
JPS6
0.1uF
C21
R27
1K
D3
VccOSC
IccINT
JP2
C16
0.001uF
1K
R22
JPL4
SIP2
4
3
1
R17
1K
GCLK2
3
Vin
R39
100
VCCIO
SW7
VCCIO
SW3
JPL6
SIP2
LED6
GREEN
RL6
330
VR3
LM317
JPGCLK
SW6
SW2
JPL5
SIP2
LED5
GREEN
RL5
330
VCCIN
LED5
2
2MHZ
OSC
1K
R32
1K
R31
LED4
GREEN
RL4
330
VccINT
LED4
C15
0.001uF
SIP2
JPS2
R21
1K
JPL3
SIP2
LED3
GREEN
RL3
330
LED6
1
2
3
16
ADJ
R18
1K
GCLK1
LED7
+Vout
R41
820
R40
510
2
C22
0.1uF
1K
SIP2
C18
0.001uF
R34
JPS7
C23
10uF
1
3
5
7
9
2
4
6
8
10
JTAG-OUT
JTAG-IN
1
2
3
4
5
6
7
8
9
10
VccOSC
VCCIO
JP-TDO
3
2
1
VccIO
C20
0.001uF
SIP2
JPS8
1K
C19
0.001uF
SIP2
JPS4
R25
1K
R26
SW8
VCCIO
SW4
1K
SW7
SW3
R24
C17
0.001uF
1K
SIP2
JPL8
SIP2
LED8
GREEN
RL8
330
R33
LED8
JPS3
R23
1K
JPL7
SIP2
LED7
GREEN
RL7
330
TCK
R11
4.7K
TMS
R12
4.7K
1K
R36
1K
R35
TDI
TDO
R13
4.7K
R14
10K
SW8
SW4
VccIO
Figure 12.
1
VCCINT
GND
D1B
D1C
D1A
D1F
D1D
D1G
D1E
Schematic Diagrams
ATF15xx-D3 Development/Programmer Kit Schematic Diagram
LED3
PIN2
PIN5
PIN8
PIN11
PIN38
PIN39
PIN40
PIN37
PIN44
PIN2
PIN5
PIN8
PIN11
JL
1
3
5
7
9
DOT3
GND
GND
LED8
LED7
LED6
LED5
GND
GND
GOE
GCLR
GCLK2
GCLK1
SW8
SW7
SW6
SW5
DOT4
2
4
6
8
10
PIN3
PIN6
PIN10
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
JP1
c2
0.1uF
VCCINT
GND
D4G
D4E
D4F
D4D
TDI
D4A
D4C
D4B
TMS
D3G
D3E
D3F
D3D
D3A
D3C
D3B
GND
VCCIO
c1
0.1uF
VCCIO
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
c3
0.1uF
c4
0.1uF
VCCINT
TDI
PIN2
PIN3
GND
PIN5
PIN6
TMS
PIN8
VCCIO
PIN10
PIN11
PIN3
PIN6
PIN10
PIN34
PIN35
PIN42
PIN43
1
2
3
4
5
6
7
8
9
10
11
JT
1
3
5
7
9
2
4
6
8
10
TDI
I/O
I/O
GND
I/O
I/O
TMS ATMEL TQFP44
I/O
VCC
I/O
I/O
PIN12
PIN14
PIN18
PIN20
PIN22
PIN34
PIN37
PIN39
PIN42
PIN44
PIN44
PIN43
PIN42
VCCINT
PIN40
PIN39
PIN38
PIN37
GND
PIN35
PIN34
1
3
5
7
9
JB
2
4
6
8
10
33
32
31
30
29
28
27
26
25
24
23
PIN13
PIN15
PIN19
PIN21
TQFP44
U1
PIN35
PIN38
PIN40
PIN43
I/O
TDO
I/O
I/O
VCC
I/O
I/O
TCK
I/O
GND
I/O
44
43
42
41
40
39
38
37
36
35
34
I/O
I/O
I/O
VCC
I/OE2/GCLK2
GCLR
OE1
GCLK1
GND
GCLK3
I/O
I/O
I/O
I/O
I/O
GND
VCC
I/O
I/O
I/O
I/O
I/O
12
PIN12
PIN13
13
14
PIN14
15
PIN15
16
GND
VCCINT 17
18
19
20
21
22
PIN18
PIN19
PIN20
PIN21
PIN22
PIN33
TDO
PIN31
PIN30
VCCIO
PIN28
PIN27
TCK
PIN25
GND
PIN23
PIN33
PIN30
PIN27
PIN23
PIN21
PIN20
PIN18
TCK
D2B
D2A
D2C
D2F
D2D
D2G
D2E
GND
VCCIO
VCCINT
GND
D1B
D1C
D1A
D1F
D1D
D1G
D1E
PIN33
PIN30
PIN27
PIN23
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
JP2
JR
1
3
5
7
9
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
2
4
6
8
10
GND
GND
DOT2
SW1
SW2
SW3
SW4
GND
GND
DOT1
LED1
LED2
LED3
TDO
LED4
PIN31
PIN28
PIN25
PIN15
PIN14
PIN13
PIN12
PIN19
PIN31
PIN28
PIN25
PIN22
Figure 13.
44-pin TQFP Socket Adapter Board Schematic Diagram
ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]
Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014
17
ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]
PIN44
PIN1
PIN2
PIN43
PIN6
PIN8
PIN11
PIN14
PIN17
PIN8
PIN11
PIN14
PIN17
1
3
5
7
9
JL
2
4
6
8
10
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
JP1
c1
0.1uF
VCCIO
DOT3
GND
GND
LED8
LED7
LED6
LED5
GND
GND
GOE
GCLR
GCLK2
GCLK1
SW8
SW7
SW6
SW5
DOT4
c2
0.1uF
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
c4
0.1uF
VCCINT
c3
0.1uF
PIN9
PIN12
PIN16
VCCINT
GND
D4G
D4E
D4F
D4D
TDI
D4A
D4C
D4B
TMS
D3G
D3E
D3F
D3D
D3A
D3C
D3B
GND
VCCIO
PIN9
PIN12
PIN16
PIN40
PIN41
PIN4
PIN5
PIN11
PIN12
PIN8
PIN9
PIN14
VCCIO
PIN16
PIN17
TMS
GND
TDI
7
8
9
10
11
12
13
14
15
16
17
PIN40
PIN43
PIN1
PIN4
PIN6
1
3
5
7
9
JT
2
4
6
8
10
PIN6
PIN5
PIN4
VCCINT
PIN2
PIN1
PIN44
PIN43
GND
PIN41
PIN40
6
5
4
3
2
1
44
43
42
41
40
TDI
I/O
I/O
GND
I/O
I/O
ATMEL PLCC44
TMS
I/O
VCC
I/O
I/O
PIN18
PIN20
PIN24
PIN26
PIN28
1
3
5
7
9
JB
2
4
6
8
10
39
38
37
36
35
34
33
32
31
30
29
PIN19
PIN21
PIN25
PIN27
PLCC44
U1
PIN41
PIN44
PIN2
PIN5
I/O
TDO
I/O
I/O
VCC
I/O
I/O
TCK
I/O
GND
I/O
I/O
I/O
I/O
VCC
I/OE2/GCLK2
GCLR
OE1
GCLK1
GND
GCLK3
I/O
I/O
I/O
I/O
I/O
GND
VCC
I/O
I/O
I/O
I/O
I/O
Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014
18
19
20
21
22
23
24
25
26
27
28
18
PIN18
PIN19
PIN20
PIN21
GND
VCCINT
PIN24
PIN25
PIN26
PIN27
PIN28
PIN39
TDO
PIN37
PIN36
VCCIO
PIN34
PIN33
TCK
PIN31
GND
PIN29
PIN39
PIN36
PIN33
PIN29
PIN27
PIN26
PIN24
PIN29
PIN33
PIN36
PIN39
TCK
D2B
D2A
D2C
D2F
D2D
D2G
D2E
GND
VCCIO
VCCINT
GND
D1B
D1C
D1A
D1F
D1D
D1G
D1E
1
3
5
7
9
JR
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
JP2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
2
4
6
8
10
PIN31
PIN34
PIN37
GND
GND
DOT2
SW1
SW2
SW3
SW4
GND
GND
DOT1
LED1
LED2
LED3
TDO
LED4
PIN21
PIN20
PIN19
PIN18
PIN25
PIN37
PIN34
PIN31
PIN28
Figure 14.
44-pin PLCC Socket Adapter Board Schematic Diagram
LED8
LED7
LED6
LED5
DOT3
GND
GND
PIN84
PIN1
PIN2
PIN83
PIN80
PIN4
PIN6
PIN9
PIN11
PIN15
PIN18
PIN24
PIN27
PIN29
PIN12
PIN15
PIN18
PIN24
PIN27
PIN25
PIN29
PIN31
GND
GND
GOE
GCLR
GCLK2
GCLK1
SW8
SW7
SW6
SW5
DOT4
1
3
5
7
9
11
13
15
17
JPLEFT
JP4
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
IDC40
JP1
2
4
6
8
10
12
14
16
18
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
PIN20
PIN16
PIN17
PIN21
PIN22
PIN28
PIN30
VCCINT
GND
D4G
D4E
D4F
D4D
TDI
D4A
D4C
D4B
TMS
D3G
D3E
D3F
D3D
D3A
D3C
D3B
GND
VCCIO
PIN12
VCCIO
TDI
PIN15
PIN16
PIN17
PIN18
GND
PIN20
PIN21
PIN22
TMS
PIN24
PIN25
VCCIO
PIN27
PIN28
PIN29
PIN30
PIN31
GND
PIN12
PIN16
PIN17
PIN21
PIN22
PIN25
PIN28
PIN5
PIN8
PIN10
PIN75
PIN76
PIN77
PIN79
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
PIN11
PIN9
PIN6
PIN4
PIN1
PIN83
PIN80
PIN77
PIN75
JPTOP
JP3
1
3
5
7
9
11
13
15
17
2
4
6
8
10
12
14
16
18
PIN10
PIN8
PIN5
PIN2
PIN84
PIN81
PIN79
PIN76
PIN11
PIN10
PIN9
PIN8
GND
PIN6
PIN5
PIN4
VCCINT
PIN2
PIN1
PIN84
PIN83
GND
PIN81
PIN80
PIN79
VCCIO
PIN77
PIN76
PIN75
11
10
9
8
7
6
5
4
3
2
1
84
83
82
81
80
79
78
77
76
75
I/O
VCC_IO
I/O / TDI
I/O
I/O
I/O
I/O
GND
I/O
I/O
I/O
I/O / TMS
I/O
I/O
VCC_IO
I/O
I/O
I/O
I/O
I/O
GND
ATF1508AS-15JC84
ATMEL
I/O
I/O
GND
I/O / TDO
I/O
I/O
I/O
I/O
VCC_IO
I/O
I/O
I/O
I/O / TCK
I/O
I/O
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
I/O
I/O
I/O
VCC_INT
INPUT/OE2/GCLK2
INPUT/GCLRn
INPUT/OE1
INPUT/GCLK1
GND
I/O
I/O
I/O
VCC_IO
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
VCC_IO
I/O
I/O
I/O
GND
VCC_INT
I/O
I/O
I/O
GND
I/O
I/O
I/O
I/O
I/O
VCC_IO
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
PIN33
PIN35
PIN37
PIN40
PIN44
PIN46
PIN49
PIN51
2
4
6
8
10
12
14
16
18
JPBOTTOM
JP6
1
3
5
7
9
11
13
15
17
PIN34
PIN36
PIN39
PIN41
PIN45
PIN48
PIN50
PIN52
PIN33
PIN34
PIN35
PIN36
PIN37
VCCIO
PIN39
PIN40
PIN41
GND
VCCINT
PIN44
PIN45
PIN46
GND
PIN48
PIN49
PIN50
PIN51
PIN52
VCCIO
U1
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
C1
0.1uF
PIN74
PIN73
GND
TDO
PIN70
PIN69
PIN68
PIN67
VCCIO
PIN65
PIN64
PIN63
TCK
PIN61
PIN60
GND
PIN58
PIN57
PIN56
PIN55
PIN54
MARK1
SMALLATMEL
C2
0.1uF
PIN51
PIN49
PIN46
PIN44
PIN40
PIN37
C3
0.1uF
C7
0.1uF
C8
0.1uF
VCCIO
PIN73
PIN69
PIN67
PIN64
PIN61
PIN58
PIN57
PIN55
TCK
D2B
D2A
D2C
D2F
D2D
D2G
D2E
GND
VCCIO
C6
0.1uF
VCCINT
C5
0.1uF
C4
0.1uF
PIN57
PIN52
PIN55
PIN50
PIN48
PIN45
PIN41
PIN74
PIN70
PIN68
PIN65
PIN63
PIN61
PIN58
VCCINT
GND
D1B
D1C
D1A
D1F
D1D
D1G
D1E
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
JP5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
JPBOTTOM
JP2
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
IDC40
PIN74
PIN70
PIN68
PIN65
PIN63
PIN60
PIN56
PIN54
GND
GND
DOT2
SW1
SW2
SW3
SW4
GND
GND
DOT1
LED1
LED2
LED3
TDO
LED4
PIN56
PIN54
PIN51
PIN49
PIN44
PIN60
PIN73
PIN69
PIN67
PIN64
PIN50
PIN48
PIN45
PIN41
PIN39
Figure 15.
84-pin PLCC Socket Adapter Board Schematic Diagram
ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]
Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014
19
DOT3
GND
GND
PIN9
PIN10
PIN14
PIN17
PIN20
PIN5
PIN2
PIN9
PIN6
PIN8
PIN13
PIN16
PIN19
PIN10
PIN12
LED8
LED7
LED6
LED5
PIN88
PIN89
PIN90
PIN87
PIN99
PIN84
PIN98
PIN96
PIN93
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
HEADER 11X2
JL
C7
0.1uF
C8
0.1uF
PIN1
PIN7
PIN14
PIN17
PIN20
PIN22
PIN23
PIN25
PIN24
PIN21
C11
0.2uF
C1
0.1uF
VCCINT
GND
D4G
D4E
D4F
D4D
TDI
D4A
D4C
D4B
TMS
D3G
D3E
D3F
D3D
D3A
D3C
D3B
GND
VCCIO
C12
0.2uF
C3
0.1uF
VCCIO
PIN1
PIN2
VCCIO
TDI
PIN5
PIN6
PIN7
PIN8
PIN9
PIN10
GND
PIN12
PIN13
PIN14
TMS
PIN16
PIN17
VCCIO
PIN19
PIN20
PIN21
PIN22
PIN23
PIN24
PIN25
C6
C9
0.01uF 0.1uF
VCCINT
C5
0.01uF
C2
0.1uF
PIN92
PIN83
PIN6
PIN8
PIN13
PIN16
PIN19
PIN100
PIN97
PIN94
PIN79
PIN76
PIN80
PIN81
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
PIN76
PIN79
PIN84
PIN85
PIN87
PIN89
PIN93
PIN96
PIN98
PIN99
I/On
I/On
VCCIO
TDI
I/On
I/O
I/On
I/O
I/O
I/O
GND
I/O
I/O
I/O
TMS
I/O
I/O
VCCIO
I/O
I/O
I/O
I/On
I/O
I/On
I/O
C10
0.1uF
JT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
HEADER 11X2
ATMEL TQFP100
PIN39
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
J1
CON3
VCCINT
GND
PIN27
PIN28
PIN29
PIN30
PIN31
PIN32
PIN33
VCCIO
PIN35
PIN36
PIN37
GND
3
2
1
JP1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
PIN39
GND
GND
GOE
GCLR
GCLK2
GCLK1
SW8
SW7
SW6
SW5
DOT4
PIN78
PIN77
PIN80
PIN81
PIN83
PIN90
PIN88
PIN92
PIN94
PIN97
PIN100
PIN100
PIN99
PIN98
PIN97
PIN96
GND
PIN94
PIN93
PIN92
VCCINT
PIN90
PIN89
PIN88
PIN87
GND
PIN85
PIN84
PIN83
VCCIO
PIN81
PIN80
PIN79
PIN78
PIN77
PIN76
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
I/O
GND
TDO
I/On
I/O
I/On
I/O
I/O
I/O
VCCIO
I/O
I/O
I/O
TCK
I/O
I/O
GND
I/O
I/O
I/O
I/On
I/O
I/On
I/O
VCCIO
I/O
I/O
I/O
I/O
I/O
GND
I/O
I/O
I/O
VCCINT
GCLK2
GCLR
OE1
GCLK1
GND
I/O GCLK3
I/O
I/O
VCCIO
I/O
I/O
I/On
I/O
I/On
I/O
Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014
GND
I/On
I/On
I/O
I/O
I/O
I/O
I/O
VCCIO
I/O
I/O
I/O
GND
VCCINT
I/O
I/O
I/O
GND
I/O
I/O
I/O
I/O
I/O
I/On
I/On
ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
20
PIN40
PIN41
PIN42
GND
PIN44
PIN45
PIN46
PIN47
PIN48
PIN49
PIN50
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
TQFP100
U1
PIN75
GND
TDO
PIN72
PIN71
PIN70
PIN69
PIN68
PIN67
VCCIO
PIN65
PIN64
PIN63
TCK
PIN61
PIN60
GND
PIN58
PIN57
PIN56
PIN55
PIN54
PIN53
PIN52
VCCIO
PIN54
PIN52
PIN47
PIN40
PIN41
PIN45
PIN46
PIN71
PIN69
PIN67
PIN64
PIN61
PIN60
PIN57
TCK
D2B
D2A
D2C
D2F
D2D
D2G
D2E
GND
VCCIO
VCCINT
GND
D1B
D1C
D1A
D1F
D1D
D1G
D1E
PIN31
PIN27
PIN30
PIN33
PIN36
PIN40
PIN42
PIN45
PIN48
PIN46
PIN53
PIN55
PIN57
PIN60
PIN63
PIN65
PIN68
PIN71
PIN72
JP2
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
2
4
6
8
10
12
14
16
18
20
22
HEADER 11X2
1
3
5
7
9
11
13
15
17
19
21
JB
JR
21
22
19
20
17
18
15
16
13
14
11
12
9
10
7
8
5
6
3
4
1
2
HEADER 11X2
GND
GND
DOT2
SW1
SW2
SW3
SW4
GND
GND
DOT1
LED1
LED2
LED3
TDO
LED4
PIN28
PIN29
PIN32
PIN35
PIN37
PIN41
PIN44
PIN47
PIN50
PIN49
PIN52
PIN56
PIN54
PIN58
PIN61
PIN64
PIN67
PIN69
PIN70
PIN75
PIN56
PIN48
PIN36
PIN44
PIN37
PIN58
PIN75
PIN68
PIN65
PIN63
Figure 16.
100-pin TQFP Socket Adapter Board Schematic Diagram
References and Support
For additional PLD design software references and support, documentation such as help files, tutorials,
application notes/briefs, and user guides are available at www.atmel.com.
Atmel ProChip Designer Software
Table 8.
ProChip Designer References and Support
ProChip Designer
From the main ProChip window menu...
Help
Select Help > Prochip Designer Help.
Tutorials
Select Help > Tutorials.
Known Problems and Solutions
Select Help > Review KPS.
Atmel WinCUPL Software
Table 9.
WinCUPL References and Support
WinCUPL
From the main WinCUPL window menu...
Help
Select Help > Contents.
CUPL Programmers Reference Guide
Select Help > CUPL Programmers Reference.
Tutorials
Select Help > Atmel Info > Tutorial1.pdf.
Known Problems and Solutions
Select Help > Atmel Info > CUPL_BUG.pdf.
Atmel ATMISP Software
Table 10.
ATMISP References and Support
ATMISP
From the main ATMISP window menu...
Help Files
Select Help > ISP Help.
Tutorials
Select Help > ATMISP Tutorial.
Known Problems and Solutions
Using the Windows Explorer browser, locate the ATMISP folder and
open the readme.txt file with an ASCII text editor.
Atmel POF2JED Conversion Software
Table 11.
POF2JED References and Support
POF2JED
From the main POF2JED window menu...
ATF15xx Conversion Application Brief
Select Help > Conversion Options.
ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]
Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014
21
Technical Support
For technical support on any Atmel PLD related issues, contact the Atmel PLD Applications Group at:
Email
pld@atmel.com
Hotline
(+1)(408) 436-4333
Online Support Form
http://support.atmel.com/bin/customer.exe
Revision History
22
Revision
Date
3605C
06/2014
3605B
05/2008
Description
Update schematics, template, logos, and disclaimer page. Add the Revision
History section.
ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]
Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014
XXXXXX
Atmel Corporation
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