5962-9063301MCA

Precision, High Speed, BiFET Quad Op Amp AD713 CONNECTION DIAGRAMS AC performance 1 μs settling to 0.01% for 10 V step 20 V/μs slew rate 0.0003% total harmonic distortion (THD) 4 MHz unity gain bandwidth DC performance 1.5 mV maximum offset voltage 8 μV/°C typical drift 150 V/mV minimum open-loop gain 2 μV p-p typical noise, 0.1 Hz to 10 Hz True 14-bit accuracy Single version: AD711, dual version: AD712 Available in 16-lead SOIC, 14-lead PDIP and CERDIP OUTPUT 1 –IN 2 +IN 3 +VS 4 +IN 5 –IN 6 1 4 AD713 14 OUTPUT 13 –IN 12 +IN 11 –VS TOP VIEW (Not to Scale) 10 +IN 2 3 OUTPUT 7 9 –IN 8 OUTPUT 00824-001 FEATURES OUTPUT 1 –IN 2 1 4 +IN 3 APPLICATIONS +VS 4 AD713 +IN 5 Active filters Quad output buffers for 12- and 14-bit DACs Input buffers for precision ADCs Photo diode preamplifier applications –IN 6 OUTPUT 7 NC 8 2 3 TOP VIEW (Not to Scale) 16 OUTPUT 15 –IN 14 +IN 13 –VS 12 +IN 11 –IN 10 OUTPUT 9 NC NC = NO CONNECT. DO NOT CONNECT TO THIS PIN. 00824-002 Figure 1. 14-Lead PDIP (N) and CERDIP (Q) Packages Figure 2. 16-Lead SOIC_W (RW) Package GENERAL DESCRIPTION The AD713 is a quad operational amplifier, consisting of four AD711 BiFET op amps. These precision monolithic op amps offer excellent dc characteristics plus rapid settling times, high slew rates, and ample bandwidths. In addition, the AD713 provides the close matching ac and dc characteristics inherent to amplifiers sharing the same monolithic die. The single-pole response of the AD713 provides fast settling: l μs to 0.01%. This feature, combined with its high dc precision, makes the AD713 suitable for use as a buffer amplifier for 12- or 14-bit DACs and ADCs. It is also an excellent choice for use in active filters in 12-, 14and 16-bit data acquisition systems. Furthermore, the AD713 low total harmonic distortion (THD) level of 0.0003% and very close matching ac characteristics make it an ideal amplifier for many demanding audio applications. The AD713 is internally compensated for stable operation at unity gain. The AD713J is rated over the commercial temperature range of 0°C to 70°C. The AD713A is rated over the industrial temperature of −40°C to +85°C. PRODUCT HIGHLIGHTS 1. 2. 3. 4. The AD713 is a high speed BiFET op amp that offers excellent performance at competitive prices. It upgrades the performance of circuits using op amps such as the TL074, TL084, LT1058, LF347, and OPA404. Slew rate is 100% tested for a guaranteed minimum of 16 V/μs (J and A grades). The combination of Analog Devices, Inc., advanced processing technology, laser wafer drift trimming, and well-matched ion-implanted JFETs provides outstanding dc precision. Input offset voltage, input bias current and input offset current are specified in the warmed-up condition and are 100% tested. Very close matching of ac characteristics between the four amplifiers makes the AD713 ideal for high quality active filter applications. The AD713 is offered in 16-lead SOIC, 14-lead PDIP, and 14-lead CERDIP packages. Rev. F Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2002–2011 Analog Devices, Inc. All rights reserved. AD713 TABLE OF CONTENTS Features .............................................................................................. 1 Theory of Operation ...................................................................... 11 Applications....................................................................................... 1 Measuring AD713 Settling Time ............................................. 11 Connection Diagrams...................................................................... 1 Power Supply Bypassing ............................................................ 11 General Description ......................................................................... 1 A High Speed Instrumentation Amplifier Circuit................. 12 Product Highlights ........................................................................... 1 A High Speed 4-Op-Amp Cascaded Amplifier Circuit ........ 12 Revision History ............................................................................... 2 High Speed Op Amp Applications and Techniques .............. 12 Specifications..................................................................................... 3 CMOS DAC Applications ......................................................... 14 Absolute Maximum Ratings............................................................ 5 Filter Applications ...................................................................... 14 Thermal Resistance ...................................................................... 5 GIC and FDNR Filter Applications ......................................... 15 ESD Caution.................................................................................. 5 Outline Dimensions ....................................................................... 17 Typical Performance Characteristics ............................................. 6 Ordering Guide .......................................................................... 18 Test Circuits..................................................................................... 10 REVISION HISTORY 7/11—Rev. E to Rev. F Changes to Figure 2.......................................................................... 1 6/11—Rev. D to Rev. E Changed 8 μV/°C Maximum Drift to 8 μV/°C Typical Drift in Features Section ................................................................................ 1 5/11—Rev. C to Rev. D Updated Format..................................................................Universal Changes to Features Section, General Description Section, and Product Highlights Section ............................................................. 1 Deleted S, K, B, and T Grades Throughout................................... 1 Changes to Table 1............................................................................ 3 Changes to Table 2............................................................................ 5 Added Typical Performance Characteristics Summary .............. 6 Change to Figure 7 ........................................................................... 7 Changes to Figure 15, Figure 17, and Figure 18 ........................... 8 Deleted Figure 9 and Figure 10; Renumbered Sequentially ........9 Changes to Figure 23 Caption and Figure 24 Caption .............. 10 Added Test Circuits Section.......................................................... 11 Moved Figures 26, Figure 27, and Figure 28............................... 11 Changes to Figure 29...................................................................... 12 Changes to DAC Buffers (I-to-V Converters) Section.............. 13 Changes to Figure 37 and Table 5................................................. 14 Changed C1 to CL ........................................................................... 14 Changes to Figure 43 and Figure 44............................................. 15 Updated Outline Dimensions....................................................... 18 Changes to Ordering Guide .......................................................... 19 10/01—Rev. B to Rev. C Edits to Features.................................................................................1 Edits to Product Description ...........................................................1 Edits to Ordering Guide ...................................................................3 Edits to Metallization Photograph ..................................................3 Rev. F | Page 2 of 20 AD713 SPECIFICATIONS VS = ±15 V at TA = 25°C, unless otherwise noted. Table 1. Parameter INPUT OFFSET VOLTAGE 1 Initial Offset Offset vs. Temp vs. Supply Test Conditions/Comments TMIN to TMAX 78 76 TMIN to TMAX Long-Term Stability INPUT BIAS CURRENT 2 INPUT OFFSET CURRENT Min VCM = 0 V VCM = 0 V at TMAX VCM = ±10 V VCM = 0 V VCM = 0 V at TMAX 0.5 0.7 8 10 TMIN to TMAX FREQUENCY RESPONSE Small Signal Bandwidth Full Power Response Slew Rate Settling Time to 0.01% Total Harmonic Distortion INPUT IMPEDANCE Differential 3 Common Mode 4 INPUT VOLTAGE RANGE Differential Common-Mode Voltage Common Mode Rejection Ratio INPUT VOLTAGE NOISE INPUT CURRENT NOISE OPEN-LOOP GAIN 0.3 0.5 5 95 95 15 40 55 10 MATCHING CHARACTERISTICS Input Offset Voltage Input Offset Voltage Drift Input Bias Current Crosstalk AD713J/AD713A Typ Max f = 1 kHz f = 100 kHz G = −1 VO = 20 V p-p G = −1 3.0 16 f = 1 kHz; RL ≥ 2 kΩ; VO = 3 V rms TMIN to TMAX VCM = ±10 V TMIN to TMAX VCM = ±11 V TMIN to TMAX 0.1 Hz to 10 Hz f = 10 Hz f = 100 Hz f = 1 kHz f = 10 kHz f = 1 kHz VO = ±10 V; RL ≥ 2 kΩ TMIN to TMAX −11 78 76 72 70 150 100 Rev. F | Page 3 of 20 4.0 200 20 1.0 0.0003 1.5 2 150 3.4/9.6 200 75 1.7/4.8 1.8 2.3 100 −130 −95 1.2 Unit mV mV μV/°C dB dB μV/Month pA nA pA pA pA mV mV μV/°C pA dB dB MHz kHz V/μs μs % 3 × 1012||5.5 3 × 1012||5.5 Ω||pF Ω||pF ±20 +14.5/−11.5 V V V dB dB dB dB μV p-p nV/√Hz nV/√Hz nV/√Hz nV/√Hz pA/√Hz V/mV V/mV +13 88 84 84 80 2 45 22 18 16 0.01 400 AD713 Parameter OUTPUT CHARACTERISTICS Voltage Current POWER SUPPLY Rated Performance Operating Range Quiescent Current TRANSISTOR COUNT Test Conditions/Comments Min RL ≥ 2 kΩ TMIN to TMAX Short circuit +13/−12.5 ±12 AD713J/AD713A Typ Max Unit +13.9/−13.3 +13.8/−13.1 25 V V mA ±15 ±4.5 10.0 120 Number of transistors 1 ±18 13.5 V V mA Input offset voltage specifications are guaranteed after 5 minutes of operation at TA = 25°C. Bias current specifications are guaranteed maximum at either input after 5 minutes of operation at TA = 25°C. For higher temperatures, the current doubles every 10°C. 3 Defined as the voltage between inputs, such that neither exceeds ±10 V from ground. 4 Typically exceeding −14.1 V negative common-mode voltage on either input results in an output phase reversal. 2 Rev. F | Page 4 of 20 AD713 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Supply Voltage Input Voltage1 Output Short-Circuit Duration (For One Amplifier) Differential Input Voltage Storage Temperature Range (Q) Storage Temperature Range (N, R) Operating Temperature Range AD713J AD713A Lead Temperature Range (Soldering, 60 sec) 1 Rating ±18 V ±18 V Indefinite +VS and −VS −65°C to +150°C −65°C to +125°C 0°C to 70°C −40°C to +85°C 300°C For supply voltages less than ±18 V, the absolute maximum input voltage is equal to the supply voltage. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL RESISTANCE θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 3. Thermal Resistance Package Type 14-Lead PDIP (N-14) 14-Lead CERDIP (Q-14) 16-Lead SOIC_W (RW-16) ESD CAUTION Rev. F | Page 5 of 20 θJA 100 110 100 θJC 30 30 30 Unit °C/W °C/W °C/W AD713 TYPICAL PERFORMANCE CHARACTERISTICS VS = ±15 V at TA = 25°C, unless otherwise noted. 16 20 10 5 0 0 5 10 SUPPLY VOLTAGE (±V) 15 20 12 8 4 0 0 Figure 3. Input Voltage Swing vs. Supply Voltage 10 SUPPLY VOLTAGE (V) 15 20 Figure 6. Quiescent Current vs. Supply Voltage 20 10–6 RL = 2kΩ TA = 25°C 10–7 15 INPUT BIAS CURRENT (A) OUTPUT VOLTAGE SWING (V) 5 00824-006 QUIESCENT CURRENT (mA) 15 00824-003 INPUT VOLTAGE SWING (V) RL = 2kΩ TA = 25°C +VOUT 10 –VOUT 5 10–8 10–9 10–10 0 5 10 SUPPLY VOLTAGE (±V) 15 20 10–12 –60 00824-004 0 Figure 4. Output Voltage Swing vs. Supply Voltage –20 0 20 40 60 80 TEMPERATURE (°C) 100 120 140 Figure 7. Input Bias Current vs. Temperature 30 100 OUTPUT IMPEDANCE (Ω) 25 20 ±15V SUPPLIES 15 10 10 1 0.1 0 10 100 1k LOAD RESISTANCE (Ω) 10k 0.01 1k Figure 5. Output Voltage Swing vs. Load Resistance 10k 100k FREQUENCY (Hz) 1M Figure 8. Output Impedance vs. Frequency, G = 1 Rev. F | Page 6 of 20 10M 00824-008 5 00824-005 OUTPUT VOLTAGE SWING (V p-p) –40 00824-007 10–11 AD713 50 100 100 80 80 60 60 40 40 30 20 GAIN PHASE 2kΩ||100pF LOAD 20 10 0 0 –5 0 5 COMMON-MODE VOLTAGE (V) 10 –20 10 00824-009 0 –10 100 1k 10k 100k FREQUENCY (Hz) –20 10M 125 26 RL = 2kΩ TA = 25°C +OUTPUT CURRENT 24 120 OPEN-LOOP GAIN (dB) 22 –OUTPUT CURRENT 20 18 16 14 115 110 105 –20 0 20 40 60 80 100 AMBIENT TEMPERATURE (°C) 120 140 95 00824-010 –40 0 5 10 SUPPLY VOLTAGE (V) 15 20 00824-013 100 12 10 –60 Figure 13. Open-Loop Gain vs. Supply Voltage Figure 10. Short-Circuit Current Limit vs. Temperature 110 5.0 POWER SUPPLY REJECTION (dB) 100 4.5 4.0 3.5 +SUPPLY 80 60 –SUPPLY 40 20 3.0 –60 –40 –20 0 20 40 60 80 TEMPERATURE (°C) 100 120 140 0 10 100 1k 10k 100k SUPPLY MODULATION FREQUENCY (Hz) Figure 14. Power Supply Rejection vs. Frequency Figure 11. Gain Bandwidth vs. Temperature Rev. F | Page 7 of 20 1M 00824-014 VS = ±15V SUPPLIES WITH 1V p-p SINE WAVE 25°C 00824-011 UNITY GAIN BANDWIDTH (MHz) 1M Figure 12. Open-Loop Gain and Phase Margin vs. Frequency Figure 9. Input Bias Current vs. Common Mode Voltage SHORT CIRCUIT CURRENT LIMIT (mA) 20 00824-012 OPEN-LOOP GAIN (dB) INPUT BIAS CURRENT (pA) 40 PHASE MARGIN (Degrees) VS = ±15V TA = 25°C AD713 100 70 VS = ±15V VCM = 1V p-p TA = 25°C 80 3V RMS RL = 2kΩ CL = 100pF 80 THD (dB) CMR (dB) 90 60 40 100 110 20 1k 10k FREQUENCY (Hz) 100k 1M 130 100 100k Figure 18. Total Harmonic Distortion vs. Frequency 1k 25 INPUT NOISE VOLTAGE (nV/ Hz) RL = 2kΩ TA = 25°C VS = ±15V 20 15 10 5 1M INPUT FREQUENCY (Hz) 10M 10 1 00824-016 0 100k 100 1 10 100 1k FREQUENCY (Hz) 10k 100k 00824-019 30 Figure 19. Input Noise Voltage Spectral Density Figure 16. Large Signal Frequency Response 10 25 8 20 6 2 1% 0.1% SLEW RATE (V/µs) 4 0.01% 0 –2 ERROR 1% 0.1% 0.01% –4 15 10 5 –6 –8 0.6 0.7 0.8 SETTLING TIME (µs) 0.9 1.0 0 00824-017 –10 0.5 Figure 17. Output Swing and Error vs. Settling Time 0 100 200 300 400 500 600 700 INPUT ERROR SIGNAL (mV) (AT SUMMING JUNCTION) Figure 20. Slew Rate vs. Input Error Signal Rev. F | Page 8 of 20 800 900 00824-020 OUTPUT VOLTAGE (V p-p) 10k FREQUENCY (Hz) Figure 15. Common-Mode Rejection vs. Frequency OUTPUT SWING FROM 0V TO FINAL ±VOLTS 1k 00824-018 100 00824-015 0 10 120 AD713 –70 –80 1 14 2 CROSSTALK (dB) –90 1 3 13 4 12 4 –100 5 10 2 6 –110 3 100 • • • • 1 TO 4 1 TO 2 1 TO 3 11 • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • 90 9 7 8 –120 –130 100 1k FREQUENCY (Hz) 10k 100k 00824-022 –140 10 • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • 100 • • • • 90 • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • 0% • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • 1µs 50mV • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • Figure 25. Unity Gain Inverter Pulse Response—Small Signal (see Figure 28) 90 100ns 00824-026 10 50mV 200ns 00824-028 • • • • 00824-024 • • • • Figure 22. Unity Gain Follower Pulse Response—Large Signal (see Figure 27 for Test Circuit) 0% • • • • • • • • 10 • • • • 5V 100 • • • • • • • • 90 10 0% • • • • 1µs Figure 24. Unity Gain Inverter Pulse Response—Small Signal (see Figure 28) Figure 21. Crosstalk vs. Frequency (see Figure 26 for Test Circuit) 100 • • • • 5V 00824-027 10 0% • • • • Figure 23. Unity Gain Follower Pulse Response—Small Signal (see Figure 27) Rev. F | Page 9 of 20 AD713 TEST CIRCUITS 9kΩ 0.1µF AD713 INPUT SIGNAL OR GROUND* 1kΩ OUTPUT ALL 4 AMPLIFIERS ARE CONNECTED AS SHOWN. COM 0.1µF + 1µF AD713 PIN 4 +VS + 1µF 1µF 1/4 AD713 PIN 11 –VS AD713 SQUARE WAVE INPUT 00824-021 * THE SIGNAL INPUT (1kHz SINEWAVE, 2V p-p) IS APPLIED TO ONE AMPLIFIER AT A TIME. THE OUTPUTS OF THE OTHER THREE AMPLIFIERS ARE THEN MEASURED FOR CROSSTALK. Figure 26. Crosstalk Test Circuit for Figure 21 RL 2kΩ 11 VIN –VS + 1µF 2kΩ +VS + 1µF 2kΩ 1/4 SQUARE WAVE INPUT 0.1µF CL 10pF VOUT Figure 27. Unity Gain Follower Circuit for Figure 22 and Figure 23 7.5pF VIN 0.1µF 4 0.1µF 4 AD713 RL 2kΩ 11 –VS + 1µF CL 10pF VOUT 0.1µF Figure 28. Unity Gain Inverter Circuit for Figure 24 and Figure 25 Rev. F | Page 10 of 20 00824-025 1/4 + 00824-023 +VS 1kΩ AD713 THEORY OF OPERATION MEASURING AD713 SETTLING TIME Figure 30 and Figure 31 show the dynamic response of the AD713 while operating in the settling time test circuit of Figure 29. The input of the settling time fixture is driven by a flat-top pulse generator. The error signal output from the false summing node of A1, the AD713 under test, is clamped, amplified by Op Amp A2, and then clamped again. TO TEKTRONIX 7A26 OSCILLOSCOPE PREAMP INPUT SECTION (VIA LESS THAN 1FT 50Ω COAXIAL CABLE) 5pF 20pF 5V 100 • • • • + A2 2× HP2835 1MΩ The error signal is thus clamped twice: once to prevent overloading amplifier A2 and then a second time to avoid overloading the oscilloscope preamp. A Tektronix oscilloscope preamp Type 7A26 was carefully chosen because it recovers from the approximately 0.4 V overload quickly enough to allow accurate measurement of the AD713 1 μs settling time. Amplifier A2 is a very high speed FET input op amp; it provides a voltage gain of 10, amplifying the error signal output of the AD713 under test (providing an overall gain of 5). VERROR × 5 206Ω 0.47µF • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • 90 2× HP2835 0.47µF –VS +VS 10kΩ 5mV 4.99kΩ 200Ω 10kΩ 5pF TO 18pF FLAT-TOP PULSE GENERATOR VIN 1/4 10kΩ AD713 * POWER SUPPLY BYPASSING + 1µF 5kΩ 4 11 0.1µF 1µF + 10pF 00824-029 + 0.1µF –VS +VS Figure 29. Settling Time Test Circuit 5V • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • 500ns Figure 31. Settling Characteristics to –10 V Step, Upper Trace: Output of AD713 Under Test (5 V/div), Lower Trace: Amplified Error Voltage (0.01%/div) *USE VERY SHORT CABLE OR TERMINATION RESISTOR A1 DATA DYNAMICS 5109 OR EQUIVALENT 100 • • • • 0% • • • • • • • • 90 The power supply connections to the AD713 must maintain a low impedance to ground over a bandwidth of 4 MHz or more. This is especially important when driving a significant resistive or capacitive load because all current delivered to the load comes from the power supplies. Multiple high quality bypass capacitors are recommended for each power supply line in any critical application. As shown in Figure 32, a 0.1 μF ceramic and a 1 μF electrolytic capacitor placed as close as possible to the amplifier (with short lead lengths to power supply common) assures adequate high frequency bypassing in most applications. A minimum bypass capacitance of 0.1 μF should be used for any application. +VS + 1/4 1µF 0.1µF 1µF 0.1µF 4 AD713 11 10 • • • • 5mV • • • • • • • • • • • • • • • • • • • • • • • • • • • • 500ns –VS + 00824-032 • • • • 00824-030 0% • • • • 00824-031 0.2pF TO 0.8pF 4.99kΩ 10 NOTES 1. USE CIRCUIT BOARD WITH GROUND PLANE. 1.1kΩ Figure 32. Recommended Power Supply Bypassing Figure 30. Settling Characteristics 0 V to 10 V Step, Upper Trace: Output of AD713 Under Test (5 V/div), Lower Trace: Amplified Error Voltage (0.01%/div) Rev. F | Page 11 of 20 AD713 A HIGH SPEED INSTRUMENTATION AMPLIFIER CIRCUIT A HIGH SPEED 4-OP-AMP CASCADED AMPLIFIER CIRCUIT The instrumentation amplifier circuit shown in Figure 33 can provide a range of gains from unity up to 1000 and higher using only a single AD713. The circuit bandwidth is 1.2 MHz at a gain of 1 and 250 kHz at a gain of 10; settling time for the entire circuit is less than 5 μs to within 0.01% for a 10 V step, (G = 10). Other uses for Amplifier A4 include an active data guard and an active sense input. Figure 35 shows how the four amplifiers of the AD713 can be connected in cascade to form a high gain, high bandwidth amplifier. This gain of 100 amplifier has a −3 dB bandwidth greater than 600 kHz. AD713 3 A1 3 5 7 1/4 6 AD713 *1.5pF TO 20pF (TRIM FOR BEST SETTLING TIME) 1 4 1 2 1kΩ SENSE A3 10 AD713 1kΩ 10kΩ** 10kΩ –VS 8 100kΩ +VS OPTIONAL VOS ADJUSTMENT 1/4 5pF AD713 OUTPUT 1µF –VS + 0.1µF 4-OP-AMP CASCADED AMPLIFIER GAIN = 100 BANDWIDTH (–3dB) = 632kHz Figure 35. High Speed 4-Op-Amp Cascaded Amplifier Circuit TO SPECTRUM ANALYZER 5 13 AD713 12 1/4 AD713 +VS 0.1µF COM 0.1µF + + ERROR SIGNAL OUTPUT (ERROR/11) TO BUFFERED VOLTAGE REFERENCE OR REMOTE GROUND SENSE A4 14 1/4 100kΩ AD713 PIN 4 1µF 1µF AD713 PIN 11 –VS * VOLTRONICS SP20 TRIMMER CAPACITOR OR EQUIVALENT ** RATIO MATCHED 1% METAL FILM RESISTORS NULL ADJUST 1kΩ + 1µF 1kΩ LOW DISTORTION SINEWAVE INPUT 1/4 AD713 Table 4 provides a performance summary for this circuit. Figure 34 shows the pulse response of this circuit for a gain of 10. –VS Settling Time (0.01%) 2 μs 2 μs 2 μs NC = no connect. 5V • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • 100pF + 1µF 0.1µF Figure 36. THD Test Circuit Table 4. Performance Summary for the High Speed Instrumentation Amplifier Circuit 100 • • • • 0.1µF 4 11 Bandwidth 1.2 MHz 1.0 MHz 0.25 MHz 10kΩ +VS Figure 33. High Speed Instrumentation Amplifier Circuit RG NC1 20 kΩ 4.04 kΩ 10kΩ 00824-036 7 00824-033 A2 • • • • HIGH SPEED OP AMP APPLICATIONS AND TECHNIQUES DAC Buffers (I-to-V Converters) The wide input dynamic range of JFET amplifiers makes them ideal for use in both waveform reconstruction and digital audio DAC applications. The AD713, in conjunction with a 16-bit DAC, can achieve 0.0016% THD without requiring the use of a deglitcher in digital audio applications. 90 Driving the Analog Input of an Analog-to-Digital Converter 10 An op amp driving the analog input of an analog-to-digital converter (ADC), such as that shown in Figure 37, must be capable of maintaining a constant output voltage under dynamically changing load conditions. In successive approximation converters, the input current is compared to a series of switched trial currents. The comparison point is diode clamped but may vary by several hundred millivolts, resulting in high frequency modulation of the analog-to-digital input current. The output impedance of a feedback amplifier is made artificially low by its 0% • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • 2µs • • • • 00824-034 1 11 2.15kΩ 1kΩ 6 Gain 1 2 10 13 1kΩ 9 10kΩ** 7.5pF 14 1/4 22MΩ 10kΩ** RG 9 12 2.15kΩ 10kΩ** 7.5pF +IN 1/4 2.15kΩ 2 10kΩ 8 AD713 2.15kΩ 1/4 AD713 10 00824-035 1/4 0.1µF 1µF INPUT 20,000 +1 RG CIRCUIT GAIN = –IN +VS Figure 34. Pulse Response of High Speed Instrumentation Amplifier, Gain = 10 Rev. F | Page 12 of 20 AD713 loop gain. At high frequencies, where the loop gain is low, the amplifier output impedance can approach its open-loop value. GAIN ADJUST +15V 0.1µF R2 100Ω R1 100Ω 4 ±10V ANALOG INPUT 11 OFFSET ADJUST 2 12/8 3 CS DB10 26 4 AO DB9 25 5 R/C DB8 24 6 DB7 23 7 CE VCC 8 REF OUT DB5 21 9 AC DB4 20 REF IN 11 VEE DB3 19 (MSB) DB11 DB2 18 13 BIP OFF DB1 17 10V IN (LSB) DB0 16 14 20V IN DC 15 00824-039 • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • 200ns The circuit of Figure 40 uses a 100 Ω isolation resistor that enables the amplifier to drive capacitive loads exceeding 1500 pF; the resistor effectively isolates the high frequency feedback from the load and stabilizes the circuit. Low frequency feedback is returned to the amplifier summing junction via the low-pass filter formed by the 100 Ω series resistor and the load capacitance, CL. Figure 41 shows a typical transient response for this connection. 4.99kΩ 30pF +VS • • • • INPUT RL 2kΩ 10kΩ 20kΩ 90 0.1µF 4.99kΩ TYPICAL CAPACITANCE LIMIT FOR VARIOUS LOAD RESISTORS • • • • –5V ADC IN Driving A Large Capacitive Load AD713 BUFF • • • • • • • • Figure 39. Buffer Recovery Time Sink Current = 1 mA Most IC amplifiers exhibit a minimum open-loop output impedance of 25 Ω, due to current limiting resistors. A few hundred microamps reflected from the change in converter loading can introduce errors in instantaneous input voltage. If the analogto-digital conversion speed is not excessive and the bandwidth of the amplifier is sufficient, the amplifier output returns to the nominal value before the converter makes its comparison. However, many amplifiers have relatively narrow bandwidths, yielding slow recovery from output transients. The AD713 is ideally suited as a driver for ADCs because it offers both a wide bandwidth and a high open-loop gain. • • • • • • • • 500mV Figure 37. AD713 as an ADC Buffer • • • • • • • • LOW BITS –15V • • • • • • • • 10 0% • • • • AD713 100 • • • • • • • • MIDDLE BITS ANALOG COM 1mV • • • • HIGH BITS 0.1µF 1/4 • • • • 90 27 DB6 22 10 12 100 • • • • STS 28 00824-041 TOP VIEW (Not to Scale) VLOGIC AD713 BUFF 4 1/4 11 CL UP TO 1500pF 1500pF 1000pF OUTPUT 100Ω AD713 CL 0.1µF RL 00824-042 AD574A 1 1mV –VS Figure 40. Circuit for Driving a Large Capacitance Load 5V 100 • • • • 10 1µs • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • 90 • • • • • • • • • • • • • • • • 500mV • • • • • • • • • • • • 10V ADC IN • • • • • • • • 200ns 00824-040 0% • • • • Figure 38. Buffer Recovery Time Source Current = 2 mA 10 00824-043 0% • • • • Figure 41. Transient Response, RL = 2 kΩ, CL = 500 pF Rev. F | Page 13 of 20 AD713 GAIN ADJUST VIN GAIN ADJUST VIN R1* 19 20 VDD RFB VREF AD7545 AD713 AGND 2 11 ANALOG COMMON –15V For the state variable or universal filter configuration of Figure 44 to function properly, DAC A1 and DAC B1 must control the gain and Q of the filter characteristic, and DAC A2 and DAC B2 must accurately track for the simple expression of fC to be true. This is readily accomplished using two AD7528 DACs and one AD713 quad op amp. Capacitor C3 compensates for the effects of op amp gain bandwidth limitations. This filter provides low-pass, high-pass, and band-pass outputs and is ideally suited for applications where microprocessor control of filter parameters is required. The programmable range for component values shown is fC = 0 kHz to 15 kHz and Q = 0.3 to 4.5. 1/4 R4 20kΩ 1% +15V 0.1µF 4 AD713 R5 20kΩ 1% R3 10kΩ 1% 1/4 AD713 11 3 VOUT 0.1µF ANALOG COMMON *REFER TO TABLE 5. Figure 43. Bipolar Operation Rev. F | Page 14 of 20 –15V 00824-045 12 DATA INPUT DB11 TO DB0 VOUT 0.1µF A Programmable State Variable Filter AGND 2 DGND 4 FILTER APPLICATIONS C1 33pF OUT1 1 1/4 Figure 42. Unipolar Binary Operation R2* 18 OUT1 1 AD7545 DB11 TO DB0 GLN/GCQ 20 Ω 6.8 Ω VDD RFB *REFER TO TABLE 5. Table 5. Recommended Trim Resistor Values vs. Grades for AD7545 for VD = 5 V LN/CQ 100 Ω 33 Ω VDD VREF 3 Figure 42 and Figure 43 show the AD713 and a 12-bit CMOS DAC, the AD7545, configured for either a unipolar binary (twoquadrant multiplication) or bipolar (four-quadrant multiplication) operation. Capacitor C1 provides phase compensation, which reduces overshoot and ringing. KN/BQ 200 Ω 68 Ω 20 DGND For example, the output resistance of the AD7545 modulates between 11 kΩ and 33 kΩ. Therefore, with the DAC’s internal feedback resistance of 11 kΩ, the noise gain varies from 2 to 4/3. This changing noise gain modulates the effect of the input offset voltage of the amplifier, resulting in nonlinear DAC amplifier performance. The AD713, with its guaranteed 1.5 mV input offset voltage, minimizes this effect, achieving 12-bit performance. JN/AQ 500 Ω 150 Ω 19 R1* C1 +15V 0.1µF 33pF 18 00824-044 The AD713 is an excellent output amplifier for CMOS DACs. It can be used to perform both two- and four-quadrant operation. The output impedance of a DAC using an inverted R-2R ladder approaches R for codes containing many 1s, 3R for codes containing a single 1, and infinity for codes containing all 0s. Trim Resistor R1 R2 R2* VDD CMOS DAC APPLICATIONS AD713 R5 30kΩ 1µF R4 30kΩ + 2 R3 10kΩ 4 A1 3 1 6 A2 1/4 5 AD713 9 HIGH PASS OUTPUT 7 A3 1/4 2 17 VIN 20 19 VDD 18 AD7528 A4 8 12 1/4 2 18 7 DB0 TO DB7 DATA 1 DAC B1 RF 15 CS 16 5 6 14 7 DB0 TO DB7 WR DAC A/ DACB DAC B2 R2 AD7528 15 DATA 2 fC = 1 2π R1 C1 Q= R3 RF × R4 RFBB1 AO = – RF RS 5 16 CS 1/4 AD713 BAND PASS OUTPUT 1 DAC A2 R1 14 –VS 20 17 DAC A1 RS 14 11 LOW PASS OUTPUT + 1µF 1 4 C1 = C2, R1 = R2, R4 = R5 AD713 4 CIRCUIT EQUATIONS 13 10 AD713 VDD C2 1000pF C1 1000pF C3 33pF 6 DAC EQUIVALENT RESISTANCE EQUALS 256 × (DAC LADDER RESISTANCE) DAC DIGITAL CODE WR DAC A/ DAC B 00824-046 +VS Figure 44. A Programmable State Variable Filter Circuit The closely matched and uniform ac characteristics of the AD713 make it ideal for use in generalized impedance converter (GIC)/ gyrator and frequency dependent negative resistor (FDNR) filter applications. Figure 47 and Figure 48 show the AD713 used in two typical active filters. The first shows a single AD713 simulating two coupled inductors configured as a one-third octave band-pass filter. A single section of this filter meets ANSI Class II specifications and handles a 7.07 V rms signal with