AD8671ARZ-REEL

Precision, Very Low Noise, Low Input Bias Current Operational Amplifiers AD8671/AD8672/AD8674 FEATURES Very low noise: 2.8 nV/√Hz, 77 nV p-p Wide bandwidth: 10 MHz Low input bias current: 12 nA max Low offset voltage: 75 μV max High open-loop gain: 120 dB min Low supply current: 3 mA per amplifier Dual-supply operation: ±5 V to ±15 V Unity-gain stable No phase reversal NC 1 –IN 2 +IN 3 PIN CONFIGURATIONS 8 NC V+ 03718-B-001 NC 1 –IN 2 +IN 3 8 NC AD8671 7 NC = NO CONNECT NC = NO CONNECT Figure 1. 8-Lead SOIC_N (R-8) Figure 2. 8-Lead MSOP (RM-8) OUT A 1 –IN A 2 8 V+ OUT B 03718-B-003 OUT A 1 –IN A 2 +IN A 3 8 V+ AD8672 7 PLL filters Filters for GPS Instrumentation Sensors and controls Professional quality audio Figure 3. 8-Lead SOIC-N (R-8) Figure 4. 8-Lead MSOP (RM-8) OUT A 1 –IN A 2 14 OUT D 13 –IN D OUT A 1 –IN A 2 +IN A 3 V+ 4 14 OUT D 13 –IN D GENERAL DESCRIPTION The AD8671/AD8672/AD8674 are very high precision amplifiers featuring very low noise, very low offset voltage and drift, low input bias current, 10 MHz bandwidth, and low power consumption. Outputs are stable with capacitive loads of over 1000 pF. Supply current is less than 3 mA per amplifier at 30 V. The AD8671/AD8672/AD8674’s combination of ultralow noise, high precision, speed, and stability is unmatched. The MSOP version of the AD8671/AD8672 requires only half the board space of comparable amplifiers. Applications for these amplifiers include high quality PLL filters, precision filters, medical and analytical instrumentation, precision power supply controls, ATE, data acquisition, and precision controls as well as professional quality audio. The AD8671/AD8672/AD8674 are specified over the extended industrial temperature range (–40°C to +125°C). The AD8671/AD8672 are available in the 8-lead SOIC and 8-lead MSOP packages. The AD8674 is available in 14-lead SOIC and 14-lead TSSOP packages. Surface-mount devices in MSOP packages are available in tape and reel only. +IN A 3 V+ 4 AD8674 12 +IN D AD8674 12 +IN D TOP VIEW 11 V– +IN B 5 (Not to Scale) 10 +IN C 03718-B-005 TOP VIEW 11 V– +IN B 5 (Not to Scale) 10 +IN C –IN B 6 OUT B 7 9 8 –IN B 6 OUT B 7 9 8 –IN C OUT C –IN C OUT C Figure 5. 14-Lead SOIC_N (R-14) Figure 6. 14-Lead TSSOP (RU-14) Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved. 03718-B-006 03718-B-004 APPLICATIONS +IN A 3 TOP VIEW 6 –IN B (Not to Scale) 5 +IN B V– 4 OUT B TOP VIEW 6 –IN B (Not to Scale) 5 +IN B V– 4 7 AD8672 03718-B-002 TOP VIEW 6 OUT (Not to Scale) V– 4 5 NC V+ TOP VIEW 6 OUT (Not to Scale) V– 4 5 NC 7 AD8671 AD8671/AD8672/AD8674 TABLE OF CONTENTS Specifications..................................................................................... 3 Electrical Characteristics, ±5.0 V ............................................... 3 Electrical Characteristics, ±15 V ................................................ 4 Absolute Maximum Ratings............................................................ 5 ESD CAUTION ............................................................................ 5 Typical Performance Characteristics ............................................. 6 Applications..................................................................................... 11 Unity-Gain Follower Applications ........................................... 11 Output Phase Reversal............................................................... 11 Total Noise vs. Source Resistance............................................. 11 Total Harmonic Distortion (THD) and Noise ....................... 12 Driving Capacitive Loads.......................................................... 12 GPS Receiver............................................................................... 13 Band-Pass Filter.......................................................................... 13 PLL Synthesizers and Loop Filters ........................................... 13 Outline Dimensions ....................................................................... 14 Ordering Guide .......................................................................... 16 REVISION HISTORY 6/05—Rev. B to Rev. C Changes to Figure 6...................................................................... 1 Updated Outline Dimensions ................................................... 14 Changes to Ordering Guide ...................................................... 16 4/04—Rev. A to Rev. B Changes to Figure 32.................................................................. 11 Changes to Figures 36, 37, and 38 ............................................ 12 1/04—Rev. 0 to Rev. A Added AD8672 and AD8674 parts ..............................Universal Changes to Specifications ............................................................ 3 Deleted Figure 3............................................................................ 6 Changes to Figures 7, 8, and 9 .................................................... 6 Changes to Figure 37.................................................................. 12 Added new Figure 32 ................................................................. 10 Rev. C | Page 2 of 16 AD8671/AD8672/AD8674 SPECIFICATIONS ELECTRICAL CHARACTERISTICS, ±5.0 V VS = ±5.0 V, VCM = 0 V, TA = 25°C, unless otherwise noted. Table 1. Parameter INPUT CHARACTERISTICS Offset Voltage Offset Voltage Drift AD8671 AD8672/AD8674 Input Bias Current Symbol VOS ∆VOS/∆T –40°C < TA < +125°C –40°C < TA < +125°C Conditions Min Typ 20 30 0.3 0.3 +3 +5 +8 +6 +6 +8 120 6000 6.25 7.5 3.5 15 +4.0 –3.9 +3.9 –3.8 ±10 Max 75 125 0.5 0.8 +12 +20 +40 +12 +20 +40 +2.5 Unit μV μV μV/°C μV/°C nA nA nA nA nA nA V dB V/mV pF pF GΩ MΩ V V V V mA IB +25°C < TA < +125°C –40°C < TA < +125°C Input Offset Current IOS +25°C < TA < +125°C –40°C < TA < +125°C Input Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain Input Capacitance, Common Mode Input Capacitance, Differential Mode Input Resistance, Common Mode Input Resistance, Differential Mode OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Output Voltage High Output Voltage Low Output Current POWER SUPPLY Power Supply Rejection Ratio AD8671/AD8672 AD8674 Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Settling Time Gain Bandwidth Product NOISE PERFORMANCE Peak-to-Peak Noise Voltage Noise Density Current Noise Density Channel Separation AD8672/AD8674 CMRR AVO CINCM CINDM RIN RINDM VOH VOL VOH VOL IOUT PSRR VCM = –2.5 V to +2.5 V RL = 2 kΩ, VO = –3 V to +3 V –12 –20 –40 –12 –20 –40 –2.5 100 1000 RL = 2 kΩ, –40°C to +125°C RL = 2 kΩ, –40°C to +125°C RL = 600 Ω RL = 600 Ω +3.8 +3.7 –3.8 –3.7 VS = ±4 V to ±18 V 110 106 130 115 3 dB dB mA mA V/μs μs μs MHz 100 3.8 nV p-p nV/√Hz pA/√Hz dB dB ISY VO = 0 V –40°C < TA < +125°C RL = 2 kΩ To 0.1% (4 V step, G = 1) To 0.01% (4 V step, G = 1) 3.5 4.2 SR tS GBP en p-p en in CS 4 1.4 5.1 10 77 2.8 0.3 –130 –105 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz f = 1 kHz f = 10 kHz Rev. C | Page 3 of 16 AD8671/AD8672/AD8674 ELECTRICAL CHARACTERISTICS, ±15 V VS = ±15 V, VCM = 0 V, TA = 25°C, unless otherwise noted. Table 2. Parameter INPUT CHARACTERISTICS Offset Voltage Offset Voltage Drift AD8671 AD8672/AD8674 Input Bias Current Symbol VOS ∆VOS/∆T –40°C < TA < +125°C –40°C < TA < +125°C Conditions Min Typ 20 30 0.3 0.3 +3 +5 +8 +6 +6 +8 120 6000 6.25 7.5 3.5 15 +13.8 –13.8 +12.3 –12.4 ±20 ±30 Max 75 125 0.5 0.8 +12 +20 +40 +12 +20 +40 +12 Unit μV μV μV/°C μV/°C nA nA nA nA nA nA V dB V/mV pF pF GΩ MΩ V V V V mA mA IB +25°C < TA < +125°C –40°C < TA < +125°C Input Offset Current IOS +25°C < TA < +125°C –40°C < TA < +125°C Input Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain Input Capacitance, Common Mode Input Capacitance, Differential Mode Input Resistance, Common Mode Input Resistance, Differential Mode OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Output Voltage High Output Voltage Low Output Current Short Circuit Current POWER SUPPLY Power Supply Rejection Ratio AD8671/AD8672 AD8674 Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Settling Time Gain Bandwidth Product NOISE PERFORMANCE Peak-to-Peak Noise Voltage Noise Density Current Noise Density Channel Separation AD8672/AD8674 CMRR AVO CINCM CINDM RIN RINDM VOH VOL VOH VOL IOUT ISC PSRR VCM = –12 V to +12 V RL = 2 kΩ, VO = –10 V to +10 V –12 –20 –40 –12 –20 –40 –12 100 1000 RL = 2 kΩ, –40°C to +125°C RL = 2 kΩ, –40°C to +125°C RL = 600 Ω RL = 600 Ω +13.2 +11 –13.2 –11 VS = ±4 V to ±18 V 110 106 130 115 3 dB dB mA mA V/μs μs μs MHz 100 3.8 nV p-p nV/√Hz pA/√Hz dB dB ISY VO = 0 V –40°C 1 V) are applied at the positive terminal of amplifiers (such as the OP27, LT1007, OPA227, and AD8671) with back-to-back diodes at the input stage, the use of a resistor in the feedback loop is recommended to avoid having the amplifier load the signal generator. The feedback resistor, RF, should be at least 500 Ω. However, if large values must be used for RF, a small capacitor, CF, should be inserted in parallel with RF to compensate for the pole introduced by the input capacitance and RF. Figure 32 shows the uncompensated output response with a 10 kΩ resistor in the feedback and the compensated response with CF = 15 pF. OUTPUT UNCOMPENSATED OUTPUT COMPENSATED REF1 +OVER 23.23% CH2 +OVER 7.885% VIN VSY = ±15V VOLTAGE (1V/DIV) VOUT TIME (10μs/DIV) Figure 33. Output Phase Reversal TOTAL NOISE VS. SOURCE RESISTANCE The low input voltage noise of the AD8671/AD8672/AD8674 makes them a great choice for applications with low source resistance. However, because they have low input current noise, they can also be used in circuits with substantial source resistance. Figure 34 shows the voltage noise, current noise, thermal noise, and total rms noise of the AD8671 as a function of the source resistance. 03718-B-032 VOLTAGE (1V/DIV) TIME (100ns/DIV) Figure 32. Transient Output Response For RS < 475 Ω, the input voltage noise, en, dominates. For 475 Ω < RS < 412 kΩ, thermal noise dominates. For RS > 412 kΩ, the input current noise dominates. 1000 OUTPUT PHASE REVERSAL TOTAL NOISE (nV/√Hz) Phase reversal is a change of polarity in the amplifier transfer function that occurs when the input voltage exceeds the supply voltage. The AD8671/AD8672/AD8674 do not exhibit phase reversal even when the input voltage is 1 V beyond the supplies. C 100 in 10 en_t A 1 10 100 1k 10k 100k 1M SOURCE RESISTANCE ( Ω) (4kR ST)1/2 B 03718-B-034 en Figure 34. Noise vs. Source Resistance Rev. C | Page 11 of 16 03718-B-033 AD8671/AD8672/AD8674 TOTAL HARMONIC DISTORTION (THD) AND NOISE The AD8671/AD8672/AD8674 exhibit low total harmonic distortion (THD) over the entire audio frequency range. This makes them suitable for applications with high closed-loop gains, including audio applications. Figure 35 shows approximately 0.0006% of THD + N in a positive unity gain, the worst-case configuration for distortion. 0.1000 0.0500 0.0200 0.0100 VS = ±5V VIN = 2.5V RL = 600Ω VOLTAGE (500mV/DIV) VSY = ±15V RL = 2kΩ CL = 1nF VIN = 100mV AV = +1 CH2 +OVER 39.80% CH2 –OVER 39.80% TIME (10μs/DIV) PERCENTAGE 0.0050 0.0020 0.0010 0.0005 0.0002 0.0001 20 03718-B-035 Figure 36. AD8671 Capacitive Load Drive RF LT1007 500Ω AD8671 RG 500Ω CF 220pF VCC RS 10Ω VIN VEE 50 100 200 500 Hz 1k 2k 5k 10k 20k CL 1nF Figure 35. Total Harmonic Distortion and Noise DRIVING CAPACITIVE LOADS The AD8671/AD8672/AD8674 can drive large capacitive loads without causing instability. However, when configured in unity gain, driving very large loads can cause unwanted ringing or instability. Figure 36 shows the output of the AD8671 with a capacitive load of 1 nF. If heavier loads are used in low closed-loop gain or unity-gain configurations, it is recommended to use external compensation as shown in the circuit in Figure 37. This technique reduces the overshoot and prevents the op amp from oscillation. The trade-off of this circuit is a reduction in output swing. However, a great added benefit stems from the fact that the input signal and the op amp’s noise are filtered, and thus the overall output noise is kept to a minimum. The output response of the circuit is shown in Figure 38. VOLTAGE (100mV/DIV) Figure 37. Recommended Capacitive Load Circuit VSY = ±15V RL = 2kΩ CL = 1nF CF = 220pF VIN = 100mV AV = +2 CH2 +OVER 5.051% CH2 –OVER 6.061% TIME (10μs/DIV) Figure 38. Compensated Load Drive Rev. C | Page 12 of 16 03718-B-038 03718-B-037 RL 2kΩ 03718-B-036 AD8671/AD8672/AD8674 ADC LOW NOISE OP AMP BAND-PASS FILTER MIXER DEMODULATOR LOW-PASS FILTER VGA AD8671 AD8671 AD831 AD630 AD8610 AD8369 AD10200 CODE GENERATOR Figure 39. Simplified Block Diagram of a GPS Receiver GPS RECEIVER GPS receivers require low noise to minimize RF effects. The precision of the AD8671 makes it an excellent choice for such applications. Its very low noise and wide bandwidth make it suitable for band-pass and low-pass filters without the penalty of high power consumption. Figure 39 shows a simplified block diagram of a GPS receiver. The next section details the design equations. The band-pass response is shown in Figure 41. VS = ±15V BAND-PASS FILTER Filters are useful in many applications; for example, band-pass filters are used in GPS systems, as discussed in the previous section. Figure 40 shows a second-order band-pass KRC filter. R3 2.25kΩ VCC 200μV/DIV 03718-B-039 100 1k 10k Hz 100k 1M 10M Figure 41. Band-Pass Response R1 2.25kΩ VIN C2 1nF C2 1nF R2 2.25kΩ PLL SYNTHESIZERS AND LOOP FILTERS Phase-lock loop filters are used in AM/FM modulation. RB 18kΩ VEE RA 10kΩ 03718-B-040 Figure 40. Band-Pass KRC Filter The equal component topology yields a center frequency fo = 2 2πRC 2 4−K Loop filters in PLL design require accuracy and care in their implementation. The AD8671/AD8672/AD8674 are ideal candidates for such filter design; the low offset voltage and low input bias current minimize the output error. In addition to the excellent dc specifications, the AD8671/AD8672/AD8674 have a unique performance at high frequencies; the high open-loop gain and wide bandwidth allow the user to design a filter with a high closed-loop gain if desirable. To optimize the filter design, it is recommended to use small value resistors to minimize the thermal noise. A simple example is shown in Figure 42. R1 10kΩ VCC C1 1nF and Q = where: PHASE DETECTOR CHARGE PUMP VCO K =1+ IN Figure 42. PLL Filter Simplified Block Diagram Rev. C | Page 13 of 16 03718-B-042 RB RA D VEE 03718-B-041 AD8671/AD8672/AD8674 OUTLINE DIMENSIONS 5.00 (0.1968) 4.80 (0.1890) 8 5 4 4.00 (0.1574) 3.80 (0.1497) 1 6.20 (0.2440) 5.80 (0.2284) 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) 1.75 (0.0688) 1.35 (0.0532) 0.50 (0.0196) × 45° 0.25 (0.0099) 0.51 (0.0201) COPLANARITY SEATING 0.31 (0.0122) 0.10 PLANE 8° 0.25 (0.0098) 0° 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067) COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN Figure 43. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) 3.00 BSC 8 5 3.00 BSC 1 4.90 BSC 4 PIN 1 0.65 BSC 1.10 MAX 8° 0° 0.80 0.60 0.40 0.15 0.00 0.38 0.22 COPLANARITY 0.10 0.23 0.08 SEATING PLANE COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 44. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters Rev. C | Page 14 of 16 AD8671/AD8672/AD8674 8.75 (0.3445) 8.55 (0.3366) 14 1 8 7 4.00 (0.1575) 3.80 (0.1496) 6.20 (0.2441) 5.80 (0.2283) 0.25 (0.0098) 0.10 (0.0039) 1.27 (0.0500) BSC 1.75 (0.0689) 1.35 (0.0531) 0.50 (0.0197) × 45° 0.25 (0.0098) COPLANARITY 0.10 0.51 (0.0201) 0.31 (0.0122) SEATING PLANE 8° 0.25 (0.0098) 0° 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067) COMPLIANT TO JEDEC STANDARDS MS-012-AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN Figure 45. 14-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-14) Dimensions shown in millimeters and (inches) 5.10 5.00 4.90 14 8 4.50 4.40 4.30 1 7 6.40 BSC PIN 1 1.05 1.00 0.80 0.65 BSC 1.20 MAX 0.15 0.05 0.30 0.19 0.20 0.09 8° 0° 0.75 0.60 0.45 SEATING COPLANARITY PLANE 0.10 COMPLIANT TO JEDEC STANDARDS MO-153-AB-1 Figure 46. 14-Lead Thin Shrink Small Outline Package [TSSOP] (RU-14) Dimensions shown in millimeters Rev. C | Page 15 of 16 AD8671/AD8672/AD8674 ORDERING GUIDE Model AD8671AR AD8671AR-REEL AD8671AR-REEL7 AD8671ARZ 1 AD8671ARZ-REEL1 AD8671ARZ-REEL71 AD8671ARM-R2 AD8671ARM-REEL AD8671ARMZ-R21 AD8671ARMZ-REEL1 AD8672AR AD8672AR-REEL AD8672AR-REEL7 AD8672ARZ1 AD8672ARZ-REEL1 AD8672ARZ-REEL71 AD8672ARM-R2 AD8672ARM-REEL AD8672ARMZ-R21 AD8672ARMZ-REEL1 AD8674AR AD8674AR-REEL AD8674AR-REEL7 AD8674ARZ1 AD8674ARZ-REEL1 AD8674ARZ-REEL71 AD8674ARU AD8674ARU-REEL AD8674ARUZ1 AD8674ARUZ-REEL1 1 Temperature Range –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C Package Description 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead TSSOP 14-Lead TSSOP 14-Lead TSSOP 14-Lead TSSOP Package Option R-8 R-8 R-8 R-8 R-8 R-8 RM-8 RM-8 RM-8 RM-8 R-8 R-8 R-8 R-8 R-8 R-8 RM-8 RM-8 RM-8 RM-8 R-14 R-14 R-14 R-14 R-14 R-14 RU-14 RU-14 RU-14 RU-14 Branding BGA BGA A0V A0V BHA BHA A0W A0W Z = Pb-free part. © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D03718–0–6/05(C) Rev. C | Page 16 of 16