ADF7025BCPZ-RL7

High Performance ISM Band Transceiver IC ADF7025 Data Sheet FEATURES On-chip VCO and Fractional-N PLL On-chip, 7-bit ADC and temperature sensor Digital RSSI Integrated TRx switch Leakage current < 1 μA in power-down mode Low power, zero-IF RF transceiver Frequency bands 431 MHz to 464 MHz 862 MHz to 870 MHz 902 MHz to 928 MHz Data rates supported 9.6 kbps to 384 kbps, FSK 2.3 V to 3.6 V power supply Programmable output power −16 dBm to +13 dBm in 63 steps Receiver sensitivity −104.2 dBm at 38.4 kbps, FSK −100 dBm at 172.8 kbps, FSK −95.8 dBm at 384 kbps, FSK Low power consumption 19 mA in receive mode 28 mA in transmit mode (10 dBm output) APPLICATIONS Wireless audio/video Remote control/security systems Wireless metering Keyless entry Home automation FUNCTIONAL BLOCK DIAGRAM RLNA RSET CREG(1:4) BIAS LDO(1:4) ADCIN MUXOUT TEMP SENSOR OFFSET CORRECTION TEST MUX LNA RFIN MUX RSSI LP FILTER RFINB 7-BIT ADC FSK DEMODULATOR DATA SYNCHRONIZER GAIN OFFSET CORRECTION CE AGC CONTROL FSK MOD CONTROL DATA CLK Tx/Rx CONTROL DATA I/O Σ-∆ MODULATOR INT/LOCK DIVIDERS/ MUXING DIV P N/N+1 SLE SERIAL PORT VCO CP SREAD SCLK PFD DIV R VCOIN CPOUT SDATA RING OSC1 OSC OSC2 CLK DIV CLKOUT 05542-001 RFOUT Figure 1. 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Technical Support www.analog.com ADF7025 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Automatic Sync Word Recognition ......................................... 22 Applications ....................................................................................... 1 Applications Section....................................................................... 23 Functional Block Diagram .............................................................. 1 LNA/PA Matching ...................................................................... 23 Revision History ............................................................................... 2 Transmit Protocol and Coding Considerations ..................... 24 General Description ......................................................................... 3 Device Programming after Initial Power-Up ............................. 24 Specifications..................................................................................... 4 Interfacing to Microcontroller/DSP ........................................ 24 Timing Characteristics ..................................................................... 7 Serial Interface ................................................................................ 27 Timing Diagrams.......................................................................... 7 Readback Format........................................................................ 27 Absolute Maximum Ratings ............................................................ 9 Registers ........................................................................................... 28 ESD Caution .................................................................................. 9 Register 0—N Register............................................................... 28 Pin Configuration and Function Descriptions ........................... 10 Register 1—Oscillator/Filter Register ...................................... 29 Typical Performance Characteristics ........................................... 12 Register 2—Transmit Modulation Register ............................ 30 Frequency Synthesizer ................................................................... 15 Register 3—Receiver Clock Register ....................................... 31 Reference Input Section ............................................................. 15 Register 4—Demodulator Setup Register ............................... 32 Choosing Channels for Best System Performance ................. 17 Register 5—Sync Byte Register ................................................. 33 Transmitter ...................................................................................... 18 Register 6—Correlator/Demodulator Register ...................... 34 RF Output Stage .......................................................................... 18 Register 7—Readback Setup Register ...................................... 35 Modulation Scheme ................................................................... 18 Register 8—Power-Down Test Register .................................. 36 Receiver ............................................................................................ 19 Register 9—AGC Register ......................................................... 37 RF Front End ............................................................................... 19 Register 10—AGC 2 Register.................................................... 38 RSSI/AGC .................................................................................... 20 Register 12—Test Register......................................................... 39 FSK Demodulators on the ADF7025 ....................................... 20 Register 13—Offset Removal and Signal Gain Register ....... 40 FSK Correlator/Demodulator ................................................... 20 Outline Dimensions ....................................................................... 41 Linear FSK Demodulator .......................................................... 22 Ordering Guide .......................................................................... 41 REVISION HISTORY 9/2016—Rev. B to Rev. C Changes to General Description Section ...................................... 3 Changes to Interfacing to Microcontroller/DSP Section and Figure 34 ........................................................................................... 24 2/2006—Rev. 0 to Rev. A Replaced Figure 40 ................................................................ Page 29 1/2006—Revision 0: Initial Version 8/2012—Rev. A to Rev. B Changed CP-48-3 Package to CP-48-5 (Throughout) ................. 1 Added EPAD Notation to Figure 6............................................... 10 Updated Outline Dimensions ....................................................... 41 Changes to Ordering Guide .......................................................... 41 Rev. C | Page 2 of 41 Data Sheet ADF7025 GENERAL DESCRIPTION The ADF7025 is a low power, highly integrated FSK transceiver. It is designed for operation in the license–free ISM bands of 433 MHz, 863 MHz to 870 MHz, and 902 MHz to 928 MHz. The ADF7025 can be used for applications operating under the European ETSI EN300-220 or the North American FCC (Part 15) regulatory standards. The ADF7025 is intended for wideband, high data rate applications with deviation frequencies from 100 kHz to 750 kHz and data rates from 9.6 kbps to 384 kbps. A complete transceiver can be built using a small number of external discrete components, making the ADF7025 very suitable for price-sensitive and area-sensitive applications. The transmit section contains a VCO and low noise Fractional-N PLL with output resolution of