LT4356-1/LT4356-2
Surge Stopper
FEATURES
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DESCRIPTION
Stops High Voltage Surges
Adjustable Output Clamp Voltage
Overcurrent Protection
Wide Operation Range: 4V to 80V
Reverse Input Protection to –60V
Low 7µA Shutdown Current (LT4356-1)
Auxiliary Amplifier for Level Detection Comparator
or Linear Regulator Controller (LT4356-2)
Adjustable Fault Timer
Controls N-channel MOSFET
Shutdown Pin Withstands –60V to 100V
Fault Output Indication
Guaranteed Operation to 125°C
Available in (4mm × 3mm) 12-Pin DFN,
10-Pin MSOP or 16-Pin SO Packages
APPLICATIONS
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Automotive/Avionic Surge Protection
Hot Swap/Live Insertion
High Side Switch for Battery Powered Systems
Intrinsic Safety Applications
All registered trademarks and trademarks are the property of their respective owners. Protected
by U.S. patents, including XXXXX, XXXXX.
The LT®4356 surge stopper protects loads from high voltage
transients. It regulates the output during an overvoltage
event, such as load dump in automobiles, by controlling
the gate of an external N-channel MOSFET. The output is
limited to a safe value thereby allowing the loads to continue functioning. The LT4356 also monitors the voltage
drop between the VCC and SNS pins to protect against
overcurrent faults. An internal amplifier limits the current
sense voltage to 50mV. In either fault condition, a timer
is started inversely proportional to MOSFET stress. If the
timer expires, the FLT pin pulls low to warn of an impending power down. If the condition persists, the MOSFET is
turned off. After a cool down period, the GATE pin pulls
up turning on the MOSFET again.
The auxiliary amplifier may be used as a voltage detection
comparator or as a linear regulator controller driving an
external PNP pass transistor.
Back-to-back FETs can be used in lieu of a Schottky diode
for reverse input protection, reducing voltage drop and
power loss. A shutdown pin reduces the quiescent current
to less than 7µA for the LT4356-1 during shutdown. The
LT4356-2 differs from the LT4356-1 during shutdown by
reducing the quiescent current to 60µA and keeping alive
the auxiliary amplifier for uses such as an undervoltage
lockout or always-on regulator.
TYPICAL APPLICATION
4A, 12V Overvoltage Output Regulator
10mΩ
VIN
12V
VOUT
IRLR2908
80V INPUT SURGE
10Ω
383k
VCC
SNS
GATE
VIN
20V/DIV
OUT
FB
IN+
4.99k
EN
AOUT
GND
TMR
VCC
DC-DC
CONVERTER
LT4356DE
100k
CTMR = 6.8µF
ILOAD = 500mA
102k
SHDN
UNDERVOLTAGE
Overvoltage Protector Regulates Output at
27V During Transient
FLT
12V
VOUT
20V/DIV
SHDN GND
FAULT
4356 TA01
27V ADJUSTABLE CLAMP
12V
100ms/DIV
4356 TA01b
0.1µF
Rev. C
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1
LT4356-1/LT4356-2
ABSOLUTE MAXIMUM RATINGS (Notes 1 and 2)
VCC, SHDN................................................. –60V to 100V
SNS.............................. VCC – 30V or –60V to VCC + 0.3V
OUT, AOUT, FLT, EN...................................... –0.3V to 80V
GATE (Note 3)..................................–0.3V to VOUT + 10V
FB, TMR, IN+................................................. –0.3V to 6V
AOUT, EN, FLT, IN+...................................................–3mA
Operating Temperature Range
LT4356C.................................................... 0°C to 70°C
LT4356I................................................. –40°C to 85°C
LT4356H............................................. –40°C to 125°C
Storage Temperature Range
DE12................................................... –65°C to 125°C
MS, SO............................................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
MS, SO.............................................................. 300°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
TMR
1
12 IN+
FB
2
11 AOUT
OUT
3
GATE
4
SNS
VCC
13
10 GND
9
EN
5
8
FLT
6
7
SHDN
DE PACKAGE
12-LEAD (4mm × 3mm) PLASTIC DFN
TJMAX = 125°C, θJA = 43°C/W
EXPOSED PAD (PIN 13) PCB GND CONNECTION OPTIONAL
TOP VIEW
FB
OUT
GATE
SNS
VCC
1
2
3
4
5
10
9
8
7
6
TMR
GND
EN
FLT
SHDN
MS PACKAGE
10-LEAD PLASTIC MSOP
TJMAX = 125°C, θJA = 120°C/W
TMR 1
16 IN+
FB 2
15 NC
NC 3
14 AOUT
OUT 4
GATE 5
13 NC
12 GND
NC 6
11 EN
SNS 7
10 FLT
VCC 8
9
SHDN
S PACKAGE
16-LEAD PLASTIC SO
TJMAX = 150°C, θJA = 100°C/W
Rev. C
2
For more information www.analog.com
LT4356-1/LT4356-2
ORDER INFORMATION
TUBE
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT4356CDE-1#PBF
LT4356CDE-1#TRPBF
43561
12-Lead (4mm × 3mm) Plastic DFN
0°C to 70°C
LT4356IDE-1#PBF
LT4356IDE-1#TRPBF
43561
12-Lead (4mm × 3mm) Plastic DFN
–40°C to 85°C
LT4356HDE-1#PBF
LT4356HDE-1#TRPBF
43561
12-Lead (4mm × 3mm) Plastic DFN
–40°C to 125°C
LT4356CDE-2#PBF
LT4356CDE-2#TRPBF
43562
12-Lead (4mm × 3mm) Plastic DFN
0°C to 70°C
LT4356IDE-2#PBF
LT4356IDE-2#TRPBF
43562
12-Lead (4mm × 3mm) Plastic DFN
–40°C to 85°C
LT4356HDE-2#PBF
LT4356HDE-2#TRPBF
43562
12-Lead (4mm × 3mm) Plastic DFN
–40°C to 125°C
LT4356CMS-1#PBF
LT4356CMS-1#TRPBF
LTCNS
10-Lead Plastic MSOP
0°C to 70°C
LT4356IMS-1#PBF
LT4356IMS-1#TRPBF
LTCNS
10-Lead Plastic MSOP
–40°C to 85°C
LT4356HMS-1#PBF
LT4356HMS-1#TRPBF
LTCNS
10-Lead Plastic MSOP
–40°C to 125°C
LT4356CS-1#PBF
LT4356CS-1#TRPBF
LT4356S-1
16-Lead Plastic SO
0°C to 70°C
LT4356IS-1#PBF
LT4356IS-1#TRPBF
LT4356S-1
16-Lead Plastic SO
–40°C to 85°C
LT4356HS-1#PBF
LT4356HS-1#TRPBF
LT4356S-1
16-Lead Plastic SO
–40°C to 125°C
LT4356CS-2#PBF
LT4356CS-2#TRPBF
LT4356S-2
16-Lead Plastic SO
0°C to 70°C
LT4356IS-2#PBF
LT4356IS-2#TRPBF
LT4356S-2
16-Lead Plastic SO
–40°C to 85°C
LT4356HS-2#PBF
LT4356HS-2#TRPBF
LT4356S-2
16-Lead Plastic SO
–40°C to 125°C
LT4356CDE-1
LT4356CDE-1#TR
43561
12-Lead (4mm × 3mm) Plastic DFN
0°C to 70°C
LT4356IDE-1
LT4356IDE-1#TR
43561
12-Lead (4mm × 3mm) Plastic DFN
–40°C to 85°C
LT4356HDE-1
LT4356HDE-1#TR
43561
12-Lead (4mm × 3mm) Plastic DFN
–40°C to 125°C
LT4356CDE-2
LT4356CDE-2#TR
43562
12-Lead (4mm × 3mm) Plastic DFN
0°C to 70°C
LT4356IDE-2
LT4356IDE-2#TR
43562
12-Lead (4mm × 3mm) Plastic DFN
–40°C to 85°C
LT4356HDE-2
LT4356HDE-2#TR
43562
12-Lead (4mm × 3mm) Plastic DFN
–40°C to 125°C
LT4356CMS-1
LT4356CMS-1#TR
LTCNS
10-Lead Plastic MSOP
0°C to 70°C
LT4356IMS-1
LT4356IMS-1#TR
LTCNS
10-Lead Plastic MSOP
–40°C to 85°C
LT4356HMS-1
LT4356HMS-1#TR
LTCNS
10-Lead Plastic MSOP
–40°C to 125°C
LT4356CS-1
LT4356CS-1#TR
LT4356S-1
16-Lead Plastic SO
0°C to 70°C
LT4356IS-1
LT4356CS-1#TR
LT4356S-1
16-Lead Plastic SO
–40°C to 85°C
LT4356HS-1
LT4356HS-1#TR
LT4356S-1
16-Lead Plastic SO
–40°C to 125°C
LT4356CS-2
LT4356CS-2#TR
LT4356S-2
16-Lead Plastic SO
0°C to 70°C
LT4356IS-2
LT4356IS-2#TR
LT4356S-2
16-Lead Plastic SO
–40°C to 85°C
LT4356HS-2
LT4356HS-2#TR
LT4356S-2
16-Lead Plastic SO
–40°C to 125°C
Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
Rev. C
For more information www.analog.com
3
LT4356-1/LT4356-2
ELECTRICAL
CHARACTERISTICS
The
l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 12V unless otherwise noted.
SYMBOL
PARAMETER
VCC
ICC
Operating Voltage Range
VCC Supply Current
IR
Reverse Input Current
ΔVGATE
GATE Pin Output High Voltage
IGATE(UP)
GATE Pin Pull-Up Current
IGATE(DN)
GATE Pin Pull-Down Current
VFB
FB Pin Servo Voltage
IFB
ΔVSNS
FB Pin Input Current
Overcurrent Fault Threshold
ISNS
ILEAK
ITMR
SNS Pin Input Current
FLT, EN Pins Leakage Current
AOUT Pin Leakage Current
TMR Pin Pull-up Current
VTMR
TMR Pin Pull-down Current
TMR Pin Thresholds
ΔVTMR
VIN+
IIN+
VOL
Early Warning Period
IN+ Pin Threshold
IN+ Pin Input Current
FLT, EN Pins Output Low
AOUT Pin Output Low
IOUT
OUT Pin Input Current
ΔVOUT
VSHDN
OUT Pin High Threshold
SHDN Pin Threshold
CONDITIONS
MIN
l
TYP
MAX
UNITS
80
1.5
25
30
40
70
100
250
V
mA
µA
µA
µA
µA
µA
µA
1
2
8
16
–36
–50
mA
mA
V
V
µA
µA
mA
mA
mA
V
V
µA
mV
mV
mV
mV
µA
µA
µA
µA
µA
µA
µA
µA
µA
V
V
mV
V
µA
V
mV
V
mV
µA
mA
V
V
V
4
VSHDN = Float
VSHDN = 0V, IN+ = 1.3V, LT4356-1
LT4356I-1, LT4356C-1
LT4356H-1
VSHDN = 0V, IN+ = 1.3V, LT4356-2
LT4356I-2, LT4356C-2
LT4356H-2
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l
l
1
7
7
7
60
60
60
VSNS = VCC = –30V, SHDN Open
VSNS = VCC = VSHDN = –30V
VCC = 4V; (VGATE – VOUT)
80V ≥ VCC ≥ 8V; (VGATE – VOUT)
VGATE = 12V; VCC = 12V
VGATE = 48V; VCC = 48V
Overvoltage, VFB = 1.4V, VGATE = 12V
Overcurrent, VCC – VSNS = 120mV, VGATE = 12V
Shutdown Mode, VSHDN = 0V, VGATE = 12V
VGATE = 12V; VOUT = 12V, LT4356I, LT4356C
VGATE = 12V; VOUT = 12V, LT4356H
VFB = 1.25V
ΔVSNS = (VCC – VSNS), VCC = 12V, LT4356I, LT4356C
ΔVSNS = (VCC – VSNS), VCC = 12V, LT4356H
ΔVSNS = (VCC – VSNS), VCC = 48V, LT4356I, LT4356C
ΔVSNS = (VCC – VSNS), VCC = 48V, LT4356H
VSNS = VCC = 12V to 48V
FLT, EN = 80V
AOUT = 80V
VTMR = 1V, VFB = 1.5V, (VCC – VOUT) = 0.5V
VTMR = 1V, VFB = 1.5V, (VCC – VOUT) = 75V
VTMR = 1.3V, VFB = 1.5V
VTMR = 1V, ΔVSNS = 60mV, (VCC – VOUT) = 0.5V
VTMR = 1V, ΔVSNS = 60mV, (VCC – VOUT) = 80V
VTMR = 1V, VFB = 1V, ΔVSNS = 0V
FLT From High to Low, VCC = 5V to 80V
VGATE From Low to High, VCC = 5V to 80V
From FLT going Low to GATE going Low, VCC = 5V to 80V
l
l
0.3
0.8
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
VIN
ISINK = 2mA
ISINK = 0.1mA
ISINK = 2mA
ISINK = 0.1mA
VOUT = VCC = 12V
VOUT = VCC = 12V, VSHDN = 0V
ΔVOUT = VCC – VOUT; EN From Low to High
VCC = 12V to 48V
45
42.5
46
43
5
–23
–30
150
10
5
1.25
1.25
0.3
50
50
51
51
10
l
l
l
l
l
l
l
l
l
l
l
+ = 1.25V
4.5
10
–4
–4.5
75
5
1.5
1.225
1.215
–1.5
–44
–3.5
–2.5
–195
1.5
1.22
0.48
80
1.22
l
l
l
l
l
l
l
l
l
0.25
0.6
0.4
–2.5
–50
–5.5
–4.5
–260
2.2
1.25
0.5
100
1.25
0.3
2
300
2
200
200
6
0.5
1.275
1.275
1
55
55
56
56
22
2.5
4.5
–4
–56
–8.5
–6.5
–315
2.7
1.28
0.52
120
1.28
1
8
800
8
400
300
14
0.7
1.7
2.1
Rev. C
4
For more information www.analog.com
LT4356-1/LT4356-2
ELECTRICAL
CHARACTERISTICS
The
l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 12V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
VSHDN(FLT)
ISHDN
tOFF(OC)
tOFF(OV)
SHDN Pin Resting Voltage
SHDN Pin Current
Overcurrent Turn Off Delay Time
Overvoltage Turn Off Delay Time
VCC = 12V to 48V, Note 4
VSHDN = 0V
GATE From High to Low, ΔVSNS = 0 → 120mV
GATE From High to Low, VFB = 0 → 1.5V
0.6
–1
l
l
l
l
TYP
MAX
–4
2
0.25
2.1
–8
4
1
UNITS
V
µA
µs
µs
Note 3: An internal clamp limits the GATE pin to a minimum of 10V above
the OUT pin. Driving this pin to voltages beyond the clamp may damage
the device.
Note 4: Resting voltage after turn-on.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to GND unless otherwise
specified.
TYPICAL PERFORMANCE CHARACTERISTICS
Specifications are at VCC = 12V, TA = 25°C unless otherwise noted.
ICC vs VCC
ICC (Shutdown) vs VCC
1000
60
400
200
0
10
20
30
40 50
VCC (V)
60
70
80
50
100
40
80
30
40
10
20
0
0
10
4356 G02
20
30
40 50
VCC (V)
60
10
20
30
40 50
VCC (V)
60
70
80
4356 G20
ICC (Shutdown) vs Temperature
300
LT4356-1
30
LT4356-2
250
25
200
20
15
150
100
10
50
5
0
–50
0
4356 G01
ICC (Shutdown) vs Temperature
35
0
80
70
LT4356-2
IN+ = 1.3V
60
20
ICC (µA)
0
LT4356-1
ICC (µA)
ICC (µA)
600
ICC (µA)
ICC (µA)
800
ICC (Shutdown) vs VCC
120
–25
25
75
0
50
TEMPERATURE (°C)
100
125
4356 G03
0
–50
–25
0
50
25
75
TEMPERATURE (°C)
100
125
4356 G21
Rev. C
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5
LT4356-1/LT4356-2
TYPICAL PERFORMANCE CHARACTERISTICS
Specifications are at VCC = 12V, TA = 25°C unless otherwise noted.
SHDN Current vs Temperature
6
GATE Pull-Up Current vs
Temperature
GATE Pull-Up Current vs VCC
VSHDN = 0V
5
40
35
35
30
30
3
2
25
25
IGATE (µA)
IGATE (µA)
ISHDN (µA)
4
20
15
–25
0
50
25
75
TEMPERATURE (°C)
100
0
125
220
12
30
40 50
VCC (V)
60
0
–50
80
70
140
120
0
50
25
75
TEMPERATURE (°C)
100
OVERCURRENT CONDITION
∆VSNS = 120mV
4
ΔVGATE vs Temperature
12
–25
0
50
25
75
TEMPERATURE (°C)
100
0
125
∆VGATE (V)
6
VCC = 4V
0
2
4
4356 G08
6
10
8
IGATE (µA)
12
14
16
4356 G09
Overvoltage TMR Current vs
(VCC – VOUT)
48
OVERVOLTAGE CONDITION
VOUT = 5V
40 VTMR = 1V
TA = 130°C
12
8
TA = –45°C
10
32
TA = 25°C
8
6
24
16
4
2
0
–50
2
14
10
4
6
4
16
VCC = 8V
VOUT = 12V
8
ΔVGATE vs VCC
IGATE = –1µA
4356 G06
10
6
4356 G07
125
12
8
0
–50
125
100
ΔVGATE vs IGATE
ITMR (µA)
–25
25
75
0
50
TEMPERATURE (°C)
14
2
100
–50
–25
4356 G05
∆VGATE (V)
IGATE(DOWN) (mA)
IGATE(DOWN) (mA)
160
∆VGATE (V)
20
10
180
14
10
GATE Pull-Down Current vs
Temperature
OVERVOLTAGE CONDITION
VFB = 1.5V
200
0
4356 G04
GATE Pull-Down Current vs
Temperature
15
5
5
0
–50
20
10
10
1
VGATE = VOUT = 12V
–25
0
50
25
75
TEMPERATURE (°C)
100
125
4356 G10
2 I
GATE = –1µA
VOUT = VCC
0
0
10 20
8
30
40 50
VCC (V)
60
70
80
4356 G11
0
0
10
20
30 40 50
VCC – VOUT (V)
60
70
80
4356 G12
Rev. C
6
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LT4356-1/LT4356-2
TYPICAL PERFORMANCE CHARACTERISTICS
Specifications are at VCC = 12V, TA = 25°C unless otherwise noted.
OVERVOLTAGE, EARLY
WARNING PERIOD
12 VFB = 1.5V
VTMR = 1.3V
10
ITMR (µA)
160
120
6
4
40
2
20
30 40 50
VCC – VOUT (V)
60
70
0
80
0.5
0
10
4356 G13
20
30
40 50
VCC (V)
60
0
–50
80
70
0
25
50
75
TEMPERATURE (°C)
100
125
4356 G15
Overvoltage Turn-Off Time vs
Temperature
500
AOUT
OVERVOLTAGE CONDITION
VFB = 1.5V
400
3.0
2.5
–25
4356 G14
4.0
3.5
1.5
1.0
Output Low Voltage vs Current
FLT
2.0
tOFF (ns)
VOL (V)
EN
1.5
1.0
300
200
100
0.5
0
0
0.5
2.0
1.0
1.5
CURRENT (mA)
0
–50
3.0
2.5
Overcurrent Turn-Off Time vs
Temperature
4.0
0
25
50
75
TEMPERATURE (°C)
100
125
4356 G17
Reverse Current vs Reverse
Voltage
–20
OVERCURRENT CONDITION
∆VSNS = 120mV
3.5
–25
4356 G16
VCC = SNS
–15
3.0
ICC (mA)
10
2.0
8
80
tOFF (µs)
ITMR (µA)
200
VTMR = 1V
2.5
ITMR (µA)
OVERCURRENT CONDITION
VOUT = 0V
240 VTMR = 1V
0
3.0
14
280
0
TMR Pull-Down Current vs
Temperature
Warning Period
TMR Current vs VCC
Overcurrent TMR Current vs
(VCC – VOUT)
2.5
–10
2.0
–5
1.5
1.0
–50
–25
0
25
50
75
TEMPERATURE (°C)
100
125
4356 G18
0
0
–20
–40
–60
–80
VCC (V)
4356 G19
Rev. C
For more information www.analog.com
7
LT4356-1/LT4356-2
PIN FUNCTIONS
AOUT (DFN and SO Packages Only): Amplifier Output.
Open collector output of the auxiliary amplifier. It is capable
of sinking up to 2mA from 80V. The negative input of the
amplifier is internally connected to a 1.25V reference.
EN: Open-Collector Enable Output. The EN pin goes high
impedance when the voltage at the OUT pin is above (VCC
– 0.7V), indicating the external MOSFET is fully on. The
state of the pin is latched until the OUT pin voltage resets
at below 0.5V and goes back up above 2V. The internal
NPN is capable of sinking up to 3mA of current from 80V
to drive an LED or opto-coupler.
Exposed Pad (DFN Package Only): Exposed pad may be
left open or connected to device ground (GND).
FB: Voltage Regulator Feedback Input. Connect this pin
to the center tap of the output resistive divider connected
between the OUT pin and ground. During an overvoltage
condition, the GATE pin is servoed to maintain a 1.25V
threshold at the FB pin. This pin is clamped internally to
7V. Tie to GND to disable the OV clamp.
FLT: Open-Collector Fault Output. This pin pulls low after the
voltage at the TMR pin has reached the fault threshold of 1.25V.
It indicates the pass transistor is about to turn off because
either the supply voltage has stayed at an elevated level for an
extended period of time (voltage fault) or the device is in an
overcurrent condition (current fault). The internal NPN is capable of sinking up to 3mA of current from 80V to drive an LED or
opto-coupler.
GATE: N-Channel MOSFET Gate Drive Output. The GATE
pin is pulled up by an internal charge pump current source
and clamped to 14V above the OUT pin. Both voltage and
current amplifiers control the GATE pin to regulate the
output voltage and limit the current through the MOSFET.
GND: Device Ground.
IN+ (DFN and SO Packages Only): Positive Input of the
Auxiliary Amplifier. This amplifier can be used as a level
detection comparator with external hysteresis or linear
regulator controlling an external PNP transistor. This pin
is clamped internally to 7V. Connect to ground if unused.
OUT: Output Voltage Sense Input. This pin senses the
voltage at the source of the N-channel MOSFET and sets
the fault timer current. When the OUT pin voltage reaches
0.7V away from VCC, the EN pin goes high impedance.
SHDN: Shutdown Control Input. Pulling the SHDN pin low
shuts the part down to a low current mode. All functions
are turned off for the LT4356-1 while the internal reference
and the auxiliary amplifier stay active for the LT4356-2.
The SHDN input threshold is similar to a TTL input. If the
SHDN voltage goes below 2.1V, the voltage must go below
0.4V for 100μs to properly shut down the part. To turn
the part back on, the SHDN voltage must transition from
below 0.4V to greater than 2.1V with a slew rate faster
than 10V/ms. An internal, 4μA current source is provided
to pull the SHDN pin up. An external pull-up device should
be used if the leakage current to ground might exceed 1μA.
The SHDN pin can be pulled up to 100V or below GND by
60V without damage.
SNS: Current Sense Input. Connect this pin to the output of
the current sense resistor. The current limit circuit controls
the GATE pin to limit the sense voltage between VCC and
SNS pins to 50mV. At the same time the sense amplifier
also starts a current source to charge up the TMR pin.
This pin can be pulled below GND by up to 60V, though
the voltage difference with the VCC pin must be limited to
less than 30V. Connect to VCC if unused.
TMR: Fault Timer Input. Connect a capacitor between this
pin and ground to set the times for early warning, fault
and cool down periods. The current charging up this pin
during fault conditions depends on the voltage difference
between the VCC and OUT pins. When VTMR reaches 1.25V,
the FLT pin pulls low to indicate the detection of a fault
condition. If the condition persists, the pass transistor turns
off when VTMR reaches the threshold of 1.35V. As soon as
the fault condition disappears, the pull up current stops
and a 2µA current starts to pull the TMR pin down. When
VTMR reaches the retry threshold of 0.5V, the GATE pin pulls
high turning back on the pass transistor. A minimum of
10nF capacitor is needed to compensate the loop. A 10V
rated X7R capacitor is recommended for CTMR.
VCC: Positive Supply Voltage Input. The positive supply
input ranges from 4V to 80V for normal operation. It
can also be pulled below ground potential by up to 60V
during a reverse battery condition, without damaging the
part. The supply current is reduced to 7µA with all the
functional blocks off.
Rev. C
8
For more information www.analog.com
LT4356-1/LT4356-2
BLOCK DIAGRAM
50mV
+
–
VCC
GATE
20μA
+
–
OUT
14V
CHARGE
PUMP
f = 250kHz
FB
VA
IA
–
SHDN
SNS
+
VCC
1.25V
4μA
FLT
AOUT
OC
1.25V
AUXILIARY
AMPLIFIER
SHDN
RESTART
OUT
1.35V
+
0.5V
EN
CONTROL
LOGIC
GATEOFF
–
+
IN+
OV
FLT
–
VCC
ITMR
+
–
+
2µA
1.25V
TMR
–
GND
4356 BD
Rev. C
For more information www.analog.com
9
LT4356-1/LT4356-2
OPERATION
Some power systems must cope with high voltage surges
of short duration such as those in automobiles. Load
circuitry must be protected from these transients, yet
high availability systems must continue operating during
these events.
The LT4356 is an overvoltage protection regulator that
drives an external N-channel MOSFET as the pass transistor.
It operates from a wide supply voltage range of 4V to 80V.
It can also be pulled below ground potential by up to 60V
without damage. The low power supply requirement of 4V
allows it to operate even during cold cranking conditions
in automotive applications. The internal charge pump
turns on the N-channel MOSFET to supply current to the
loads with very little power loss. Two MOSFETs can be
connected back to back to replace an inline Schottky diode
for reverse input protection. This improves the efficiency
and increases the available supply voltage level to the load
circuitry during cold crank.
Normally, the pass transistor is fully on, powering the loads
with very little voltage drop. When the supply voltage surges
too high, the voltage amplifier (VA) controls the gate of
the MOSFET and regulates the voltage at the source pin
to a level that is set by the external resistive divider from
the OUT pin to ground and the internal 1.25V reference. A
current source starts charging up the capacitor connected
at the TMR pin to ground. If the voltage at the TMR pin,
VTMR, reaches 1.25V, the FLT pin pulls low to indicate
impending turn-off due to the overvoltage condition. The
pass transistor stays on until the TMR pin reaches 1.35V, at
which point the GATE pin pulls low turning off the MOSFET.
The potential at the TMR pin starts decreasing as soon
as the output voltage is not being servoed, indicating the
overvoltage condition has disappeared. When the voltage
at the TMR pin reaches 0.5V the GATE pin begins rising,
turning on the MOSFET. The FLT pin will then go to a high
impedance state.
The fault timer allows the load to continue functioning
during short transient events while protecting the MOSFET
from being damaged by a long period of supply overvoltage, such as a load dump in automobiles. The timer period
varies with the voltage across the MOSFET. A higher voltage
corresponds to a shorter fault timer period, ensuring the
MOSFET operates within its safe operating area (SOA).
The LT4356 senses an overcurrent condition by monitoring the voltage across an optional sense resistor placed
between the VCC and SNS pins. An active current limit
circuit (IA) controls the GATE pin to limit the sense voltage
to 50mV. A current is also generated to start charging up
the TMR pin. This current is about 5 times the current
generated during an overvoltage event. The FLT pin pulls
low when the voltage at the TMR pin reaches 1.25V and
the MOSFET is turned off when it reaches 1.35V.
An auxiliary amplifier is provided with the negative input
connected to an internal 1.25V reference. The output pull
down device is capable of sinking up to 2mA of current
allowing it to drive an LED or opto coupler. This amplifier
can be configured as a linear regulator controller driving
an external PNP transistor or a comparator function to
monitor voltages.
A shutdown pin turns off the pass transistor and reduces
the supply current to less than 7µA for the LT4356-1. The
supply current drops down to 60µA while keeping the
internal reference and the auxiliary amplifier active for the
LT4356-2 version during shutdown.
Rev. C
10
For more information www.analog.com
LT4356-1/LT4356-2
APPLICATIONS INFORMATION
The LT4356 can limit the voltage and current to the load
circuitry during supply transients or overcurrent events.
The total fault timer period should be set to ride through
short overvoltage transients while not causing damage
to the pass transistor. The selection of this N-channel
MOSFET pass transistor is critical for this application.
It must stay on and provide a low impedance path from
the input supply to the load during normal operation and
then dissipate power during overvoltage or overcurrent
conditions.
The following sections describe the overcurrent and the
overvoltage faults, and the selection of the timer capacitor
value based on the required warning time. The selection
of the N-channel MOSFET pass transistor is discussed
next. Auxiliary amplifier, reverse input, and the shutdown
functions are covered after the MOSFET selection. External
component selection is discussed in detail in the Design
Example section.
Overvoltage Fault
The LTC4356 limits the voltage at the OUT pin during an
overvoltage situation. An internal voltage amplifier regulates the GATE pin voltage to maintain a 1.25V threshold at
the FB pin. During this period of time, the power MOSFET
is still on and continues to supply current to the load. This
allows uninterrupted operation during short overvoltage
transient events.
When the voltage regulation loop is engaged for longer
than the time-out period, set by the timer capacitor connected from the TMR pin to ground, an overvoltage fault is
detected. The GATE pin is pulled down to the OUT pin by a
150mA current. After the fault condition has disappeared
and a cool down period has transpired, the GATE pin starts
to pull high again. This prevents the power MOSFET from
being damaged during a long period of overvoltage, such
as during load dump in automobiles.
Overcurrent Fault
The LT4356 features an adjustable current limit that
protects against short circuits or excessive load current.
During an overcurrent event, the GATE pin is regulated to
limit the current sense voltage across the VCC and SNS
pins to 50mV.
An overcurrent fault occurs when the current limit circuitry
has been engaged for longer than the time-out delay set
by the timer capacitor. The GATE pin is then immediately
pulled low by a 10mA current to GND turning off the
MOSFET. After the fault condition has disappeared and a
cool down period has transpired, the GATE pin is allowed
to pull back up and turn on the pass transistor.
Fault Timer
The LT4356 includes an adjustable fault timer pin. Connecting a capacitor from the TMR pin to ground sets the
delay timer period before the MOSFET is turned off. The
same capacitor also sets the cool down period before the
MOSFET is allowed to turn back on after the fault condition
has disappeared.
Once a fault condition, either overvoltage or overcurrent,
is detected, a current source charges up the TMR pin. The
current level varies depending on the voltage drop across
the drain and source terminals of the power MOSFET(VDS), which is typically from the VCC pin to the OUT pin.
This scheme takes better advantage of the available Safe
Operating Area (SOA) of the MOSFET than would a fixed
timer current. The timer function operates down to VCC =
5V across the whole temperature range.
Rev. C
For more information www.analog.com
11
LT4356-1/LT4356-2
APPLICATIONS INFORMATION
Fault Timer Current
The timer current starts at around 2µA with 0.5V or less of
VDS, increasing linearly to 50µA with 75V of VDS during an
overvoltage fault (Figure 1). During an overcurrent fault,
it starts at 4µA with 0.5V or less of VDS but increases
to 260µA with 80V across the MOSFET (Figure 2). This
arrangement allows the pass transistor to turn off faster
during an overcurrent event, since more power is dissipated
during this condition. Refer to the Typical Performance
Characteristics section for the timer current at different
VDS in both overvoltage and overcurrent events.
VTMR(V)
When the voltage at the TMR pin, VTMR, reaches the 1.25V
threshold, the FLT pin pulls low to indicate the detection
of a fault condition and provide warning to the load of the
impending power loss. In the case of an overvoltage fault,
the timer current then switches to a fixed 5µA. The interval
between FLT asserting low and the MOSFET turning off
is given by:
t WARNING =
ITMR = 5µA
C TMR • 100mV
5µA
ITMR = 5µA
1.35
1.25
VDS = 75V
(ITMR = 50µA)
VDS = 10V
(ITMR = 8µA)
0.50
TIME
tFLT
= 15ms/µF
tWARNING
= 20ms/µF
tFLT = 93.75ms/µF
tWARNING
= 20ms/µF
TOTAL FAULT TIMER = tFLT + tWARNING
4356 F01
Figure 1. Overvoltage Fault Timer Current
VTMR(V)
1.35
1.25
VDS = 80V
(ITMR = 260µA)
0.50
tFLT
= 2.88ms/µF
VDS = 10V
(ITMR = 35µA)
TIME
tWARNING
= 0.38ms/µF
tFLT = 21.43ms/µF
TOTAL FAULT TIMER = tFLT + tWARNING
tWARNING
= 2.86ms/µF
4356 F02
Figure 2. Overcurrent Fault Timer Current
Rev. C
12
For more information www.analog.com
LT4356-1/LT4356-2
APPLICATIONS INFORMATION
This fixed early warning period allows the systems to perform necessary backup or house-keeping functions before
the power supply is cut off. After VTMR crosses the 1.35V
threshold, the pass transistor turns off immediately. Note
that during an overcurrent event, the timer current is not
reduced to 5µA after VTMR has reached 1.25V threshold,
since it would lengthen the overall fault timer period and
cause more stress on the power MOSFET.
As soon as the fault condition has disappeared, a 2µA
current starts to discharge the timer capacitor to ground.
When VTMR reaches the 0.5V threshold, the internal charge
pump starts to pull the GATE pin high, turning on the
MOSFET. The TMR pin is then actively regulated to 0.5V
until the next fault condition appears. The total cool down
timer period is given by:
t COOL =
C TMR • 0.85V
2µA
MOSFET Selection
The LT4356 drives an N-channel MOSFET to conduct the
load current. The important features of the MOSFET are
on-resistance RDS(ON), the maximum drain-source voltage
V(BR)DSS, the threshold voltage, and the SOA.
The maximum allowable drain-source voltage must be
higher than the supply voltage. If the output is shorted
to ground or during an overvoltage event, the full supply
voltage will appear across the MOSFET.
The gate drive for the MOSFET is guaranteed to be more
than 10V and less than 16V for those applications with VCC
higher than 8V. This allows the use of standard threshold
voltage N-channel MOSFETs. For systems with VCC less
than 8V, a logic level MOSFET is required since the gate
drive can be as low as 4.5V.
The SOA of the MOSFET must encompass all fault conditions. In normal operation the pass transistor is fully
on, dissipating very little power. But during either overvoltage or overcurrent faults, the GATE pin is servoed to
regulate either the output voltage or the current through
the MOSFET. Large current and high voltage drop across
the MOSFET can coexist in these cases. The SOA curves
of the MOSFET must be considered carefully along with
the selection of the fault timer capacitor.
Transient Stress in the MOSFET
During an overvoltage event, the LT4356 drives a series
pass MOSFET to regulate the output voltage at an acceptable
level. The load circuitry may continue operating throughout
this interval, but only at the expense of dissipation in the
MOSFET pass device. MOSFET dissipation or stress is a
function of the input voltage waveform, regulation voltage
and load current. The MOSFET must be sized to survive
this stress.
Most transient event specifications use the model shown
in Figure 3. The idealized waveform comprises a linear
ramp of rise time tr, reaching a peak voltage of VPK and
exponentially decaying back to VIN with a time constant
of t. A common automotive transient specification has
constants of tr = 10µs, VPK = 80V and t = 1ms. A surge
condition known as “load dump” has constants of tr =
5ms, VPK = 60V and t = 200ms.
VPK
τ
VIN
tr
4356 F03
Figure 3. Prototypical Transient Waveform
Rev. C
For more information www.analog.com
13
LT4356-1/LT4356-2
APPLICATIONS INFORMATION
MOSFET stress is the result of power dissipated within
the device. For long duration surges of 100ms or more,
stress is increasingly dominated by heat transfer; this is
a matter of device packaging and mounting, and heatsink
thermal mass. This is analyzed by simulation, using the
MOSFET thermal model.
For short duration transients of less than 100ms, MOSFET
survival is increasingly a matter of safe operating area
(SOA), an intrinsic property of the MOSFET. SOA quantifies
the time required at any given condition of VDS and ID to
raise the junction temperature of the MOSFET to its rated
maximum. MOSFET SOA is expressed in units of wattsquared-seconds (P2t). This figure is essentially constant
for intervals of less than 100ms for any given device
type, and rises to infinity under DC operating conditions.
Destruction mechanisms other than bulk die temperature
distort the lines of an accurately drawn SOA graph so that
P2t is not the same for all combinations of ID and VDS.
In particular P2t tends to degrade as VDS approaches the
maximum rating, rendering some devices useless for
absorbing energy above a certain voltage.
Calculating Transient Stress
To select a MOSFET suitable for any given application, the
SOA stress must be calculated for each input transient
which shall not interrupt operation. It is then a simple matter
to chose a device which has adequate SOA to survive the
maximum calculated stress. P2t for a prototypical transient
waveform is calculated as follows (Figure 4).
Let
a = VREG – VIN
b = VPK – VIN
(VIN = Nominal Input Voltage)
τ
VREG
VIN
tr
4356 F04
Figure 4. Safe Operating Area Required to Survive
Prototypical Transient Waveform
Typically VREG ≈ VIN and t >> tr simplifying the above to
P 2t =
1
2
2
ILOAD 2 ( VPK – VREG ) t
(W 2s)
For the transient conditions of VPK = 80V, VIN = 12V, VREG
= 16V, tr = 10µs and t = 1ms, and a load current of 3A,
P2t is 18.4W2s—easily handled by a MOSFET in a D-pak
package. The P2t of other transient waveshapes is evaluated
by integrating the square of MOSFET power versus time.
Calculating Short-Circuit Stress
SOA stress must also be calculated for short-circuit conditions. Short-circuit P2t is given by:
P2t = (VIN • ΔVSNS/RSNS)2 • tTMR (W2s)
where, ΔVSNS is the SENSE pin threshold, and tTMR is the
overcurrent timer interval.
For VIN = 14.7V, VSNS = 50mV, RSNS = 12mΩ and CTMR
= 100nF, P2t is 6.6W2s—less than the transient SOA
calculated in the previous example. Nevertheless, to
account for circuit tolerances this figure should be doubled
to 13.2W2s.
Limiting Inrush Current and GATE Pin Compensation
Then
3
VPK
⎡ 1 (b − a )
1 ⎛
b
⎞⎤
P 2 t = ILOAD 2 ⎢ tr
+ t ⎜ 2a 2 ln + 3a 2 + b 2 − 4ab ⎟ ⎥
⎠⎥
2 ⎝
a
b
⎢⎣ 3
⎦
The LT4356 limits the inrush current to any load capacitance
by controlling the GATE pin voltage slew rate. An external
capacitor can be connected from GATE to ground to slow
down the inrush current further at the expense of slower
turn-off time. The gate capacitor is set at:
C1 =
IGATE(UP)
IINRUSH
•CL
Rev. C
14
For more information www.analog.com
LT4356-1/LT4356-2
APPLICATIONS INFORMATION
The LTC4356 does not need extra compensation components at the GATE pin for stability during an overvoltage or
overcurrent event. With transient input voltage step faster
than 5V/µs, a gate capacitor, C1, to ground is needed to
prevent self enhancement of the N-channel MOSFET.
The extra gate capacitance slows down the turn off time
during fault conditions and may allow excessive current
during an output short event. An extra resistor, R1, in series
with the gate capacitor can improve the turn off time. A
diode, D1, should be placed across R1 with the cathode
connected to C1 as shown in Figure 5.
M1
Q2
2N2905A OR
BCP53
RLIM
*4.7Ω
INPUT
C5
10µF
R6
100k
2.5V OUTPUT
≈ 150mA MAX
* OPTIONAL FOR
CURRENT LIMIT
D1*
BAV99
11
AOUT
LT4356S
IN+
12
C3
47nF
R4
249k
VOUT = 1.25
ILIM ≈
R 4 + R5
R5
0.7
R LIM
R5
249k
4356 F06
Figure 6. Auxiliary LDO Output with Optional Current Limit
Reverse Input Protection
D1
IN4148W
A blocking diode is commonly employed when reverse input
potential is possible, such as in automotive applications.
This diode causes extra power loss, generates heat, and
reduces the available supply voltage range. During cold
crank, the extra voltage drop across the diode is particularly undesirable.
R3
R1
C1
GATE
LT4356S
4356 F05
Figure 5.
Auxiliary Amplifier
An uncommitted amplifier is included in the LT4356 to
provide flexibility in the system design. With the negative
input connected internally to the 1.25V reference, the amplifier can be connected as a level detect comparator with
external hysteresis. The open collector output pin, AOUT,
is capable of driving an opto or LED. It can also interface
with the system via a pull-up resistor to a supply voltage
up to 80V. Another use is to implement undervoltage
lockout, as shown in the typical application “Overvoltage
Regulator with Undervoltage Lockout.” In shutdown, the
auxiliary amplifier turns off in the LT4356-1 but continues
operating in the LT4356-2.
The amplifier can also be configured as a low dropout
linear regulator controller. With an external PNP transistor,
such as 2N2905A, it can supply up to 100mA of current
with only a few hundred mV of dropout voltage. Current
limit can be easily included by adding two diodes and one
resistor (Figure 6).
The LT4356 is designed to withstand reverse voltage
without damage to itself or the load. The VCC, SNS, and
SHDN pins can withstand up to 60V of DC voltage below
the GND potential. Back-to-back MOSFETs must be used
to eliminate the current path through their body diodes
(Figure 7). Figure 8 shows the approach with a P-Channel
MOSFET in place of Q2.
RSNS
10mΩ
VIN
12V
M2
IRLR2908
D2*
SMAJ58CA
Q1
2N3904
D1
1N4148
6
M1
IRLR2908
R4 R5
10Ω 1M
VOUT
12V, 3A
CLAMPED
AT 16V
R3
10Ω
R1
59k
R7
10k
5
SNS
4
GATE
VCC
3
OUT
FB
2
R2
4.99k
LT4356S
7
11
12
SHDN
FLT
AOUT
IN+
GND
10
*DIODES INC.
EN
TMR
1
8
9
4356 F07
CTMR
0.1µF
Figure 7. Overvoltage Regulator with N-channel MOSFET
Reverse Input Protection
Rev. C
For more information www.analog.com
15
LT4356-1/LT4356-2
APPLICATIONS INFORMATION
RSNS
10mΩ
VIN
12V
M2
Si4435
M1
IRLR2908
VOUT
12V, 3A
CLAMPED
AT 16V
D1
1N5245
15V
D2*
SMAJ58CA
R3
10Ω
R6
10k
5
SNS
6
R1
59k
3
OUT
4
GATE
FB
VCC
2
R2
4.99k
7
11
12
LT4356S
SHDN
AOUT
IN+
FLT
GND
10
*DIODES INC.
EN
TMR
1
8
9
4356 F08
CTMR
0.1µF
Figure 8. Overvoltage Regulator with P-Channel MOSFET
Reverse Input Protection
Shutdown
The LT4356 can be shut down to a low current mode when
the voltage at the SHDN pin goes below the shutdown
threshold of 0.6V. The quiescent current drops to 7µA for
the LT4356-1 and 60µA for the LT4356-2 which leaves the
auxiliary amplifier on.
The SHDN pin can be pulled up to VCC or below GND by
up to 60V without damaging the pin. Leaving the pin open
allows an internal current source to pull it up and turn
on the part while clamping the pin to 2.5V. The leakage
current at the pin should be limited to no more than 1µA
if no pull up device is used to help turn it on.
A total bulk capacitance of at least 22µF low ESR electrolytic is required close to the source pin of MOSFET Q1. In
addition, the bulk capacitance should be at least 10 times
larger than the total ceramic bypassing capacitor on the
input of the DC/DC converter.
RSNS
10mΩ
VIN
CL*
22µF
D2
SMAJ58A
6
Supply Transient Protection
The LT4356 is guaranteed to be safe from damage with
supply voltages up to 100V. Nevertheless, voltage transients above 100V may cause permanent damage. During
a short-circuit condition, the large change in current flowing
through power supply traces and associated wiring can
cause inductive voltage transients which could exceed
100V. To minimize the voltage transients, the power trace
parasitic inductance should be minimized by using wide
traces. A small surge suppressor, D2, in Figure 9, at the
input will clamp the voltage spikes.
M1
IRLR2908
R4
383k
7
12
VCC
FB
UNDERVOLTAGE
2
SHDN
IN+
R2
4.99k
LT4356S
R5
100k
EN
11
R1
59k
R3
10Ω
5
4
3
SNS GATE OUT
AOUT
GND
10
TMR
1
FLT
4356 F09
CTMR
47nF
9
8
VCC
DC-DC
CONVERTER
SHDN GND
FAULT
*SANYO 25CE22GA
Figure 9. Overvoltage Regulator with Low-Battery
Rev. C
16
For more information www.analog.com
LT4356-1/LT4356-2
APPLICATIONS INFORMATION
Layout Considerations
To achieve accurate current sensing, Kelvin connection
to the current sense resistor (RSNS in Figure 9) is recommended. The minimum trace width for 1oz copper foil is
0.02" per amp to ensure the trace stays at a reasonable
temperature. 0.03" per amp or wider is recommended.
Note that 1oz copper exhibits a sheet resistance of about
530µΩ/square. Small resistances can cause large errors in
high current applications. Noise immunity will be improved
significantly by locating resistive dividers close to the pins
with short VCC and GND traces.
Design Example
As a design example, take an application with the following
specifications: VCC = 8V to 14V DC with transient up to 80V,
VOUT ≤ 16V, current limit (ILIM) at 5A, low battery detection
at 6V, and 1ms of overvoltage early warning (Figure 9).
First, calculate the resistive divider value to limit VOUT to
16V during an overvoltage event:
VREG =
1.25V • (R1 + R2 )
R2
1.25V
250µA
R1 =
1.25V
= 10mΩ
C TMR =
1ms • 5µA
100mV
= 50nF
The closest standard value for CTMR is 47nF.
Finally, calculate R4 and R5 for the 6V low battery threshold detection:
6V =
1.25V • (R4 + R5 )
R5
Choose 100k for R5.
R4 =
( 6V – 1.25V ) • R5
1.25V
= 380k
Select 383k for R4.
The total overcurrent fault time is:
t OC =
47nF • 0.85V
45.5µA
= 0.878ms
The power dissipation on Q1 equals to:
Choose 4.99k for R2.
5A
CTMR is then chosen for 1ms of early warning time:
= 5k
( 16V – 1.25V ) • R2
ILIM
50mV
=
The pass transistor, Q1, should be chosen to withstand
the output short condition with VCC = 14V.
= 16V
Set the current through R1 and R2 during the overvoltage
condition to 250µA.
R2 =
50mV
R SNS =
= 58.88k
P=
14V • 50mV
10mΩ
= 70W
These conditions are well within the Safe Operating Area
of IRLR2908.
The closest standard value for R1 is 59k.
Next calculate the sense resistor, RSNS, value:
Rev. C
For more information www.analog.com
17
LT4356-1/LT4356-2
TYPICAL APPLICATIONS
Wide Input Range 5V to 28V Hot Swap
with Undervoltage Lockout
RSNS
20mΩ
VIN
M1
SUD50N03-10
R6
118k
VOUT
CL
100µF
R3
10Ω
C1
47nF
SNS
VCC
GATE
OUT
FB
SHDN
AOUT
IN+
LT4356DE-1
R7
49.9k
FLT
GND
EN
TMR
4356 TA02
CTMR
1µF
24V Overvoltage Regulator Withstands 150V at VIN
VIN
24V
M1
IRF640
R9
1k
1W
R3
10Ω
4
GATE
5
SNS
6
D2*
SMAT70A
R1
118k
3
OUT
FB
VCC
2
R2
4.99k
7
8
9
LT4356DE
SHDN
FLT
EN
GND
10
*DIODES INC.
VOUT
CLAMPED AT 32V
TMR
1
CTMR
0.1µF
4356 TA03
Rev. C
18
For more information www.analog.com
LT4356-1/LT4356-2
TYPICAL APPLICATIONS
Overvoltage Regulator with Undervoltage Lockout
RSNS
20mΩ
VIN
D2*
SMAJ58A
R6
280k
M1
IRLR2908
R4
1M
R3
10Ω
SNS
VCC
R5
1M
VOUT
CLAMPED AT 16V
GATE
R1
59k
OUT
FB
SHDN
R2
4.99k
AOUT
IN+
UV RISING = 5.04V
LT4356DE-2
R7
100k
FLT
GND
*DIODES INC.
EN
TMR
4356 TA04
CTMR
0.1µF
Overvoltage Regulator with Low Battery Detection and Output Keep Alive During Shutdown
1k
0.5W
RSNS
10mΩ
VIN
12V
D2*
SMAJ58A
M1
IRLR2908
R3
10Ω
R4
402k
6
12
R5
105k
7
*DIODES INC.
5
SNS
4
GATE
VOUT
12V, 4A
CLAMPED AT 16V
M2
VN2222
3
OUT
VCC
IN+
FB
LT4356DE
AOUT
FLT
SHDN
GND
10
EN
TMR
1
R1
294k
D1
1N4746A
18V
1W
2
11
R2
VDD
24.9k
R6
47k
LBO
8
9
4356 TA05
CTMR
0.1µF
Rev. C
For more information www.analog.com
19
LT4356-1/LT4356-2
TYPICAL APPLICATIONS
2.5A, 48V Hot Swap with Overvoltage Output Regulation at 72V and UV Shutdown at 35V
RSNS
15mΩ
VIN
48V
M1
FDB3632
D2*
SMAT70A
R4
140k
R3
10Ω
VOUT
48V
2.5A
R6
100k
CL
300µF
C1
6.8nF
6
VCC
D1
1N4714
BV = 33V
7
5
4
SNS GATE
3
OUT
12
IN+
SHDN
R5
4.02k
R8
47k
LT4356DE
8
R7
1M
FB
R1
226k
2
R2
4.02k
FLT
9
EN
GND
*DIODES INC.
AOUT
TMR
10
1
11
PWRGD
4356 TA06
CTMR
0.1µF
2.5A, 28V Hot Swap with Overvoltage Output Regulation at 36V and UV Shutdown at 15V
RSNS
15mΩ
VIN
28V
M1
FDB3632
D2*
SMAT70A
R4
113k
R3
10Ω
VOUT
28V
2.5A
R6
27k
CL
300µF
C1
6.8nF
6
VCC
D1
1N4700
BV = 13V
7
5
4
SNS GATE
3
OUT
12
IN+
SHDN
R5
4.02k
R8
47k
LT4356DE
8
9
*DIODES INC.
FB
2
R1
110k
R2
4.02k
FLT
EN
R7
1M
GND
10
TMR
1
AOUT
11
PWRGD
4356 TA07
CTMR
0.1µF
Rev. C
20
For more information www.analog.com
LT4356-1/LT4356-2
TYPICAL APPLICATIONS
Overvoltage Regulator with Reverse Input Protection Up to –80V
RSNS
10mΩ
M2
IRLR2908
VIN
12V
Q1
2N3904
D2*
R4 SMAJ58CA
10Ω
R7
10k
4
GATE
5
SNS
VCC
VOUT
12V, 3A
CLAMPED
AT 16V
R3
10Ω
R5
1M
6
D1
1N4148
M1
IRLR2908
3
OUT
2
FB
R1
59k
R2
4.99k
D3**
IN4148
LT4356DE
7
11
12
SHDN
IN+
* DIODES INC.
** OPTIONAL COMPONENT FOR
REDUCED STANDBY CURRENT
8
FLT
AOUT
GND
10
1
9
EN
TMR
CTMR
0.1µF
4356 TA08
250mA High Voltage Low Dropout Linear Regulator
VIN
20V
RSNS
0.2Ω
M1
PSMN4R8 –100BSE
R3
10Ω
4
GATE
5
SNS
6
R1
59k
VOUT
16V/250mA
CL
100µF
3
OUT
FB
VCC
2
R2
4.99k
7
8
9
SHDN
LT4356DE
*THE OUTPUT LOAD STEP
RESPONSE IS SLOW DUE TO
THE RESPONSE TIME OF THE
INTERNAL CHARGE PUMP
FLT
EN
GND
10
TMR
1
R3
7.5k
4356 TA09
Rev. C
For more information www.analog.com
21
LT4356-1/LT4356-2
PACKAGE DESCRIPTION
DE/UE Package
12-Lead Plastic DFN (4mm × 3mm)
(Reference LTC DWG # 05-08-1695 Rev D)
0.70 ±0.05
3.60 ±0.05
2.20 ±0.05
3.30 ±0.05
1.70 ± 0.05
PACKAGE OUTLINE
0.25 ± 0.05
0.50 BSC
2.50 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
4.00 ±0.10
(2 SIDES)
7
R = 0.115
TYP
0.40 ± 0.10
12
R = 0.05
TYP
PIN 1
TOP MARK
(NOTE 6)
0.200 REF
3.30 ±0.10
3.00 ±0.10
(2 SIDES)
1.70 ± 0.10
0.75 ±0.05
6
0.25 ± 0.05
1
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
CHAMFER
(UE12/DE12) DFN 0806 REV D
0.50 BSC
2.50 REF
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE A VARIATION OF VERSION
(WGED) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
Rev. C
22
For more information www.analog.com
LT4356-1/LT4356-2
PACKAGE DESCRIPTION
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661 Rev F)
0.889 ±0.127
(.035 ±.005)
5.10
(.201)
MIN
3.20 – 3.45
(.126 – .136)
3.00 ±0.102
(.118 ±.004)
(NOTE 3)
0.50
0.305 ±0.038
(.0197)
(.0120 ±.0015)
BSC
TYP
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
10 9 8 7 6
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
4.90 ±0.152
(.193 ±.006)
DETAIL “A”
0.497 ±0.076
(.0196 ±.003)
REF
0° – 6° TYP
GAUGE PLANE
1 2 3 4 5
0.53 ±0.152
(.021 ±.006)
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.86
(.034)
REF
1.10
(.043)
MAX
0.17 – 0.27
(.007 – .011)
TYP
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.1016 ±0.0508
(.004 ±.002)
MSOP (MS) 0213 REV F
Rev. C
For more information www.analog.com
23
LT4356-1/LT4356-2
PACKAGE DESCRIPTION
S Package
16-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610 Rev G)
.386 – .394
(9.804 – 10.008)
NOTE 3
.045 ±.005
.050 BSC
16
N
14
13
12
11
10
9
N
.245
MIN
.160 ±.005
.150 – .157
(3.810 – 3.988)
NOTE 3
.228 – .244
(5.791 – 6.197)
1
.030 ±.005
TYP
15
2
3
N/2
N/2
RECOMMENDED SOLDER PAD LAYOUT
.010 – .020
× 45°
(0.254 – 0.508)
.008 – .010
(0.203 – 0.254)
1
2
3
4
5
.053 – .069
(1.346 – 1.752)
NOTE:
1. DIMENSIONS IN
.014 – .019
(0.355 – 0.483)
TYP
7
8
.004 – .010
(0.101 – 0.254)
0° – 8° TYP
.016 – .050
(0.406 – 1.270)
6
.050
(1.270)
BSC
S16 REV G 0212
INCHES
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE
Rev. C
24
For more information www.analog.com
LT4356-1/LT4356-2
REVISION HISTORY
(Revision history begins at Rev A)
REV
DATE
DESCRIPTION
A
05/10
Revised Features and Description
Added parameters to VOL and updated Max value for VSHDN(FLT) in the Electrical Characteristics section
Revised Pin Functions section
PAGE NUMBER
1
4, 5
8
Replaced Figure 6 and made text edits in the Operation and Applications Information sections
10-17
Updated drawings in the Typical Applications section
19, 21
B
09/17
Updated TMR pin function with minimum recommended capacitance
8
C
01/20
Revised SHDN Pin Function Description
8
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license For
is granted
implication or
otherwise under any patent or patent rights of Analog Devices.
more by
information
www.analog.com
25
LT4356-1/LT4356-2
TYPICAL APPLICATION
Overvoltage Regulator with Linear Regulator Up to 100mA
Q2
2N2905A
RSNS
10mΩ
VIN
12V
M1
IRLR2908
D2*
SMAJ58A
R6
100k
11
7
2.5V, 100mA
VOUT
12V, 3A
CLAMPED AT 16V
R3
10Ω
4
GATE
5
SNS
6
C5
10µF
R1
59k
3
OUT
VCC
FB
2
R2
4.99k
LT4356DE
AOUT
12
IN+
SHDN
FLT
GND
*DIODES INC.
EN
TMR
10
1
8
R4
249k
C3
47nF
R5
249k
9
4356 TA10
CTMR
0.1µF
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Rev. C
26
01/20
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