LT8609/LT8609A/LT8609B
42V, 3A Synchronous Step-Down
Regulator with 2.5µA Quiescent Current
DESCRIPTION
FEATURES
Wide Input Voltage Range: 3.0V to 42V
n Ultralow Quiescent Current Burst Mode® Operation:
n 0.5),
a minimum inductance is required to avoid sub-harmonic
oscillation. See Application Note 19.
twice its nominal value, possibly exceeding the LT8609/
LT8609A/LT8609B’s voltage rating. This situation is easily
avoided (see Analog Devices Application Note 88).
Output Capacitor and Output Ripple
The output capacitor has two essential functions. Along
with the inductor, it filters the square wave generated by the
LT8609/LT8609A/LT8609B to produce the DC output. In this
role it determines the output ripple, thus low impedance at
the switching frequency is important. The second function is
to store energy in order to satisfy transient loads and stabilize the LT8609/LT8609A/LT8609B’s control loop. Ceramic
capacitors have very low equivalent series resistance (ESR)
and provide the best ripple performance. A good starting
value is:
Input Capacitor
Bypass the input of the LT8609/LT8609A/LT8609B circuit
with a ceramic capacitor of X7R or X5R type. Y5V types have
poor performance over temperature and applied voltage,
and should not be used. A 4.7μF to 10μF ceramic capacitor
is adequate to bypass the LT8609/LT8609A/LT8609B and
will easily handle the ripple current. Note that larger input
capacitance is required when a lower switching frequency
is used. If the input power source has high impedance, or
there is significant inductance due to long wires or cables,
additional bulk capacitance may be necessary. This can
be provided with a low performance electrolytic capacitor.
Step-down regulators draw current from the input supply in pulses with very fast rise and fall times. The input
capacitor is required to reduce the resulting voltage ripple
at the LT8609/LT8609A/LT8609B and to force this very
high frequency switching current into a tight local loop,
minimizing EMI. A 4.7μF capacitor is capable of this task,
but only if it is placed close to the LT8609/LT8609A/
LT8609B (see the PCB Layout section). A second precaution regarding the ceramic input capacitor concerns the
maximum input voltage rating of the LT8609/LT8609A/
LT8609B. A ceramic input capacitor combined with trace
or cable inductance forms a high quality (under damped)
tank circuit. If the LT8609/LT8609A/LT8609B circuit is
plugged into a live supply, the input voltage can ring to
COUT =
100
VOUT • fSW
where fSW is in MHz, and COUT is the recommended
output capacitance in μF. Use X5R or X7R types. This
choice will provide low output ripple and good transient
response. Transient performance of adjustable output
parts can be improved with a higher value output capacitor and the addition of a feedforward capacitor placed
between VOUT and FB. Increasing the output capacitance
will also decrease the output voltage ripple. A lower value
of output capacitor can be used to save space and cost
but transient performance will suffer and may cause loop
instability. See the Typical Applications in this data sheet
for suggested capacitor values.
When choosing a capacitor, special attention should be
given to the data sheet to calculate the effective capacitance under the relevant operating conditions of voltage
bias and temperature. A physically larger capacitor or one
with a higher voltage rating may be required.
Ceramic Capacitors
Ceramic capacitors are small, robust and have very
low ESR. However, ceramic capacitors can cause problems when used with the LT8609/LT8609A/LT8609B
due to their piezoelectric nature. When in Burst Mode
operation, the LT8609/LT8609A/LT8609B’s switching frequency depends on the load current, and at very
Rev. J
For more information www.analog.com
17
LT8609/LT8609A/LT8609B
APPLICATIONS INFORMATION
light loads the LT8609/LT8609A/LT8609B can excite
the ceramic capacitor at audio frequencies, generating audible noise. Since the LT8609/LT8609A/LT8609B
operates at a lower current limit during Burst Mode
operation, the noise is typically very quiet to a casual ear.
If this is unacceptable, use a high performance tantalum
or electrolytic capacitor at the output.
A final precaution regarding ceramic capacitors concerns
the maximum input voltage rating of the LT8609/LT8609A/
LT8609B. As previously mentioned, a ceramic input
capacitor combined with trace or cable inductance forms
a high quality (under damped) tank circuit. If the LT8609/
LT8609A/LT8609B circuit is plugged into a live supply, the
input voltage can ring to twice its nominal value, possibly
exceeding the LT8609/LT8609A/LT8609B’s rating. This
situation is easily avoided (see Application Note 88).
Enable Pin
The LT8609/LT8609A/LT8609B is in shutdown when the
EN pin is low and active when the pin is high. The rising
threshold of the EN comparator is 1.05V, with 50mV of
hysteresis. The EN pin can be tied to VIN if the shutdown
feature is not used, or tied to a logic level if shutdown
control is required.
Adding a resistor divider from VIN to EN programs the
LT8609/LT8609A/LT8609B to regulate the output only
when VIN is above a desired voltage (see Block Diagram).
Typically, this threshold, VIN(EN), is used in situations
where the input supply is current limited, or has a relatively high source resistance. A switching regulator
draws constant power from the source, so source current increases as source voltage drops. This looks like
a negative resistance load to the source and can cause
the source to current limit or latch low under low source
voltage conditions. The VIN(EN) threshold prevents the
regulator from operating at source voltages where the
problems might occur. This threshold can be adjusted by
setting the values R3 and R4 such that they satisfy the
following equation:
⎛ R3 ⎞
VIN(EN) = ⎜ +1⎟ •1V
⎝ R4 ⎠
18
where the LT8609/LT8609A/LT8609B will remain off until VIN
is above VIN(EN). Due to the comparator’s hysteresis, switching will not stop until the input falls slightly below VIN(EN).
When in Burst Mode operation for light-load currents,
the current through the VIN(EN) resistor network can easily be greater than the supply current consumed by the
LT8609/LT8609A/LT8609B. Therefore, the VIN(EN) resistors should be large to minimize their effect on efficiency
at low loads.
INTVCC Regulator
An internal low dropout (LDO) regulator produces the
3.5V supply from VIN that powers the drivers and the
internal bias circuitry. The INTVCC can supply enough
current for the LT8609/LT8609A/LT8609B’s circuitry
and must be bypassed to ground with a minimum of
1μF ceramic capacitor. Good bypassing is necessary to
supply the high transient currents required by the power
MOSFET gate drivers. Applications with high input voltage
and high switching frequency will increase die temperature because of the higher power dissipation across the
LDO. Do not connect an external load to the INTVCC pin.
Output Voltage Tracking and Soft-Start
The LT8609/LT8609A/LT8609B allows the user to
program its output voltage ramp rate by means of
the TR/SS pin. An internal 2μA pulls up the TR/SS
pin to INTVCC. Putting an external capacitor on TR/
SS enables soft-starting the output to prevent current surge on the input supply. During the soft-start
ramp the output voltage will proportionally track the
TR/SS pin voltage. For output tracking applications, TR/
SS can be externally driven by another voltage source.
From 0V to 0.782V, the TR/SS voltage will override the
internal 0.782V reference input to the error amplifier, thus
regulating the FB pin voltage to that of TR/SS pin. In the
LT8609A-3.3 and LT8609A-5 fixed output voltage options
the output voltage will track the TR/SS pin voltage based
on a factor set by the internal feedback resistor divider.
The 3.3V output options will track to a voltage 4.2 times
that of the TR/SS pin, while the 5V output options will
track to a voltage 6.39 times that of the TR/SS pin. When
Rev. J
For more information www.analog.com
LT8609/LT8609A/LT8609B
APPLICATIONS INFORMATION
TR/SS is above 0.782V, tracking is disabled and the feedback voltage will regulate to the internal reference voltage.
An active pull-down circuit is connected to the TR/SS pin
which will discharge the external soft-start capacitor in
the case of fault conditions and restart the ramp when the
faults are cleared. Fault conditions that clear the soft-start
capacitor are the EN/UV pin transitioning low, VIN voltage
falling too low, or thermal shutdown.
Output Power Good
When the LT8609/LT8609A/LT8609B’s adjustable output voltage is within the ±8.5% window of the regulation
point, which is a VFB voltage in the range of 0.716V to
0.849V (typical), the output voltage is considered good
and the open-drain PG pin goes high impedance and is
typically pulled high with an external resistor. Otherwise,
the internal drain pull-down device will pull the PG pin
low. To prevent glitching both the upper and lower thresholds include 0.5% of hysteresis. The LT8609A-3.3 and
LT8609A-5 use a ±7.5% power good window around the
regulation point, which for the 3.3V output version corresponds to a 3.0525V to 3.5475V range (typical) and for
the 5V output version corresponds to a 4.625V to 5.375V
range (typical).
The PG pin is also actively pulled low during several fault
conditions: EN/UV pin is below 1V, INTVCC has fallen too
low, VIN is too low, or thermal shutdown.
Synchronization
To select low ripple Burst Mode operation, tie the SYNC
pin below 0.4V (this can be ground or a logic low output). To synchronize the LT8609/LT8609A oscillator to
an external frequency connect a square wave (with 20%
to 80% duty cycle) to the SYNC pin. The square wave
amplitude should have valleys that are below 0.9V and
peaks above 2.7V (up to 5V).
The LT8609/LT8609A will not enter Burst Mode operation at low output loads while synchronized to an external clock, but instead will pulse skip to maintain regulation. The LT8609/LT8609A may be synchronized over
a 200kHz to 2.2MHz range. The RT resistor should be
chosen to set the LT8609/LT8609A switching frequency
equal to or below the lowest synchronization input. For
example, if the synchronization signal will be 500kHz and
higher, the RT should be selected for 500kHz. The slope
compensation is set by the RT value, while the minimum
slope compensation required to avoid subharmonic oscillations is established by the inductor size, input voltage,
and output voltage. Since the synchronization frequency
will not change the slopes of the inductor current waveform, if the inductor is large enough to avoid subharmonic
oscillations at the frequency set by RT, then the slope
compensation will be sufficient for all synchronization
frequencies.
For some applications, it is desirable for the LT8609/
LT8609A to operate in pulse-skipping mode, which is the
only mode available to the LT8609B. Pulse-skipping mode
offers two major differences from Burst Mode operation.
First is the clock stays awake at all times and all switching cycles are aligned to the clock. Second is that full
switching frequency is reached at lower output load than
in Burst Mode operation as shown in Figure 1b in an earlier section. These two differences come at the expense
of increased quiescent current. To enable pulse-skipping
mode the SYNC pin is floated.
For some applications, reduced EMI operation may be
desirable, which can be achieved through spread spectrum modulation. This mode operates similar to pulse
skipping mode operation, with the key difference that the
switching frequency is modulated up and down by a 3kHz
triangle wave. The modulation has the frequency set by RT
as the low frequency, and modulates up to approximately
20% higher than the frequency set by RT. To enable spread
spectrum mode, tie SYNC to INTVCC or drive to a voltage
between 3.2V and 5V.
The LT8609/LT8609A/LT8609B does not operate in forced
continuous mode regardless of SYNC signal.
Shorted and Reversed Input Protection
The LT8609/LT8609A/LT8609B will tolerate a shorted
output. Several features are used for protection during
output short-circuit and brownout conditions. The first
is the switching frequency will be folded back while the
output is lower than the set point to maintain inductor current control. Second, the bottom switch current is monitored such that if inductor current is beyond safe levels
For more information www.analog.com
Rev. J
19
LT8609/LT8609A/LT8609B
APPLICATIONS INFORMATION
switching of the top switch will be delayed until such time
as the inductor current falls to safe levels. This allows
for tailoring the LT8609/LT8609A/LT8609B to individual
applications and limiting thermal dissipation during short
circuit conditions.
Frequency foldback behavior depends on the state of the
SYNC pin: If the SYNC pin is low or high, or floated the
switching frequency will slow while the output voltage is
lower than the programmed level. If the SYNC pin is connected to a clock source, the LT8609/LT8609A/LT8609B
will stay at the programmed frequency without foldback
and only slow switching if the inductor current exceeds
safe levels.
There is another situation to consider in systems where
the output will be held high when the input to the LT8609/
LT8609A/LT8609B is absent. This may occur in battery
charging applications or in battery backup systems where
a battery or some other supply is diode ORed with the
LT8609/LT8609A/LT8609B’s output. If the VIN pin is
allowed to float and the EN pin is held high (either by a
logic signal or because it is tied to VIN), then the LT8609/
LT8609A/LT8609B’s internal circuitry will pull its quiescent current through its SW pin. This is acceptable if the
system can tolerate several μA in this state. If the EN pin
is grounded the SW pin current will drop to near 0.7µA.
However, if the VIN pin is grounded while the output is
held high, regardless of EN, parasitic body diodes inside
the LT8609/LT8609A/LT8609B can pull current from the
output through the SW pin and the VIN pin. Figure 3 shows
a connection of the VIN and EN/UV pins that will allow the
LT8609/LT8609A/LT8609B to run only when the input
voltage is present and that protects against a shorted or
reversed input.
D1
VIN
VIN
LT8609
EN/UV
GND
8609 F03
Figure 3. Reverse VIN Protection
20
PCB Layout
For proper operation and minimum EMI, care must be
taken during printed circuit board layout. Figure 4 shows
the recommended component placement with trace,
ground plane and via locations. Note that large, switched
currents flow in the LT8609/LT8609A/LT8609B’s VIN
pins, GND pins, and the input capacitor (CIN). The loop
formed by the input capacitor should be as small as
possible by placing the capacitor adjacent to the VIN and
GND pins. When using a physically large input capacitor
the resulting loop may become too large in which case
using a small case/value capacitor placed close to the
VIN and GND pins plus a larger capacitor further away
is preferred. These components, along with the inductor and output capacitor, should be placed on the same
side of the circuit board, and their connections should
be made on that layer. Place a local, unbroken ground
plane under the application circuit on the layer closest
to the surface layer. The SW and BOOST nodes should
be as small as possible. Finally, keep the FB and RT
nodes small so that the ground traces will shield them
from the SW and BOOST nodes. The exposed pad on the
bottom of the package must be soldered to ground so
that the pad is connected to ground electrically and also
acts as a heat sink thermally. To keep thermal resistance
low, extend the ground plane as much as possible, and
add thermal vias under and near the LT8609/LT8609A/
LT8609B to additional ground planes within the circuit
board and on the bottom side.
Thermal Considerations and Peak Current Output
For higher ambient temperatures, care should be taken
in the layout of the PCB to ensure good heat sinking of
the LT8609/LT8609A/LT8609B. The exposed pad on the
bottom of the package must be soldered to a ground
plane. This ground should be tied to large copper layers
below with thermal vias; these layers will spread heat
dissipated by the LT8609/LT8609A/LT8609B. Placing
additional vias can reduce thermal resistance further. The
maximum load current should be derated as the ambient
temperature approaches the maximum junction rating.
Rev. J
For more information www.analog.com
LT8609/LT8609A/LT8609B
APPLICATIONS INFORMATION
GROUND PLANE ON LAYER 2
COUT
L
CIN
CBST
1
CVCC
CIN(OPT)
RT
RPG
R4
R3
R1
CFF
GND VIA
VIN VIA
VOUT VIA
EN/UV VIA
R2
CSS
OTHER SIGNAL VIA
8609 F04
Figure 4. PCB Layout
Power dissipation within the LT8609/LT8609A/LT8609B
can be estimated by calculating the total power loss from
an efficiency measurement and subtracting the inductor loss. The die temperature is calculated by multiplying
the LT8609/LT8609A/LT8609B power dissipation by the
thermal resistance from junction to ambient. The LT8609/
LT8609A/LT8609B will stop switching and indicate a fault
condition if safe junction temperature is exceeded.
Temperature rise of the LT8609/LT8609A/LT8609B is
worst when operating at high load, high VIN, and high
switching frequency. If the case temperature is too high
for a given application, then either VIN, switching frequency or load current can be decreased to reduce the
temperature to an acceptable level. Figure 5 shows how
case temperature rise can be managed by reducing VIN.
Figure 6 shows an example of how case temperature
rise changes with the duty cycle of a 10Hz pulsed 3A
load. Junction temperature will be higher than case
temperature.
Rev. J
For more information www.analog.com
21
LT8609/LT8609A/LT8609B
APPLICATIONS INFORMATION
60
VIN=12V
VIN=24V
50 STANDBY LOAD = 50mA
PULSED LOAD = 3A
VOUT = 5V
40 f = 2MHz
SW
CASE TEMPERATURE RISE (°C)
CASE TEMPERATURE RISE (°C)
60
30
20
10
0
0
VIN=12V
VIN=24V
50 STANDBY LOAD = 50mA
PULSED LOAD = 3A
VOUT = 5V
40 f = 2MHz
SW
30
20
10
0
10 20 30 40 50 60 70 80 90 100
DUTY CYCLE (%)
0
10 20 30 40 50 60 70 80 90 100
DUTY CYCLE (%)
8609 F06
8609 F06
Figure 5. Case Temperature Rise vs Load Current
Figure 6. Case Temperature Rise vs 3A Pulsed Load
TYPICAL APPLICATIONS
3.3V Step-Down
VIN
4.3V
TO 42V
C2
4.7µF
C1
0.1µF
VIN
EN/UV
BST
SYNC
SW
L1
2.2µH
R4
100k
LT8609A
INTVCC
C3
1µF
C6
10nF
R1
18.2k
PG
C5
10pF
TR/SS
RT
FB
GND
fSW = 2MHz
R3
309k
R2
1M
L1 = COILCRAFT XFL4020-222ME
VOUT
3.3V
3A
POWER
GOOD
C4
22µF
1206
8609 TA02
5V Step-Down
VIN
6V
TO 42V
C2
4.7µF
C1
0.1µF
VIN
EN/UV
BST
SYNC
SW
L1
2.2µH
R4
100k
LT8609A
INTVCC
C3
1µF
C6
10nF
R1
18.2k
fSW = 2MHz
22
PG
C5
10pF
TR/SS
RT
GND
FB
R3
187k
R2
1M
L1 = COILCRAFT XFL4020-222ME
VOUT
5V
3A
POWER
GOOD
C4
22µF
1206
8609 TA03
Rev. J
For more information www.analog.com
LT8609/LT8609A/LT8609B
TYPICAL APPLICATIONS
12V Step-Down
VIN
13V
TO 42V
C1
0.1µF
VIN
C2
4.7µF
EN/UV
BST
SYNC
SW
L1
10µH
R4
100k
LT8609
INTVCC
C3
1µF
C6
10nF
R1
40.2k
PG
C5
10pF
TR/SS
RT
FB
GND
FSW = 1MHz
R3
69.8k
R2
1M
L1 = COILCRAFT XAL4040-103ME
VOUT
12V
3A
POWER
GOOD
C4
22µF
1210
8609 TA04
1.8V 2MHz Step-Down Converter
VIN
2.8V
TO 20V
(42V TRANSIENT)
C1
0.1µF
VIN
C2
4.7µF
BST
EN/UV
SW
SYNC
C6
10nF
M1
NFET
R1
18.2k
R4
100k
LT8609
INTVCC
C3
1µF
PSKIP
L1
2.2µH
PG
C5
10pF
TR/SS
RT
FB
GND
fSW = 2MHz
R3
768k
R2
1M
L1 = COILCRAFT XFL4020-222ME
VOUT
1.8V
3A
POWER
GOOD
C4
47µF
1210
8609 TA05
3.3V 2MHz Step-Down Converter
VIN
4.3V
TO 42V
C2
4.7µF
C1
0.1µF
VIN
BST
EN/UV
LT8609A-3.3
SW
SYNC
INTVCC
C3
1µF
C6
10nF
R1
18.2k
fSW = 2MHz
L1
2.2µH
PG
R4
100k
VOUT
3.3V
3A
POWER
GOOD
TR/SS
RT
GND
VOUT
L1 = COILCRAFT XFL4020-222ME
C4
47µF
1206
8609 TA08
Rev. J
For more information www.analog.com
23
LT8609/LT8609A/LT8609B
TYPICAL APPLICATIONS
5V 2MHz Step-Down Converter
VIN
6V
TO 42V
C1
0.1µF
VIN
C2
4.7µF
BST
EN/UV
LT8609A-5
L1
2.2µH
SW
R4
100k
SYNC
INTVCC
C3
1µF
PG
VOUT
5V
3A
POWER
GOOD
TR/SS
C6
10nF
R1
18.2k
RT
GND
fSW = 2MHz
VOUT
C4
47µF
1206
L1 = COILCRAFT XFL4020-222ME
8609 TA09
Ultralow EMI 5V 2A Step-Down Converter
VIN
6V TO 40V
FB1
BEAD
L3
4.7µH
C8
4.7µF
C7
4.7µF
C9
33μF
VIN
C2
4.7µF
BST
EN/UV
SYNC
SW
C1
0.1µF
L1
8.2µH
R4
100K
LT8609A
PG
INTVCC
C5
10pF
TR/SS
C3
1µF
C6
10nF
fSW = 400kHz
24
FB
RT
R1
110k
GND
R3
301k
R2
1M
L1 = COILCRAFT XAL4040-822
FB1 = TDK MPZ2012S221AT000
C9 = OS-CON 63SXV33M
VOUT
3.3V
3A
POWER GOOD
C4
47µF
1210
8609 TA06
Rev. J
For more information www.analog.com
LT8609/LT8609A/LT8609B
PACKAGE DESCRIPTION
MSE Package
10-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1664 Rev I)
BOTTOM VIEW OF
EXPOSED PAD OPTION
1.88 ±0.102
(.074 ±.004)
5.10
(.201)
MIN
1
0.889 ±0.127
(.035 ±.005)
1.68 ±0.102
(.066 ±.004)
0.05 REF
10
0.305 ± 0.038
(.0120 ±.0015)
TYP
RECOMMENDED SOLDER PAD LAYOUT
3.00 ±0.102
(.118 ±.004)
(NOTE 3)
DETAIL “B”
CORNER TAIL IS PART OF
DETAIL “B” THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
NO MEASUREMENT PURPOSE
10 9 8 7 6
DETAIL “A”
0° – 6° TYP
1 2 3 4 5
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
DETAIL “A”
0.18
(.007)
0.497 ±0.076
(.0196 ±.003)
REF
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
4.90 ±0.152
(.193 ±.006)
0.254
(.010)
0.29
REF
1.68
(.066)
3.20 – 3.45
(.126 – .136)
0.50
(.0197)
BSC
1.88
(.074)
SEATING
PLANE
1.10
(.043)
MAX
0.17 – 0.27
(.007 – .011)
TYP
0.50
(.0197)
NOTE:
BSC
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD
SHALL NOT EXCEED 0.254mm (.010") PER SIDE.
0.86
(.034)
REF
0.1016 ±0.0508
(.004 ±.002)
MSOP (MSE) 0213 REV I
Rev. J
For more information www.analog.com
25
LT8609/LT8609A/LT8609B
PACKAGE DESCRIPTION
MSE Package
16-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1667 Rev F)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102
(.112 ±.004)
5.10
(.201)
MIN
2.845 ±0.102
(.112 ±.004)
0.889 ±0.127
(.035 ±.005)
8
1
1.651 ±0.102
(.065 ±.004)
1.651 ±0.102 3.20 – 3.45
(.065 ±.004) (.126 – .136)
0.305 ±0.038
(.0120 ±.0015)
TYP
16
0.50
(.0197)
BSC
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
0.35
REF
0.12 REF
DETAIL “B”
CORNER TAIL IS PART OF
DETAIL “B” THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
9
NO MEASUREMENT PURPOSE
0.280 ±0.076
(.011 ±.003)
REF
16151413121110 9
DETAIL “A”
0° – 6° TYP
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
4.90 ±0.152
(.193 ±.006)
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
DETAIL “A”
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
1234567 8
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
26
0.86
(.034)
REF
0.1016 ±0.0508
(.004 ±.002)
MSOP (MSE16) 0213 REV F
Rev. J
For more information www.analog.com
LT8609/LT8609A/LT8609B
PACKAGE DESCRIPTION
DDM Package
10-Lead Plastic Side Wettable DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1647 Rev Ø)
R = 0.125
TYP
6
0.40 ±0.10
10
1.65 ±0.10
(2 SIDES)
3.00 ±0.10
(4 SIDES)
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
CHAMFER
PIN 1
TOP MARK
(SEE NOTE 5)
5
0.200 REF
1
0.75 ±0.05
DETAIL A
0.00 – 0.05
NOTE:
1. DRAWING NOT TO SCALE
2. ALL DIMENSIONS ARE IN MILLIMETERS
3. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
4. EXPOSED PAD SHALL BE SOLDER PLATED
5. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
(DDM) DFN REV Ø 0518
0.25 ±0.05
0.50 BSC
2.40 ±0.10
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
DETAIL A
TERMINAL LENGTH
0.40 ± 0.10
0.10 REF
0.05 REF
0.203 REF
TERMINAL THICKNESS
PLATED AREA
0.70 ±0.05
3.55 ±0.05
1.65 ±0.05
2.15 ±0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 ±0.05
0.50
BSC
2.40 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
Rev. J
For more information www.analog.com
27
LT8609/LT8609A/LT8609B
REVISION HISTORY
REV
DATE
DESCRIPTION
A
01/16
Added the LT8609A Version to Header
PAGE NUMBER
All
Added the LT8609A Version to Description
1
Clarified Description
1
Clarified Electrical Specifications
3
Clarified Load Regulation, Line Regulation, No-Load Supply Current vs Temperature, Minimum On-Time vs
Temperature Graphs, Frequency Foldback and Soft-Start vs Temperature Graphs
5, 6, 7, 8
Clarified Block Diagram with Optional Input Resistors
10
Replaced Figure 1 with Table 1 in text
12
Clarified CIN Capacitor in Text and PCB Layout
18
Clarified Typical Application
24
6
B
06/16
Clarified Switch Drop vs Switch Current Graph axis units
Clarified Switching Waveforms conditions
8
C
10/16
Added LT8609B Option
All
Added LT8609B Option to Absolute Maximum Ratings, Added LT8609B Package Drawing and Ordering Information
2
Clarified Electrical Parameters and Notes for LT8609B Option
3
Clarified Top FET Current Limit vs Temperature Graph
6
Clarified Pin Functions to Include LT8609B
10
Clarified Operation Section to Include LT8609B
12
Clarified Applications Information Section to Include LT8609B
Clarified Graphs in Figure 5 and 6
13 – 20
20
Clarified Typical Applications Schematics
21, 22, 23, 24
D
01/17
Clarified Graphs
6, 7, 20
Clarified Schematics
23, 26
E
06/17
Add H-grade to the A version
2, 4
Modified application circuits
21, 22, 23
F
G
11/17
01/18
Clarified Oscillator Frequency RT Conditions
3
Clarified Minimum Off Time
3
Clarified Efficiency Graph
5
Clarified Frequency Foldback Graph
8
Clarified Block Diagram
11
Clarified Maximum Duty Cycle
14
Clarified Figure 4
19
Added MSOP-16E Package option
1, 2, 24
Clarified the Pin Functions
28
10
Rev. J
For more information www.analog.com
LT8609/LT8609A/LT8609B
REVISION HISTORY
REV
DATE
DESCRIPTION
H
02/19
Changed 2A/3A to 3A.
Replaced all graphs with IOUT to 3A.
01/20
08/21
1, 5, 6, 7, 8
2
Eliminated “The internal circuitry…” paragraph.
15
Clarified Figure 4 PCB Layout.
19
Clarified Figure 5.
20
20
Updated Typical Applications.
21, 22
Added DFN version parts and J Grades.
1, 2, 3
Clarified parametric table.
4, 5
Added fixed output graphs.
6, 7 ,8
Clarified Pin Functions.
11
Clarified Block Diagram.
12
Clarified Operation to include fixed output options.
13
Added text for fixed output options.
15
Added text in Output Capacitor and Output Ripple for fixed output options.
17
Added text in Output Voltage Tracking section for fixed output options.
18
Added text in Output Power Good section for fixed output options.
19
Clarified Typical Applications.
J
1
Added LT8609AJMSE16 and LT8609AJMSE options.
Eliminated “The LT8609/LT8609A/LT8609B’s…” paragraph.
I
PAGE NUMBER
Clarified Output Reference Voltage for LT8609A-3.3 and Line Regulations under Electrical Characteristics table.
22-25
4
Rev. J
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
moreby
information
www.analog.com
subject to change without notice. No license For
is granted
implication or
otherwise under any patent or patent rights of Analog Devices.
29
LT8609/LT8609A/LT8609B
TYPICAL APPLICATION
Tracking 3.3V and 1.8V 2MHz Converters
VIN
4.3V
TO 20V
(42V TRANSIENT)
C2
4.7µF
C1
0.1µF
VIN
BST
EN/UV
R1
18.2k
R4
100k
LT8609
INTVCC
C6
10nF
VOUT
3.3V, 3A
SW
SYNC
C3
1µF
L1
2.2µH
PG
C5
10pF
TR/SS
RT
GND
FB
R3
309k
R2
1M
POWER
GOOD
C4
47µF
1210
fSW = 2MHz
C8
4.7µF
R9
10k
BST
EN/UV
SYNC
R8
100k
LT8609
PG
C11
10pF
TR/SS
R10
31.6k
R5
18.2k
L2
2.2µH
SW
INTVCC
C12
1µF
C7
0.1µF
VIN
RT
GND
FB
R7
768k
R6
1M
fSW = 2MHz
VOUT
1.8V
3A
POWER
GOOD
C10
47µF
1210
8609 TA07
RELATED PARTS
PART NUMBER DESCRIPTION
COMMENTS
LT8610A/
LT8610AB
42V, 3.5A, 96% Efficiency, 2.2MHz Synchronous MicroPower Step-Down VIN = 3.4V to 42V, VOUT(MIN) = 0.97V, IQ = 2.5µA, ISD
工商网监
湘ICP备2023018690号
