OP77FJ

a Next Generation OP07 Ultralow Offset Voltage Operational Amplifier OP77 PIN CONNECTIONS Epoxy Mini-Dip (P-Suffix) 8-Pin Hermetic DIP FEATURES Outstanding Gain Linearity Ultrahigh Gain 5000 V/mV Min Low VOS Over Temperature 60 V Max Excellent TCVos 0.3 V/ C Max High PSRR 3 V/V Max Low Power Consumption 60 mW Max Fits OP07, 725,108A/308A, 741 Sockets Available in Die Form VOS TRIM 1 –IN 2 +IN 3 V– 4 OP07 8 VOS TRIM 7 V+ 6 OUT 5 NC NC = NO CONNECT GENERAL DESCRIPTION The OP77 significantly advances the state-of-the-art in precision op amps. The OP77’s outstanding gain of 10,000,000 or more is maintained over the full 10 V output range. This exceptional gain-linearity eliminates incorrectable system nonlinearities common in previous monolithic op amps, and provides superior performance in high closed-loop gain applications. Low initial VOS drift and rapid stabilization time, combined with only 50 mW power consumption, are significant improvements over previous designs. These characteristics, plus the exceptional TCVOS of 0.3 mV/∞C maximum and the low VOS of 25 mV maximum, eliminates the need for VOS adjustment and increases system accuracy over temperature. PSRR of 3 mV/V (110 dB) and CMRR of 1.0 mV/V maximum virtually eliminate errors caused by power supply drifts and common-mode signals. This combination of outstanding characteristics makes the OP77 ideally suited for high-resolution instrumentation and other tight error budget systems. TO-99 (J-Suffix) VOS TRIM VOS TRIM 1 –IN 2 +IN 3 4V– (CASE) NC = NO CONNECT V+ OUT NC OP07 V+ 7 NOTE: R2A AND R2B ARE ELECTRONICALLY ADJUSTED ON CHIP AT FACTORY. Q7 Q5 NONINVERTING INPUT INVERTING INPUT 3 R3 Q1 2 R4 Q21 Q22 Q23 Q24 Q2 Q13 Q3 Q6 R2A (OPTIONAL NULL) 8 1 R1A R2B C1 R1B Q19 Q9 Q8 Q4 Q27 Q26 Q25 Q14 R6 Q15 Q18 R8 C3 R5 Q11 Q12 C2 Q17 Q10 R9 R10 Q20 OUTPUT 6 R7 Q16 4 V– R EV. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2002 OP77–SPECIFICATIONS ELECTRICAL SPECIFICATIONS (@ V = s 15 V, TA = 25 C, unless otherwise noted.) Conditions Min OP77A Typ 10 Max 25 Unit mV mV/Mo nA 2.0 0.6 18.0 13.0 11.0 30 0.80 0.23 0.17 nA mV p-p nV/÷Hz Parameter INPUT OFFSET VOLTAGE LONG-TERM INPUT OFFSET VOLTAGE STABILITY1 INPUT OFFSET CURRENT INPUT BIAS CURRENT INPUT NOISE VOLTAGE 2 2 Symbol VOS DVOS/Time IOS IB enp-p en 0.2 0.3 –0.2 0.1 Hz to 10 Hz fO = 10 Hz fO = 100 Hz fO = 1000 Hz 0.1 Hz to10 Hz fO = 10 Hz fO = 100 Hz fO = 1000 Hz 26 ± 13 VCM = ± 13 V VS = ± 3 V to ± 18 V RL ≥ 2 kW ≥ VO = ± 10V RL ≥ 10 kW RL ≥ 2 kW RL ≥ 1 kW RL ≥ 2 kW AVCL = +1 VS = ± 15 V, No Load VS = ± 3 V, No Load RP = 2 0 k W 5000 ± 13.5 ± 12.5 ± 12.0 0.1 0.4 1.2 0.35 10.3 10.0 9.6 14 0.32 0.14 0.12 45 200 ± 14 0.1 0.7 12000 ± 14.0 ± 13.0 ± 12.5 0.3 0.6 60 50 3.5 ±3 60 4.5 1.0 3 INPUT NOISE VOLTAGE DENSITY INPUT NOISE CURRENT2 INPUT NOISE CURRENT DENSITY 2 inp-p in pA p-p pA/÷Hz INPUT RESISTANCE Differential Mode3 Common Mode INPUT VOLTAGE RANGE COMMON-MODE REJECTION RATIO POWER SUPPLY REJECTION RATIO LARGE-SIGNAL VOLTAGE GAIN OUTPUT VOLTAGE SWING RIN RINCM IVR CMRR PSRR AVO VO MV GV V mV/V mV/V V/mV V SLEW RATE2 CLOSED-LOOP BANDWIDTH 2 SR BW V/ms MHz W mW mV OPEN-LOOP OUTPUT RESISTANCE RO POWER CONSUMPTION OFFSET ADJUSTMENT RANGE Pd NOTES 1 Long-Term Input Offset Voltage Stability refers to the averaged trend line of V OS vs. Time over extended periods after the first 30 days of operation. Excluding the initial hour of operation, changes in V OS during the first 30 operating days are typically 2.5 mV. 2 Sample tested. 3 Guaranteed by design. –2– REV. C OP77 SPECIFICATIONS ELECTRICAL SPECIFICATIONS (@ V = s 15 V, –55 C £ TA £ 125 C, unless otherwise noted.) Conditions Min OP77A Typ 25 0.1 0.5 1.5 –0.2 2.4 8 ± 13 VCM = ± 13 V VS = ± 3 V to ± 18 V RL ≥ 2 kW ≥ VO = ± 10 V RL ≥ 10 kW VS = ± 15 V, No Load 2000 ± 12 ± 13.5 0.1 1 6000 ± 13.0 60 75 Max 60 0.3 2.2 25 4 25 0.6 1.0 3 Unit mV mV/∞C nA pA/∞C nA pA/∞C V mV/V mV/V V/mV V mW Parameter INPUT OFFSET VOLTAGE AVERAGE INPUT OFFSET VOLTAGE DRIFT1 INPUT OFFSET CURRENT AVERAGE INPUT OFFSET CURRENT DRIFT2 INPUT BIAS CURRENT AVERAGE INPUT BIAS CURRENT DRIFT2 INPUT VOLTAGE RANGE COMMON-MODE REJECTION RATIO POWER SUPPLY REJECTION RATIO LARGE-SIGNAL VOLTAGE GAIN OUTPUT VOLTAGE SWING POWER CONSUMPTION NOTES 1 OP77A: TCVCS is 100% tested. 2 Guaranteed by design. Symbol VOS TCVOS IOS TCIOS IB TCIB IVR CMRR PSRR AVO VO Pd REV. C –3– OP77–SPECIFICATIONS ELECTRICAL CHARACTERISTICS (@ V = s 15 V, TA = 125 C, unless otherwise noted.) Min OP77E Typ Max 10 0.3 0.3 –0.2 1.2 0.35 10.3 10.0 9.6 14 0.32 0.14 0.12 26 45 200 200 13 14 0.1 0.7 5000 13.5 12.5 12.0 0.1 0.4 12000 14.0 13.0 12.5 0.3 0.6 60 1.0 3.0 2000 13.5 12.5 12.0 0.1 0.4 13 1.5 2.0 0.6 18.0 13.0 11.0 30 0.80 0.23 0.17 18.5 –0.2 25 Min OP77F Typ Max 20 0.4 0.3 1.2 0.38 10.5 10.2 9.8 15 0.35 0.15 0.13 45 200 200 14 0.1 0.7 6000 14.0 13.0 12.5 0.3 0.6 60 60 4.5 50 3.5 3 60 4.5 1.6 3.0 2.8 2.8 0.65 20.0 13.5 11.5 35 0.90 0.27 0.18 60 Unit mV mV/Mo nA nA mVp-p nV/÷Hz Parameter INPUT OFFSET VOLTAGE LONG-TERM STABILITY1 INPUT OFFSET CURRENT INPUT BIAS CURRENT INPUT NOISE VOLTAGE2 INPUT NOISE VOLTAGE DENSITY Symbol VOS VOS/Time IOS IB enp-p en Conditions 0.1 Hz to 10 Hz fO = 10 Hz fO = 100 Hz2 fO = 1000 Hz 0.1 Hz to 10 Hz fO = 10 Hz fO = 100 Hz2 fO = 1000 Hz INPUT NOISE CURRENT2 INPUT NOISE CURRENT DENSITY inp-p in pAp-p pA÷Hz INPUT RESISTANCE Differential Mode3 Common Mode INPUT RESISTANCE Common Mode INPUT VOLTAGE RANGE COMMON-MODE REJECTION RATIO POWER SUPPLY REJECTION RATIO LARGE-SIGNAL VOLTAGE GAIN OUTPUT VOLTAGE SWING RIN RINCM RINCM IVR CMRR PSRR AVO VO VCM = 13 V MW GW GW V mV/V mV/V V/mV V VS = 3 V to 18 V RL ≥ 2 k RL ≥ 10 k RL ≥ 2 k RL ≥ 1 k RL ≥ 2 k AVCL 1 SLEW RATE2 CLOSED-LOOP BANDWIDTH2 OPEN-LOOP OUTPUT RESISTANCE POWER CONSUMPTION OFFSET ADJUSTMENT RANGE SR BW RO Pd V/ms MHz W mW mV VS = VS = 15 V, No Load 3 V, No Load 50 3.5 3 Rp = 20 kn NOTES 1 Long-Term Input Offset Voltage Stability refers to the averaged trend line of V OS vs. Time over extended periods after the first 30 days of operation. Excluding the initial hour of operation, changes in V OS during the first 30 operating days are typically 2.5 mV. 2 Sample tested. 3 Guaranteed by design. –4– REV. C OP77 SPECIFICATIONS ELECTRICAL CHARACTERISTICS (@ V = s 15 V, –25 C £ TA £ +85 C for OP77E/FJ and OP77E/FZ, unless otherwise noted.) Min OP77E Typ Max 10 10 0.1 03 0.5 1.5 45 55 0.3 0.6 2.2 4.0 4.0 40 13.5 0.1 18 V 2000 12 1.0 6000 13.0 60 75 1.0 3.0 1000 12 13.0 -0.2 Min OP77F Typ Max 20 20 0.2 0.4 0.5 1.5 2.4 15 13.5 0.1 1.0 4000 13.0 60 75 3.0 5.0 100 100 0.6 1.0 4.5 85 6.0 60 Unit mV mV/∞C nA pA/ C nA pA/∞C V pVlV mV/V V/mV V mW Parameter INPUT OFFSET VOLTAGE AVERAGE INPUT OFFSET VOLTAGE DRIFT1 INPUT OFFSET CURRENT AVERAGE INPUT OFFSET CURRENT DRIFT2 INPUT BIAS CURRENT AVERAGE INPUT BIAS CURRENT DRIFT2 INPUT VOLTAGE RANGE COMMON-MODE REJECTION RATIO POWER SUPPLY REJECTION RATIO LARGE-SIGNAL VOLTAGE GAIN OUTPUT VOLTAGE SWING POWER CONSUMPTION Symbol V TVCOS IOS TCIOS IB TCIB IVR CMRR PSRR AVO VO Pd Conditions J. Z Packages J. Z Packages E, F -0.2 2.4 8 13.0 VCM = VS = 13 V 3 V to RL ≥ 2 kW V O = 10 V RL ≥ 2 kW VS = 15 V, No Load NOTES 1 OP77E: TCVOS is 100% tested on J and Z packages. 2 Guaranteed by end-point limits. REV. C –5– OP77–SPECIFICATIONS WAFER TEST LIMITS (@ V = s 15 V, TA = 25 C, for OP77N devices, unless otherwise noted.) Symbol VOS IOS IB RIN IVR CMRR PSRR VO VCM = ± 13 V VS = ± 3 V to ± 18 V RL = 10 kW RL = 2 kW RL = 1 kW RL = 2 kW VO = ± 10 V VOUT = 0 V Conditions OP77N Limit 40 2.0 ±2 26 ± 13 1 3 ± 13.5 ± 12.5 ± 12.0 2000 ± 30 Pd 60 Unit mV Max nA Max nA Max MW Min V Min mV/V Max mV/VMax V Min Parameter INPUT OFFSET VOLTAGE INPUT OFFSET CURRENT INPUT BIAS CURRENT INPUT RESISTANCE Differential Mode INPUT VOLTAGE RANGE COMMON-MODE REJECTION RATIO POWER SUPPLY REJECTION RATIO OUTPUT VOLTAGE SWING LARGE-SIGNAL VOLTAGE GAIN DIFFERENTIAL INPUT VOLTAGE POWER CONSUMPTION AVO V/mV Min V Max mW Max NOTES 1 Guaranteed by design. 2 Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing. TYPICAL ELECTRICAL CHARACTERISTICS (@ V = s 15 V, TA = 25 C, unless otherwise noted.) Conditions RS = 50 W RS = 50 W, RP = 20 kW RL ≥ 2 kW AVCL + 1 OP77N Limit 0.1 0.1 0.5 0.3 0.6 Unit mV/OC mV/∞C pA/∞C V/ms MHz Parameter AVERAGE INPUT OFFSET VOLTAGE DRIFT NULLED INPUT OFFSET VOLTAGE DRIFT AVERAGE INPUT OFFSET CURRENT DRIFT SLEW RATE BANDWIDTH Symbol TCVOS TCVOSn TCIOS SR BW –6– REV. C OP77 Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 22 V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . ± 30 V Input Voltage2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 22 V Output Short-Circuit Duration . . . . . . . . . . . . . . . . . Indefinite Storage Temperature Range J and Z Packages . . . . . . . . . . . . . . . . . . . . –65∞C to +150∞C Operating Temperature Range OP77A . . . . . . . . . . . . . . . . . . . . . . . . . . . –55∞C to +125∞C OP77E, OPP77F (J, Z) . . . . . . . . . . . . . . . . –25∞C to +85∞C Junction Temperature (Tj) . . . . . . . . . . . . . –65∞C to +150∞C Lead Temperature (Soldering, 60 sec.) . . . . . . . . . . . . . 300∞C NOTES 1 Absolute Maximum Ratings apply to both DICE and packaged parts, unless otherwise noted. 2 For supply voltages less than ± 22 V, the absolute maximum input voltage is equal to the supply voltage. ABSOLUTE MAXIMUM RATINGS 1 BONDING DIAGRAM 1. BALANCE 2. INVERTING INPUT 3. NONINVERTING INPUT 4. V6. OUTPUT 7. V+ 8. BALANCE DIE SIZE 0.093 0.057 inch, 5301 sq. mm (2.36 1.45 mm, 3.42 sq. mm) ORDERING GUIDE Package Type TO-99 (J) 8-Lead Hermetic DIP (Z) jA jC Unit ∞C/W ∞C/W 150 148 18 16 Package Options CERDIP* TO-99 8-Lead OP77EJ OP77FJ OP77AZ OP77EZ OP77FZ Operating Temperature Range MIL IND IND NOTE jA is specified for worst-case mounting conditions, i.e., jA is specified for device in socket for TO, CERDIP, P-DIP, and PLCC packages; jA is specified for device soldered to printed circuit board for SO package. Not for new designs; obsolete April 2002. For Military processed devices, please refer to the Standard Microcircuit Drawing (SMD) available at www.dscc.dla.mil/programs/milspec/default.asp SMD Part Number 5962-87738012A 5962-8773802GA 5962-8773802PA ADI Equivalent OP77BRCMDA OP77AJMDA OP77AZMDA CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the OP77 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE REV. C –7– OP77–Typical Performance Characteristics 2 VS = INPUT VOLTAGE – V (NULLED TO 0 @VOUT = 0V) 25 16 VS = 15V OPEN-LOOP GAIN – V/ V 15V OPEN-LOOP GAIN – V/ V 20 TA = 25 C 1 RL = 10k TA = 25 C 12 RL = 2k 15 0 8 10 –1 4 5 –2 –10 –5 0 5 OUTPUT VOLTAGE – V 10 0 –55 –35 –15 0 5 25 45 65 85 105 125 TEMPERATURE – C 0 5 10 15 POWER SUPPLY VOLTAGE – V 20 TPC 1. Gain Linearity (Input Voltage vs. Output Voltage) TPC 2. Open-Loop Gain vs. Temperature TPC 3. Open-Loop Gain vs. Power Supply Voltage ABSOLUTE CHANGE IN INPUT OFFSET VOLTAGE – V CHANGE IN OFFSET VOLTAGE – V J, Z PACKAGES +0.3 V/ C MEAN CHANGE IN INPUT OFFSET VOLTAGE – V 30 20 4 3 2 1 0 –1 –2 –3 –4 VS = 15V TA = 25 C 30 VS = 25 15V 10 S.D. DEVICE IMMERSED IN 70 C OIL BATH (20 UNITS) 20 0 15 –10 10 MAX –20 –30 –55 –35 –15 –0.3 V/ C 5 MIN 0 0 10 AVE 5 25 45 65 85 105 125 TEMPERATURE – C 0.5 1 1.5 2 2.5 3 3.5 0 TIME AFTER POWER SUPPLY TURN-ON – MINUTES 20 30 40 TIME – SEC 50 60 70 TPC 4. Untrimmed Offset Voltage vs. Temperature TPC 5. Warm-Up Drift TPC 6. Offset Voltage Change Due to Thermal Shock 100 VS = 80 CLOSED-LOOP GAIN – dB 160 0 VS = 15V TA = 25 C 45 150 TA = 25 C 140 130 CMMR –dB 120 110 100 90 15V TA = 25 C OPEN-LOOP GAIN – dB 140 120 100 80 60 40 20 60 40 20 90 135 0 –20 10 100 1k 10k 10k FREQUENCY – Hz 1M 10M 0 0.01 0.1 1 180 10 100 1k 10k 100k 1M FREQUENCY – Hz 80 1 10 100 1k FREQUENCY – Hz 10k 100k TPC 7. Closed-Loop Response for Various Gain Configurations TPC 8. Open-Loop Gain/Phase Response TPC 9. CMRR vs. Frequency –8– REV. C OP77 130 120 110 PSRR – dB 100 90 80 70 60 0.1 TA = 25 C INPUT BIAS CURRENT – nA 4 VS = 15V INPUT OFFSET CURRENT – nA 2.0 VS = 15V 3 1.5 2 1.0 1 0.5 0 1.0 10 100 FREQUENCY – Hz 1k 10k 0 –50 0 50 TEMPERATURE – C 100 –50 0 50 TEMPERATURE – C 100 TPC 10. PSRR vs. Frequency TPC 11. Input Bias Current vs. Temperature TPC 12. Input Offset Current vs. Temperature 10 VS = 15V TA = 25 C 1000 INPUT NOISE VOLTAGE – nV/ Hz PEAK-TO-PEAK AMPLITUDE – V RS1 = RS2 = 200kV THERMAL NOISE OF SOURCE RESISTORS INCLUDED EXCLUDED 32 28 24 20 16 12 8 4 0 1k VS = 15V TA = 25 C RMS NOISE – mV 100 1.0 RS = 0 10 VS = 1 15V TA = 25 C 0.1 100 1k 10k FREQUENCY – Hz 100k 1 10 100 FREQUENCY – Hz 1k 10k 100k FREQUENCY – Hz 1M TPC 13. Input Wideband Noise vs. Bandwidth (0.1 Hz to Frequency Indicated) TPC 14. Total Input Noise Voltage vs. Frequency TPC 15. Maximum Output Swing vs. Frequency 100 TA = 25 C POWER CONSUMPTION – mW VS = 15V 10mV OUTPUT SHORT-CIRCUIT CURRENT – mA 20 TA = 25 C 40 VS = 35 15V TA = 25 C MAXIUM OUTPUT – VOLTS 15 VIN = POSITIVE SWING NEGATIVE SWING 10 30 10 25 5 20 0 0 10 20 30 40 TOTAL SUPPLY VOLTAGE, V+ TO V – V 0 100 15 1k LOAD RESISTANCE TO GROUND – 10k 0 4 1 2 3 TIME FROM OUTPUT BEING SHORTED – MINUTES TPC 16. Power Consumption vs. Power Supply TPC 17. Maximum Output Voltage vs. Load Resistance TPC 18. Output Short-Circuit Current vs. Time REV. C –9– OP77 200k 50 TYPICAL PRECISION OP AMP VY 1M VIN = 10V VX –10V 10 RL AVO ~ 650V/mV NOTES 1. GAIN NOT CONSTANT. CAUSES NONLINEAR ERRORS. 2. AVO SPEC IS ONLY PART OF THE SOLUTION. RL = 2k 0V OP77 VO 4000 VO 10k 100k VOS = VX +10V Figure 1. Typical Offset Voltage Test Circuit 2.5M V+ 100 100 2 3 7 OP77 4 V– 6 3.3k OUTPUT 4.7 F ( VO 25,000 10Hz FILTER) 3. CHECK THE OP AMP PERFORMANCE, ESPECIALLY AT TEMPERATURES. INPUT REFERRED NOISE = Figure 5. Open-Loop Gain Linearity Figure 2. Typical Low-Frequency Noise Test Circuit 20k V+ – INPUT + 2 3 1 8 4 V– 76 OP77 OUTPUT Actual open-loop voltage gain can vary greatly at various output voltages. All automated testers use endpoint testing and therefore only show the average gain. This causes errors in high closedloop gain circuits. Since this is so difficult for manufacturers to test, users should make their own evaluation. This simple test circuit makes it easy. An ideal op amp would show a horizontal scope trace. VY Figure 3. Optional Offset Nulling Circuit 100k +18V * + 10 F 10 –10V 0V +10V 0.1 F 2 3 10k 10k 7 VX OP77 4 10 6 0.1 F AVO ~ 650V/mV RL = 2k 10 F * + –18V * 1 PER BOARD Figure 4. Burn-In Circuit Figure 6. Output Gain Linearity Trace This is the output gain linearity trace for the new OP77. The output trace is virtually horizontal at all points, assuring extremely high gain accuracy. The average open-loop gain is truly impressive—approximately 10,000,000. –10– REV. C OP77 APPLICATIONS INFORMATION R2 Bilateral Current Source R3 1k +15V 0.1 F 1M VIN R1 100k R2 2 OP77 3 6 IOUT < 15mA R1 1k R3 1k 2 3 7 100k 6 OP77E 4 R5 10 R4 0.1 F R4 1M –15V 990 Figure 9. Basic Current Source R3 +15V Figure 7. Precision High-Gain Differential Amplifier VIN R1 R2 2 2N2222 The high gain, gain linearity, CMRR, and low TCVos of the OP77 make it possible to obtain performance not previously available in single-stage very high-gain amplifier applications. For best CMR, R1 R3 must equal . In this example, R2 R4 OP77 3 6 2N2907 R5 R4 –15V IOUT < 100mA IOUT = VIN ( R3 R1 – R5 ) with a 10 mV differential signal, the maximum errors are as listed in Table I. Table I. Maximum Errors GIVEN R3 = R4 R5, R1 = R2 Figure 10. 100 mA Current Source These current sources will supply both positive and negative current into a grounded load. AMOUNT 0.01%/V 0.02% 0.003%/∞C 0.008%/∞C Ê R4 ˆ R5 Á + 1˜ Ë R2 ¯ Note that ZO = R5 + R 4 R3 R2 R1 and that for ZO to be infinite, TYPE COMMON-MODE VOLTAGE GAIN LINEARITY, WORST CASE TCVOS TCI OS RF 10pF +15V 0.1 F RS INPUT 2 3 7 OP77 4 6 100 OUTPUT CLOAD 0.1 F –15V Figure 8. Isolating Large Capacitive Loads This circuit reduces maximum slew-rate but allows driving capacitive loads of any size without instability. Because the boon resistor is inside the feedback loop, its effect on output impedance is reduced to insignificance by the high open-loop gain of the OP77. REV. C –11– OP77 R5 + R 4 R3 must = R1 R2 Precision Current Sinks V+ RL IO VIN 200 IRF520 IO = VIN 3 2 1N4579A 6.4V 5% 5ppm/ C D1 7 2mA In these circuits, OP77’s high gain, high CMRR, and low TCVOS ensure high accuracy. R1 1.8k 15V R1 VIN > OV OP77 4 6 R2 3.6k EO = 10V OP77 FULL SCALE OF 1V, IO = 1A/V AVCL 1.6 R3 6.4k R1 1 1W Figure 13. High Stability Voltage Reference Figure 11. Positive Current Sink R1 200 OP77 VIN IRF520 IO RL V– IO = VIN This simple bootstrapped voltage reference provides a precise 10 V virtually independent of changes in power supply voltage, ambient temperature and output loading. Correct Zener operating current of exactly 2 mA is maintained by R1, a selected 5 ppm/∞C resistor, connected to the regulated output. Accuracy is primarily determined by three factors: the 5 ppm/∞C temperature coefficient of D1, 1 ppm/∞C ratio tracking of R2 and R3, and operational amplifier VOS errors. VOs errors, amplified by 1.6 (AVCL), appear at the output and can be significant with most monolithic amplifiers. For example, an ordinary amplifier with TCVOS of 5 mV/∞C contributes 0.8 ppm/ ∞C of output error while the OP77, with TCVOS of 0.3 mV/∞ C, contributes but 0.05 ppm/∞C of output error, thus effectively eliminating TCVOS as an error consideration. The high gain and low TCVOS assure accurate operation with inputs from microvolts to volts. In this circuit, the signal always R1 VIN > OV Figure 12. Positive Current Source These simple high-current sinks require the load to float between the power supply and the sink. 1k 1k +15V +15V 0.1 F C1 30pF D1 1N4148 2 2 7 6 VIN 3 D2 3 2N4393 R3 2k 0.1 F 7 OP77E 6 VOUT 0 < VOUT < 10V OP77E 4 0.1 F 4 0.1 F –15V –15V Figure 14. Precision Absolute Value Amplifier The high gain and low TCVOS assure accurate operation with inputs from microvolts to volts. In this circuit, the signal always appears as a common-mode signal to the op amps. The OP77E CMRR of 1 V/V assures errors of less than 2 ppm. –12– REV. C OP77 15V + 10 F 2 2 2 REF-01 VO 6 4 REF-01 VO 6 4 REF-01 VO 6 4 100 100 100 OP77 VOUT 0.1 F Figure 15. Low Noise Precision Reference This circuit relies upon OP77’s low TCVOS and noise combined with very high CMRR to provide precision buffering of the averaged REF01 voltage outputs. CH must be of polystyrene, Teflon*, or polyethylene to minimize dielectric absorption and leakage. The droop rate is determined by the size of CH and the bias current of the AD820. *Teflon is a registered trademark of the Dupont Company 1k 15V 0.1 F 2 VIN 1k 7 6 2N930 1k CH –15V RESET –15V 2 3 7 6 VOUT 1N4148 15V 0.1 F 3 OP77 4 0.1 F AD820 4 0.1 F Figure 16. Precision Positive Peak Detector REV. C –13– OP77 CC RF 100k +15V 0.1 F RS 1k 2 +15V 0.1 F 2 VIN VO 6 50k RA RC TRIM 5 7 6 D1 1N4148 VOUT VTH REF-02 TEMP 3 1.5k Rb1 OP77 0.1 F Rbp –15V VOUT OP77 R1 VIN 2k 3 4 0.1 F GND 4 –15V Figure 17. Precision Threshold Detector/Amplifier Figure 18. Precision Temperature Sensor Table II. Resistor Values When VIN < VTH, amplifier output swings negative, reverse biasing diode D1. VOUT = VTH if RL= • when VIN > VTH, the loop closes, VOUT = VTH + (VIN Ê Rˆ – VTH ) Á1 + F ˜ RS ¯ Ë TCVOUT SLOPE (S) TEMPERATURE RANGE OUTPUT VOLTAGE RANGE ZERO-SCALE Ra (± 1% Resistor) Rb1 (± 1% Resistor) Rbp (Potentiometer) Rc (± 1% Resistor) 10 mV/∞C –55∞C to +125∞C –0.55 V to +1.25 V 9.09 kW 1.5 kW 200 W 5.11 kW 100 mV/∞C 10 mV/∞F –55∞C to +125∞C –5.5 V to +12.5V 15 kW 1.82 kW 500 W 84.5 kW –67∞F to +257∞C –0.67 V to +2.57V 0V@0F 7.5 kW 1.21 kW 200 W 8.25 kW CC is selected to smooth the response of the loop. 0 V @ 0 ∞ C 0 V @ 0∞ C –14– REV. C OP77 OUTLINE DIMENSIONS 8-Lead Ceramic Dip – Glass Hermetic Seal [CERDIP] (Q-8) Dimensions shown in inches and (millimeters) 8-Lead Metal Can [TO-99] (H-08) Dimensions shown in inches and (millimeters) 0.005 (0.13) MIN 8 0.055 (1.40) MAX 5 REFERENCE PLANE 0.1850 (4.70) 0.1650 (4.19) 0.5000 (12.70) MIN 0.2500 (6.35) MIN 0.0500 (1.27) MAX 5 0.3700 (9.40) 0.3350 (8.51) 0.3350 (8.51) 0.3050 (7.75) PIN 1 1 4 0.310 (7.87) 0.220 (5.59) 0.1000 (2.54) BSC 0.1600 (4.06) 0.1400 (3.56) 0.0450 (1.14) 0.0270 (0.69) 0.100 (2.54) BSC 0.405 (10.29) MAX 0.200 (5.08) MAX 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) 0.060 (1.52) 0.015 (0.38) 0.150 (3.81) MIN SEATING 0.070 (1.78) PLANE 0.030 (0.76) 15 0 0.015 (0.38) 0.008 (0.20) 0.320 (8.13) 0.290 (7.37) 4 0.2000 (5.08) BSC 0.1000 (2.54) BSC 3 2 0.0190 (0.48) 0.0160 (0.41) 0.0210 (0.53) 0.0160 (0.41) BASE & SEATING PLANE 1 6 7 8 0.0400 (1.02) MAX 0.0400 (1.02) 0.0100 (0.25) 0.0340 (0.86) 0.0280 (0.71) 45 BSC CONTROLLING DIMENSIONS ARE IN INCH; MILLIMETERS DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN COMPLIANT TO JEDEC STANDARDS MO-002AK CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN REV. C –15– Revision History Location 10/02—Data Sheet changed from REV. B to REV. C. C00320–0–10/02(C) PRINTED IN U.S.A. Page Edits to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Figure 2 Caption Changed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 3 Caption Changed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Edits to Figure 10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2/02—Data Sheet changed from REV. A to REV. B. Remove 8-Lead SO PIN CONNECTION DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Changes to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Remove OP77B column from SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Remove OP77B column from ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–5 Remove OP77G column from WAFER TEST LIMITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Remove OP77G column from TYPICAL ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 – 16–