SSM2375

Preliminary Technical Data FEATURES Filterless Class-D r with spread-spectrum Σ-∆ modulation 3 W into 3 Ω load and 1.4 W into 8 Ω load at 5.0 V supply with 100 dB signal-to-noise ratio (SNR) High PSRR @ 217 Hz: 80dB Flexible gain adjustment pin: 0dB to 12dB in 3dB steps Fixed Input Impedance, 80kΩ User-selectable ultralow EMI emissions mode Single-supply operation from 2.5 V to 5.5 V 20 nA shutdown current Short-circuit and thermal protection with auto recovery Available in 9-ball, 1.5 mm × 1.5 mm WLCSP Pop-and-click suppression Filterless High Efficiency Mono 3 W Class-D Audio Amplifier SSM2375 Spread-spectrum pulse density modulation (PDM) is used to provide lower EMI-radiated emissions compared with other e inherent randomized nature of Class-D architectures. spread-spectrum PDM eliminates clock intermodulation (beating e ect) of several ampli ers in close proximity. SM2375 includes an optional modulation select pin (ultralow EMI emission mode) that signi cantly reduces the radiated emissions at the Class-D outputs, particularly above 100 MHz and can pass FCC Class B radiated emissions testing with 50cm unshielded speaker cable without any external ltering. evice also includes a highly exible gain select pin that only requires one series resistor in order to select between 0dB, 3dB, 6dB, 9dB, or 12dB. e bene t of this is to improve gain matching between multiple SSM2375 devices within a single application as compared to using external resistors to set gain. SM2375 has a micropower shutdown mode with a typical shutdown current of 20 nA. Shutdown is enabled by applying a logic low to the SD pin. device also includes pop-and-click suppression circuitry. minimizes voltage glitches at the output during turn-on and turn-o , reducing audible noise on activation and deactivation. Other included features to simplify system level integration of the SSM2375 are input low pass ltering to suppress out of band DAC noise interference to the PDM modulator and xed input impedance to simplify component selection across multiple platform production builds. SM2375 is speci ed over the industrial temperature range of −40°C to +85°C. It has built-in thermal shutdown and output short-circuit protection. It is available in a halogen-free 9-ball, 1.5 mm × 1.5 mm wafer level chip scale package (WLCSP). APPLICATIONS Mobile phones MP3 players Portable electronics GENERAL DESCRIPTION SM2375 is a fully integrated, high e ciency Class-D audio ampli er. It is designed to maximize performance for mobile phone applications. e application circuit requires a minimum of external components and operates from a single 2.5 V to 5.5 V supply. It is capable of delivering 3 W of continuous output power with less than 1% THD + N driving an 3 Ω load from a 5.0 V supply. SM2375 features a high e ciency, low noise modulation scheme that requires no external LC output lt modulation operates with high e ciency even at low output power. It operates with 93% e ciency at 1.4 W into 8 Ω or 85% e ciency at 3 W into 3 Ω from a 5.0 V supply and has an SNR of >100 dB. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Speci cations subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Rev. PrC One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2010 Analog Devices, Inc. All rights reserved. SSM2375 FUNCTIONAL BLOCK DIAGRAM Preliminary Technical Data Figure 1. Rev. PrC | Page 2 of 13 Preliminary Technical Data TABLE OF CONTENTS Features...............................................................................................1 Applications .......................................................................................1 General Description..........................................................................1 Functional Block Diagram ...............................................................2 Specifications .....................................................................................4 Absolute Maximum Ratings ............................................................6 Thermal Resistance.......................................................................6 ESD Caution ..................................................................................6 Pin Configuration and Function Descriptions .............................7 Typical Performance Characteristics ..............................................8 Typical Application Circuits ............................................................9 SSM2375 Theory of operation........................................................................10 Overview ......................................................................................10 Gain Selection..............................................................................10 Pop-and-Click Suppression .......................................................10 EMI Noise ....................................................................................10 Output Modulation Description...............................................10 Layout ...........................................................................................11 Input Capacitor Selection ..........................................................11 Proper Power Supply Decoupling.............................................11 Outline Dimensions........................................................................13 Rev. PrC | Page 3 of 13 SSM2375 SPECIFICATIONS VDD = 5.0 V, TA = 25oC, RL = 8 Ω +33 μH, EDGE = GND, unless otherwise noted. Table 1. Parameter DEVICE CHARACTERISTICS Output Power Symbol POUT Conditions Preliminary Technical Data Min Typ 1.42 0.72 0.33 1.77 0.91 0.42 2.52 1.28 0.56 3.171 1.6 0.72 3.21 1.52 0.68 3.71 1.9 0.85 93 0.01 0.01 Max Unit W W W W W W W W W W W W W W W W W W % % % V dB kHz mV V dB dB dB mA mA mA mA mA mA nA dB kΩ V V ms μs kΩ Efficiency Total Harmonic Distortion + Noise Input Common-Mode Voltage Range Common-Mode Rejection Ratio Average Switching Frequency Differential Output Offset Voltage POWER SUPPLY Supply Voltage Range Power Supply Rejection Ratio η THD + N VCM CMRRGSM fSW VOOS VDD PSRR PSRRGSM ISY RL = 8 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V RL = 8 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V RL = 8 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 2.5 V RL = 8 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V RL = 8 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V RL = 8 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 2.5V RL = 4 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V RL = 4 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V RL = 4 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 2.5 V RL = 4 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V RL = 4 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V RL = 4 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 2.5 V RL = 3 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V RL = 3 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V RL = 3 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 2.5V RL = 3 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V RL = 3 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V RL = 3 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 2.5 V POUT = 1.4 W, 8 Ω, VDD = 5.0 V POUT = 1 W into 8 Ω, f = 1 kHz, VDD = 5.0 V POUT = 0.5 W into 8 Ω, f = 1 kHz, VDD = 3.6 V 1.0 VCM = 2.5 V ± 100 mV at 217 Hz, output referred G = 6 dB Guaranteed from PSRR test VDD = 2.5 V to 5.0 V, dc input floating/ground VRIPPLE = 100 mV at 217 Hz, inputs ac GND, CIN = 0.1 μF VRIPPLE = 100 mV at 1 kHz, inputs ac GND, CIN = 0.1 μF VIN = 0 V, no load, VDD = 5.0 V VIN = 0 V, no load, VDD = 3.6 V VIN = 0 V, no load, VDD = 2.5 V VIN = 0 V, load = 8 Ω + 33 μH, VDD = 5.0 V VIN = 0 V, load = 8 Ω + 33 μH, VDD = 3.6 V VIN = 0 V, load = 8 Ω + 33 μH, VDD = 2.5 V SD = GND 2.5 VDD − 1 55 250 0.1 5.0 5.5 Supply Current Shutdown Current GAIN CONTROL Closed-Loop Gain Input Impedance SHUTDOWN CONTROL Input Voltage High Input Voltage Low Turn-On Time Turn-Off Time Output Impedance ISD Av ZIN VIH VIL tWU tSD ZOUT 78 80 80 3.0 2.7 2.5 3.1 2.8 2.6 20 0 12 80 1.35 0.35 SD = VDD, Fixed Input Impedance (0-12dB) SD rising edge from GND to VDD SD falling edge from VDD to GND SD = GND Rev. PrC | Page 4 of 13 12.5 5 >100 Preliminary Technical Data Parameter NOISE PERFORMANCE Output Voltage Noise Signal-to-Noise Ratio 1 SSM2375 Conditions VDD = 5 V, f = 20 Hz to 20 kHz, inputs are ac grounded, AV = 6 dB, A weighting POUT = 1.4 W, RL = 8 Ω Min Typ 30 100 Max Unit μV dB Symbol en SNR Although the SSM2375 has good audio quality above 3 W, continuous output power beyond 3 W must be avoided due to device packaging limitations. Rev. PrC | Page 5 of 13 SSM2375 ABSOLUTE MAXIMUM RATINGS Absolute maximum ratings apply at 25°C, unless otherwise noted. Table 2. Parameter Supply Voltage Input Voltage Common-Mode Input Voltage Storage Temperature Range Operating Temperature Range Junction Temperature Range Lead Temperature (Soldering, 60 sec) ESD Susceptibility Rating 6V VDD VDD −65°C to +150°C −40°C to +85°C −65°C to +165°C 300°C 4 kV Preliminary Technical Data THERMAL RESISTANCE θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 3. Package Type 9-ball, 1.5 mm × 1.5 mm WLCSP PCB 1S0P 2S0P θJA 162 76 θJB 39 21 Unit °C/W °C/W ESD CAUTION Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. PrC | Page 6 of 13 Preliminary Technical Data PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SSM2375 Figure 2. Pin Configuration Table 4. Pin Function Descriptions Pin No. 1A 1B 1C 2A 2B 2C 3A 3B 3C Mnemonic IN− IN+ GND SD EDGE VDD GAIN OUT− OUT+ Description Inverting Input. Noninverting Input. Ground. Shutdown Input. Active low digital input. Edge Rate Control. Active high. Power Supply. Gain Control Pin Inverting Output. Noninverting Output. Rev. PrC | Page 7 of 13 SSM2375 TYPICAL PERFORMANCE CHARACTERISTICS 0 -10 -20 -30 -40 5.0V 8oh -50 -60 -70 -80 -90 - 100 0.01 3.6V 8oh 2.5V 8oh Efficiency (%) 100.00 90.00 80.00 70.00 60.00 50.00 40.00 30.00 20.00 10.00 0 .00 0.000 Preliminary Technical Data PVDD 5.0V PVDD 3.6V 0.1 1 10 0.200 0.400 0.600 0.800 Power (W) 1.000 1.200 1.400 1.600 Figure 3. THD + N vs. Output Power into 8 Ω + 33 μH Figure 4. Efficiciency into 8Ω + 33 μH load Rev. PrC | Page 8 of 13 Preliminary Technical Data TYPICAL APPLICATION CIRCUITS TBD SSM2375 Rev. PrC | Page 9 of 13 SSM2375 THEORY OF OPERATION OVERVIEW The SSM2375 mono Class-D audio amplifier features a filterless modulation scheme that greatly reduces the external component count, conserving board space and, thus, reducing systems cost. The SSM2375 does not require an output filter but, instead, relies on the inherent inductance of the speaker coil and the natural filtering of the speaker and human ear to fully recover the audio component of the square wave output. Most Class-D amplifiers use some variation of pulse-width modulation (PWM), but the SSM2375 uses Σ-Δ modulation to determine the switching pattern of the output devices, resulting in a number of important benefits. Σ-Δ modulators do not produce a sharp peak with many harmonics in the AM frequency band, as pulsewidth modulators often do. Σ-Δ modulation provides the benefits of reducing the amplitude of spectral components at high frequencies, that is, reducing EMI emission that might otherwise be radiated by speakers and long cable traces. Due to the inherent spread-spectrum nature of Σ-Δ modulation, the need for oscillator synchronization is eliminated for designs incorporating multiple SSM2375 amplifiers. The SSM2375 also integrates overcurrent and temperature protection. Preliminary Technical Data device. For applications having difficulty passing FCC Class B emission tests, the SSM2375 includes a modulation select pin (ultralow EMI emission mode) that significantly reduces the radiated emissions at the Class-D outputs, particularly above 100 MHz. Figure 5 shows SSM2375 EMI emission tests performed in a certified FCC Class-B laboratory in normal emissions mode (EDGE = GND). Figure 6 shows SSM2375 EMI emission with EDGE = VDD, placing the device in low emissions mode. Figure 5. EMI Emissions from SSM2375, 50 cm Cable, 5V VDD, EDGE = GND GAIN SELECTION In addition, preset gain of SSM2375 can be set from 0dB to 12 dB in 3dB steps with one external resistor (optional). The external resistor is used to select 9dB and 12dB gain settings, as shown below in Table 5. Table 5. Gain Function Descriptions Gain Setting 12dB 9dB 6dB 3dB 0dB GAIN Pin Configuration Tie to VDD through 47k Ω Tie to GND through 47k Ω Tie to VDD Open Tie to GND Figure 6. EMI Emissions from SSM2375, 50cm Cable, 5V VDD, EDGE = VDD POP-AND-CLICK SUPPRESSION Voltage transients at the output of audio amplifiers may occur when shutdown is activated or deactivated. Voltage transients as low as 10 mV can be heard as an audio pop in the speaker. Clicks and pops can also be classified as undesirable audible transients generated by the amplifier system and, therefore, as not coming from the system input signal. The SSM2375 has a pop-and-click suppression architecture that reduces these output transients, resulting in noiseless activation and deactivation from the SD control pin. The measurements for Figure 5 and Figure 6 were taken in an FCC-certified EMI laboratory with a 1 kHz input signal, producing 0.5 W output power into an 8 Ω load from a 5 V supply. Cable length was 50 cm, unshielded twisted pair speaker cable. Note that reducing the supply voltage greatly reduces radiated emissions. OUTPUT MODULATION DESCRIPTION The SSM2375 uses three-level, Σ-Δ output modulation. Each output can swing from GND to VDD and vice versa. Ideally, when no input signal is present, the output differential voltage is 0 V because there is no need to generate a pulse. In a real-world situation, there are always noise sources present. Due to this constant presence of noise, a differential pulse is generated, when required, in response to this stimulus. A small amount of current flows into the inductive load when the differential pulse is generated. However, most of the time, output differential voltage is 0 V, due to the Analog Devices three-level, EMI NOISE The SSM2375 uses a proprietary modulation and spreadspectrum technology to minimize EMI emissions from the Rev. PrC | Page 10 of 13 Preliminary Technical Data Σ-Δ output modulation. This feature ensures that the current flowing through the inductive load is small. When the user wants to send an input signal, an output pulse is generated to follow input voltage. The differential pulse density is increased by raising the input signal level. Figure 7 depicts three-level, Σ-Δ output modulation with and without input stimulus. OUTPUT = 0V +5V SSM2375 ground plane side of a double-sided board is often disrupted by signal crossover. If the system has separate analog and digital ground and power planes, the analog ground plane should be directly beneath the analog power plane, and, similarly, the digital ground plane should be directly beneath the digital power plane. There should be no overlap between analog and digital ground planes or between analog and digital power planes. OUT+ 0V +5V INPUT CAPACITOR SELECTION The SSM2375 does not require input coupling capacitors if the input signal is biased from 1.0 V to VDD − 1.0 V. Input capacitors are required if the input signal is not biased within this recommended input dc common-mode voltage range, if high-pass filtering is needed, or if a single-ended source is used. If highpass filtering is needed at the input, the input capacitor and the input resistor of the SSM2375 form a high-pass filter whose corner frequency is determined by the following equation: fC = 1/(2π × RIN × CIN) The input capacitor can significantly affect the performance of the circuit. Not using input capacitors degrades both the output offset of the amplifier and the DC PSRR performance. OUT– 0V +5V VOUT OUTPUT > 0V 0V –5V +5V OUT+ 0V +5V OUT– 0V +5V VOUT 0V OUTPUT < 0V +5V OUT+ 0V +5V OUT– 0V 0V VOUT –5V 08084-007 PROPER POWER SUPPLY DECOUPLING To ensure high efficiency, low total harmonic distortion (THD), and high PSRR, proper power supply decoupling is necessary. Noise transients on the power supply lines are short-duration voltage spikes. These spikes can contain frequency components that extend into the hundreds of megahertz. The power supply input must be decoupled with a good quality, low ESL, low ESR capacitor, greater than 4.7 μF. This capacitor bypasses low frequency noises to the ground plane. For high frequency transient noises, use a 0.1 μF capacitor as close as possible to the VDD pin of the device. Placing the decoupling capacitor as close as possible to the SSM2375 helps to maintain efficient performance. Figure 7. Three-Level, Σ-Δ Output Modulation With and Without Input Stimulus LAYOUT As output power continues to increase, care must be taken to lay out PCB traces and wires properly among the amplifier, load, and power supply. A good practice is to use short, wide PCB tracks to decrease voltage drops and minimize inductance. Ensure that track widths are at least 200 mil for every inch of track length for lowest DCR, and use 1 oz. or 2 oz. copper PCB traces to further reduce IR drops and inductance. A poor layout increases voltage drops, consequently affecting efficiency. Use large traces for the power supply inputs and amplifier outputs to minimize losses due to parasitic trace resistance. Proper grounding guidelines help to improve audio performance, minimize crosstalk between channels, and prevent switching noise from coupling into the audio signal. To maintain high output swing and high peak output power, the PCB traces that connect the output pins to the load and supply pins should be as wide as possible to maintain the minimum trace resistances. It is also recommended that a large ground plane be used for minimum impedances. In addition, good PCB layout isolates critical analog paths from sources of high interference. High frequency circuits (analog and digital) should be separated from low frequency circuits. Properly designed multilayer PCBs can reduce EMI emission and increase immunity to the RF field by a factor of 10 or more, compared with double-sided boards. A multilayer board allows a complete layer to be used for the ground plane, whereas the Rev. PrC | Page 11 of 13 SSM2375 Preliminary Technical Data Rev. PrC | Page 12 of 13 Preliminary Technical Data OUTLINE DIMENSIONS 1.490 1.460 SQ 1.430 0.655 0.600 0.545 SEATING PLANE 0.350 0.320 0.290 3 2 1 A SSM2375 A1 BALL CORNER B 0.50 BALL PITCH TOP VIEW (BALL SIDE DOWN) C 0.385 0.360 0.335 BOTTOM VIEW 0.270 0.240 0.210 (BALL SIDE UP) Figure 8. 9-Ball Wafer Level Chip Scale Package [WLCSP] (CB-9-2) Dimensions shown in millimeters ©2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PR09011-0-3/10(PrC) Rev. PrC | Page 13 of 13 101507-C