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APL1705-RT

APL1705-RT

  • 厂商:

    ASB

  • 封装:

  • 描述:

    APL1705-RT - PLL Module - Advanced Semiconductor Business Inc.

  • 数据手册
  • 价格&库存
APL1705-RT 数据手册
plerowTM APL1705-R/T PLL Module Features · +4 dBm Output Level at 1705 MHz ·2 nd Description The plerowTM PLL synthesizer module was designed for use in wireless and wireline systems in a wide range of frequency from 50 MHz to 6 GHz. ASB’s PLL provides exceptionally low spurious and phase noise performance with fast locking time and low current consumption. All products are available in a surface-mount type package. Harmonic : < -20 dBc · Spurious Level : < -70 dBc · Lock Time : < 10ms · 30 mA Current Consumption · Strip-line Resonator Specifications Parameter Frequency Range Output Power Supply Voltage Current Consumption Channel Step Size Unit MHz dBm V mA kHz dBc dBc ms MHz dBm dBc/Hz Ω °C mm -40 3 -80 -105 -120 50 +25 SMT, 19.0W×19.0L×5.8H +85 -75 -100 -115 +2 4.7 Min. Typical 1705 +4 5.0 26 -30 -20 -70 10 +6 5.3 30 Website: www.asb.co.kr E-mail: sales@asb.co.kr Tel: (82) 42-528-7223 Fax: (82) 42-528-7222 ASB Inc., 4th Fl. Venture Town Bldg., 367-17 Goijeong-Dong, Seo-Gu, Daejon 302-716, Korea Max. More Information 2nd Harmonics Spurious Level Lock Time Reference Frequency Reference Input Level @ 1 kHz Phase Noise (C / N) @ 10 kHz @ 100 kHz Output Impedance Operating Temp. Range Package Type & Size 1) Measurement conditions are as follows: T = 25°C, VCC =5.0 V, Freq. = 1705 MHz, 50 ohm system. Outline Drawing Top View Bottom View Pin Configuration Dimension (mm) A 19.0 B 19.0 C 5.8 D 1.5 E 0.5 F 1.75 G 1.35 H 15.0 I 0.9 Tolerance: ± 0.2 D A E F I C B Side View H G 1 2 3 4 9 13 15 16 Others Ground Ground Ground Ground VCC (VCO) RF OUT VCP (PLL) LOCK DETECT Ground 1/1 www.asb.co.kr 6/1/2006
APL1705-RT 价格&库存

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