DS38EP100-EVK

DS80EP100-EVK / DS38EP100-EVK User Guide DS80EP100 5 to 12.5 Gbps, DS38EP100 1 to 5 Gbps Power-Saver Equalizer for Backplanes and Cables Overview The DS80EP100 / DS38EP100 evaluation board provides a typical application for the evaluation of the DS80EP100 / DS38EP100 Power-Saver equalizer. It can be connected to backplanes or cables through SMA connectors. Specifications Data Inputs (IOA+ and IOA-): High-speed data inputs. Acceptable data input speed 5 to 12.5 Gbps (DS80EP100), and 1 to 5 Gbps (DS38EP100). For more details, please refer to the datasheet. Outputs (IOB+ and IOB-): High-speed data outputs. For more details, please refer to the datasheet. Input Voltage (all inputs): up to 3.6V p-p. Bill of Materials DESIGNATION JP1,JP2,JP3,JP4 U1 QTY 4 1 Schematics DS80EP100EVK / DS38EP100EVK User Guide June 2007 © National Semiconductor Corporation DESCRIPTION Edge Launch SMA 142-0701-851 DS80EP100 / DS38EP100 Layout (Top Layer) Note: The center DAP of DS80EP100 / DS38EP100 has to be “No Connect”. The center pad of following top layer is floating, and it does NOT connect to the GND. DS80EP100EVK / DS38EP100EVK User Guide June 2007 © National Semiconductor Corporation IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. 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