OPA2335M

Burr Brown Products from Texas Instruments OPA2335M SGLS320 – SEPTEMBER 2006 0.05 µV/°C MAX, SINGLE-SUPPLY CMOS OPERATIONAL AMPLIFIER ZERO-DRIFT SERIES FEATURES • • • • • • • • • • • Low Offset Voltage: 5 µV (max) Zero Drift: 0.02 µV/°C (typ) Quiescent Current: 570 µA Single-Supply Operation Ceramic DIP Package DESCRIPTION The OPA2335 CMOS operational amplifier uses auto-zeroing techniques to simultaneously provide very low offset voltage (5 µV max), and near-zero drift over time and temperature. This high-precision, low quiescent current amplifier offers high input impedance and rail-to-rail output swing. Single or dual supplies as low as 2.7 V (±1.35 V) and up to 5.5 V (±2.75 V) may be used. This op amp is optimized for low-voltage, single-supply operation. The OPA2335 is available in a CDIP-8 package and is specified for operation from –55°C to 125°C. APPLICATIONS Transducer Applications Temperature Measurement Electronic Scales Medical Instrumentation Battery-Powered Instruments Handheld Test Equipment Population Population Absolute Value; Centered Around Zero −3.0 −2.7 −2.4 −2.1 −1.8 −1.5 −1.2 −0.9 −0.6 −0.3 0.0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3.0 0.005 0.010 0.015 0.020 0.025 0.030 0.035 0.040 0.045 Offset Voltage − µV G001 0.000 Offset Voltage Drift − µV/°C Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2006, Texas Instruments Incorporated 0.050 G002 OPA2335M SGLS320 – SEPTEMBER 2006 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE/ORDERING INFORMATION PRODUCT OPA2335 PACKAGE LEAD CDIP-8 PACKAGE DESIGNATOR JG SPECIFIED TEMPERATURE RANGE –55°C to 125°C PACKAGE MARKING OPA2335AMJG ORDERING NUMBER OPA2335AMJG PIN CONFIGURATIONS OPA2335 Out A 1 -In A +In A 2 3 A B 8 7 6 5 CDIP V+ Out B -In B +In B V- 4 P0037-01 ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) VALUE Supply voltage Signal input terminals Output short circuit (3) Operating temperature TA Storage temperature TA Junction temperature Lead temperature (soldering, 10s) (1) (2) (3) Voltage (2) Current (2) 7V –0.5 to (V+) + 0.5 ±10 Continuous –55 to 150 –65 to 150 150 300 °C °C °C °C V mA UNIT Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these, or any other conditions beyond those specified, is not implied. Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5 V beyond the supply rails should be current-limited to 10 mA or less. Short-circuit to ground, one amplifier per package ELECTRICAL CHARACTERISTICS At TA = 25°C, VS = +5 V, RL = 10 kΩ connected to VS/2, and VOUT = VS/2 (unless otherwise noted) PARAMETER OFFSET VOLTAGE Input offset voltage VOS VCM = VS/2 TA = 25°C TA = Full range vs Temperature dVOS/dT ±0.02 1 5 10 µV/°C µV TEST CONDITIONS MIN TYP MAX UNIT 2 Submit Documentation Feedback www.ti.com OPA2335M SGLS320 – SEPTEMBER 2006 ELECTRICAL CHARACTERISTICS (continued) At TA = 25°C, VS = +5 V, RL = 10 kΩ connected to VS/2, and VOUT = VS/2 (unless otherwise noted) PARAMETER vs Power supply Long-term stability Channel separation, dc INPUT BIAS CURRENT Input bias current IB VCM = VS/2 TA = 25°C TA = Full range Input offset current NOISE Input voltage noise Input current noise density INPUT VOLTAGE RANGE Common-mode voltage range Common-mode rejection ratio VCM CMRR (V–) – 0.1 V < VCM < (V+) – 1.5V (V–) < VCM < (V+) – 1.5V INPUT CAPACITANCE Differential Common-mode OPEN-LOOP GAIN Open-loop voltage gain AOL 50 mV < VO < (V+) – 50 mV, RL = 100 kΩ, VCM = VS/2 100 mV < VO < (V+) – 100 mV, RL = 10 kΩ, VCM = VS/2 FREQUENCY RESPONSE Gain-Bandwidth Product Slew Rate OUTPUT Voltage output swing from rail RL = 10 kΩ RL = 100 kΩ Short-circuit current Capacitive load drive POWER SUPPLY Operating voltage range Quiescent current (total-2 amplifiers) TEMPERATURE RANGE Operating range Storage range Thermal resistance (1) θJA TA –55 –65 119 125 150 °C °C °C/W IQ IO = 0, VS = +5 V TA = 25°C TA = Full range 2.7 570 5.5 700 900 V µA µA ISC CLOAD TA = Full range TA = Full range 15 1 ±50 See Typical Characteristics 100 50 mV mV mA GBW SR G = +1 2 1.6 MHz V/µs TA = Full range TA = Full range 110 110 130 130 dB dB 1 5 pF pF TA = 25°C TA = Full range (V–) –0.1 110 110 130 130 (V+) –1.5 V dB dB en in f = 0.01 Hz to 10 Hz f = 10 Hz 1.4 20 µVpp fA/√Hz IOS ±70 1 ±120 ±400 ±200 pA nA pA PSSR TEST CONDITIONS VS = 2.7 V to 5.5 V TA = Full range MIN TYP ±1 See Note (1) MAX ±2 UNIT µV/V 0.1 µV/V 500-hour life test at 150°C demonstrated randomly distributed variation approximately equal to measurement repeatability of 1 µV. Submit Documentation Feedback 3 OPA2335M SGLS320 – SEPTEMBER 2006 www.ti.com TYPICAL CHARACTERISTICS At TA = 25°C, VS = +5 V, RL = 10 kΩ connected to VS/2 and VOUT = VS/2 (unless otherwise noted) OFFSET VOLTAGE PRODUCTION DISTRIBUTION OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION Population Population Absolute Value; Centered Around Zero −3.0 −2.7 −2.4 −2.1 −1.8 −1.5 −1.2 −0.9 −0.6 −0.3 0.0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3.0 0.005 0.010 0.015 0.020 0.025 0.030 0.035 0.040 0.045 Offset Voltage − µV G001 0.000 Offset Voltage Drift − µV/°C Figure 1. OFFSET VOLTAGE SWING vs OUTPUT CURRENT (V+) Figure 2. INPUT BIAS CURRENT vs COMMON-MODE VOLTAGE 1200 1000 Output Voltage Swing − V 255C −405C 2.7 V 5.5 V (V+) + 1 (V+) − 1 | Input Bias Current | − pA 1255C 800 1255C 600 400 255C 1255C 255C −405C 200 −405C (V−) 0 2 4 6 8 10 G003 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 G004 IO − Output Current − mA Common-Mode Voltage − V Figure 3. Figure 4. 4 Submit Documentation Feedback 0.050 G002 www.ti.com OPA2335M SGLS320 – SEPTEMBER 2006 TYPICAL CHARACTERISTICS (continued) At TA = 25°C, VS = +5 V, RL = 10 kΩ connected to VS/2 and VOUT = VS/2 (unless otherwise noted) INPUT BIAS CURRENT vs TEMPERATURE 1k 400 350 | Input Bias Current | − pA 300 Quiescent Current − µA 250 200 150 100 50 10 −40 0 −40 G005 QUIESCENT CURRENT (per channel) vs TEMPERATURE VS = 5.5 V 100 VS = 2.7 V −20 0 20 40 60 80 100 120 −20 0 20 40 60 80 100 120 G006 TA − Free-Air Temperature − °C TA − Free-Air Temperature − °C Figure 5. OPEN-LOOP GAIN/PHASE vs FREQUENCY 140 120 100 80 Gain − dB 60 Gain 40 20 0 −20 0.1 −130 −140 −150 −160 10M G007 Figure 6. LARGE-SIGNAL RESPONSE −80 −90 −100 −110 −120 Phase − ° Phase G = −1 CL = 300 pF VO − Output Voltage − 1 V/div 1 10 100 1k 10k 100k 1M f − Frequency − Hz t − Time − 5 µs/div G008 Figure 7. Figure 8. Submit Documentation Feedback 5 OPA2335M SGLS320 – SEPTEMBER 2006 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = 25°C, VS = +5 V, RL = 10 kΩ connected to VS/2 and VOUT = VS/2 (unless otherwise noted) SMALL-SIGNAL RESPONSE G=1 CL = 50 pF VO − Output Voltage − 50 mV/div POSITIVE OVER-VOLTAGE RECOVERY 200 mV/div 0 Input 10 kΩ 2.5 V 1 V/div 0 100 Ω Output − OPA335 + −2.5 V t − Time − 5 µs/div G009 t − Time − 25 µs/div G010 Figure 9. Figure 10. COMMON-MODE REJECTION vs FREQUENCY 140 CMMR − Common-Mode Rejection Ratio − dB NEGATIVE OVER-VOLTAGE RECOVERY 200 mV/div 120 100 80 60 40 20 0 Input 0 0 10 kΩ 2.5 V 1 V/div 100 Ω Output − OPA335 + −2.5 V t − Time − 25 µs/div 1 G011 10 100 1k 10k 100k 1M 10M G012 f − Frequency − Hz Figure 11. Figure 12. 6 Submit Documentation Feedback www.ti.com OPA2335M SGLS320 – SEPTEMBER 2006 TYPICAL CHARACTERISTICS (continued) At TA = 25°C, VS = +5 V, RL = 10 kΩ connected to VS/2 and VOUT = VS/2 (unless otherwise noted) POWER-SUPPLY REJECTION RATIO vs FREQUENCY 140 PSRR − Power-Supply Rejection Ratio − dB 120 +PSRR 100 f − Frequency − kHz 80 60 40 20 10.1 0 10 10.0 2.7 −PSRR 10.8 10.7 10.6 10.5 10.4 10.3 10.2 11.0 10.9 SAMPLING FREQUENCY vs SUPPLY VOLTAGE 100 1k 10k 100k 1M G013 3.2 3.7 4.2 4.7 5.2 G014 f − Frequency − Hz VCC − Supply Voltage − V Figure 13. NOISE vs FREQUENCY 1k Figure 14. 0.01-Hz TO 10-Hz NOISE Noise − nV//Hz 100 10 1 10 100 1k 10k 100k t − Time − 10 s/div G015 G016 f − Frequency − Hz Figure 15. 400 nV/div Figure 16. Submit Documentation Feedback 7 OPA2335M SGLS320 – SEPTEMBER 2006 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = 25°C, VS = +5 V, RL = 10 kΩ connected to VS/2 and VOUT = VS/2 (unless otherwise noted) SAMPLING FREQUENCY vs TEMPERATURE 13 50 45 fS − Sampling Frequency − kHz 12 40 35 11 Overshoot − % 30 25 20 15 9 10 5 8 −40 −25 −10 5 20 35 50 65 80 95 110 125 G017 SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE (VS = 2.7 V TO 5 V) RL = 10 kΩ VS = 2.7 V to 5 V 10 0 10 100 Load Capacitance − pF 1k G018 TA − Free-Air Temperature − °C Figure 17. SETTLING TIME vs CLOSED-LOOP GAIN 100 Unity-gain requires one complete Auto-Zero Cycle − See text. 0.01% 10 4.5 4.0 3.5 Common-Mode Range − V Figure 18. COMMON-MODE RANGE vs SUPPLY VOLTAGE Maximum Common-Mode 3.0 2.5 2.0 1.5 1.0 0.5 Minimum Common-Mode 0.0 ts − Settling Time − µs 0.1% 1 1 10 Gain − V/V G019 100 −0.5 2.7 3.2 3.7 4.2 4.7 5.2 G020 VCC − Supply Voltage − V Figure 19. Figure 20. 8 Submit Documentation Feedback www.ti.com OPA2335M SGLS320 – SEPTEMBER 2006 APPLICATION INFORMATION The OPA2335 op amp is unity-gain stable and free from unexpected output phase reversal. It uses auto-zeroing techniques to provide low offset voltage and very low drift over time and temperature. Good layout practice mandates use of a 0.1-µF capacitor placed closely across the supply pins. For lowest offset voltage and precision performance, circuit layout and mechanical conditions should be optimized. Avoid temperature gradients that create thermoelectric (Seebeck) effects in thermocouple junctions formed from connecting dissimilar conductors. These thermally-generated potentials can be made to cancel by assuring that they are equal on both input terminals. • Use low thermoelectric-coefficient connections (avoid dissimilar metals). • Thermally isolate components from power supplies or other heat-sources. • Shield op amp and input circuitry from air currents, such as cooling fans. Following these guidelines will reduce the likelihood of junctions being at different temperatures, which can cause thermoelectric voltages of 0.1 µV/°C or higher, depending on materials used. OPERATING VOLTAGE The OPA2335 op amp operates over a power-supply range of 2.7 V to 5.5 V (±1.35 V to ±2.75 V). Supply voltages higher than 7 V (absolute maximum) can permanently damage the amplifier. Parameters that vary over supply voltage or temperature are shown in the Typical Characteristics section of this data sheet. INPUT VOLTAGE The input common-mode range extends from (V–) – 0.1 V to (V+) – 1.5 V. For normal operation, the inputs must be limited to this range. The common-mode rejection ratio is only valid within the valid input common-mode range. A lower supply voltage results in lower input common-mode range; therefore, attention to these values must be given when selecting the input bias voltage. For example, when operating on a single 3-V power supply, common-mode range is from 0.1 V below ground to half the power-supply voltage. Normally, input bias current is approximately 70 pA; however, input voltages exceeding the power supplies can cause excessive current to flow in or out of the input pins. Momentary voltages greater than the power supply can be tolerated if the input current is limited to 10 mA. This is easily accomplished with an input resistor, as shown in Figure 21. Current-limiting resistor required if input voltage exceeds supply rails by ³ 0.5 V. 5V IOVERLOAD 10 mA max VIN 5 kW S0146-01 OPA335 VOUT Figure 21. Input Current Protection INTERNAL OFFSET CORRECTION The OPA2335 op amp uses an auto-zero topology with a time-continuous 2-MHz op amp in the signal path. This amplifier is zero-corrected every 100 µs using a proprietary technique. Upon power-up, the amplifier requires one full auto-zero cycle of approximately 100 µs to achieve specified VOS accuracy. Prior to this time, the amplifier functions properly, but with unspecified offset voltage. This design has remarkably little aliasing and noise. Zero correction occurs at a 10-kHz rate, but there is virtually no fundamental noise energy present at that frequency. For all practical purposes, any glitches have energy at 20 MHz or higher and are easily filtered, if required. Most applications are not sensitive to such high-frequency noise, and no filtering is required. Submit Documentation Feedback 9 OPA2335M SGLS320 – SEPTEMBER 2006 www.ti.com APPLICATION INFORMATION (continued) Unity-gain operation demands that the auto-zero circuitry correct for common-mode rejection errors of the main amplifier. Because these errors can be larger than 0.01% of a full-scale input step change, one calibration cycle (100 µs) can be required to achieve full accuracy. This behavior is shown in the typical characteristic section, see Settling Time vs Closed-Loop Gain. ACHIEVING OUTPUT SWING TO THE OP AMP’S NEGATIVE RAIL Some applications require output voltage swing from 0 V to a positive full-scale voltage (such as 2.5 V) with excellent accuracy. With most single-supply op amps, problems arise when the output signal approaches 0 V, near the lower output swing limit of a single-supply op amp. A good single-supply op amp may swing close to single-supply ground, but will not reach ground. The output of the OPA2335 can be made to swing to ground, or slightly below, on a single-supply power source. To do so requires use of another resistor and an additional, more negative, power supply than the op amp’s negative supply. A pull-down resistor may be connected between the output and the additional negative supply to pull the output down below the value that the output would otherwise achieve, as shown in Figure 22. V+ = 5 V OPA335 VOUT RP = 40 kW VIN Op Amp’s V- = Gnd -5 V Additional Negative Supply S0147-01 Figure 22. Op Amp With Pull-Down Resistor to Achieve VOUT = Ground The OPA2335 has an output stage that allows the output voltage to be pulled to its negative supply rail, or slightly below using the above technique. This technique only works with some types of output stages. The OPA2335 has been characterized to perform well with this technique. Accuracy is excellent down to 0 V and as low as –2 mV. Limiting and non-linearity occurs below –2 mV, but excellent accuracy returns as the output is again driven above –2 mV. Lowering the resistance of the pull-down resistor allows the op amp to swing even further below the negative rail. Resistances as low as 10 kΩ can be used to achieve excellent accuracy, down to –10 mV. LAYOUT GUIDELINES Attention to good layout practices is always recommended. Keep traces short. When possible, use a PCB ground plane with surface-mount components placed as close to the device pins as possible. Place a 0.1-µF capacitor closely across the supply pins. These guidelines should be applied throughout the analog circuit to improve performance and provide benefits, such as reducing the EMI (electromagnetic-interference) susceptibility. 10 Submit Documentation Feedback www.ti.com OPA2335M SGLS320 – SEPTEMBER 2006 APPLICATION INFORMATION (continued) 5V 0.1 mF + R1 6.04 kW D1 R2 2.94 kW R6 200 W R4 6.04 kW R3 60.4 W Zero Adj. R9 150 kW R5 31.6 kW R2 549 W 5V 0.1 mF + REF3040 4.096 V - - ++ OPA335 VOUT K-Type Thermocouple 40.7 mV/°C S0148-01 Figure 23. Temperature Measurement Circuit IIN R1 2.5 V Photodiode OPA343 IIN R1 5V Photodiode OPA343 1 MW -2.5 V C1 2.5 V R2 OPA335 (1) 1 MW C1 5V R2 OPA335 C2 -2.5 V Optional pull-down resistor to allow below ground output swing. 40 kW -5 V (1) C2 a. Split Supply b. Single Supply S0149-01 Figure 24. Auto-Zeroed Transimpedance Amplifier Submit Documentation Feedback 11 OPA2335M SGLS320 – SEPTEMBER 2006 www.ti.com APPLICATION INFORMATION (continued) VEX = 2.5 V VEX R1 = 105 W Select R1 so bridge output £ VCMmax @ VS = 2.7 V, VCMmax = 1.2 V R1 R R R R 5V R2 2.7 V OPA335 VOUT 300 W Bridge OPA335 VOUT R1 VREF a. 5 V Supply Bridge Amplifier R2 VREF b. 2.7 V Supply Bridge Amplifier S0150-01 Figure 25. Single Op-Amp Bridge Amplifier Circuits R2 R1 R1 R2 VREF 5V R R R R 1/2 OPA2335 G=1+ 5V 1/2 OPA2335 R2 R1 VOUT R3 40 kW (1) (1) Optional pull-down resistor to allow accurate swing to 0 V. -5 V S0151-01 Figure 26. Dual Op-Amp IA Bridge Amplifier 12 Submit Documentation Feedback www.ti.com OPA2335M SGLS320 – SEPTEMBER 2006 APPLICATION INFORMATION (continued) 11.5 kW V 5V Load OPA335 2 fS = 0.63 V 5V R3 40 kW 50 mV Shunt RS 1 kW G = 12.5 -5 V (1) ADS1100 IC (PGA Gain = 8) 5 V fS (1) Pull-down resistor to allow accurate swing to 0 V. S0152-01 Figure 27. Low-Side Current Measurement Submit Documentation Feedback 13 OPA2335M SGLS320 – SEPTEMBER 2006 www.ti.com APPLICATION INFORMATION (continued) R1 4.12 kW C1 56 pF 5V C2 0.1 mF R3 100 W OPA353 VOUT (1) R2 Photodiode = 2 pF C3 1 nF 2 kW » 1 MHz Bandwidth VOS » 10 mV -5 V C4 10 nF R7 1 kW Photodiode Bias C7 1 mF R4 100 kW 5V C6 0.1 mF R6 49.9 kW OPA335 R5 40 kW -5 V Pull-down resistors to allow accurate swing to 0 V. (1) C5 10 nF (1) S0153-01 Figure 28. High Dynamic-Range Transimpedance Amplifier 14 Submit Documentation Feedback MECHANICAL DATA MCER001A – JANUARY 1995 – REVISED JANUARY 1997 JG (R-GDIP-T8) 0.400 (10,16) 0.355 (9,00) 8 5 CERAMIC DUAL-IN-LINE 0.280 (7,11) 0.245 (6,22) 1 4 0.065 (1,65) 0.045 (1,14) 0.063 (1,60) 0.015 (0,38) 0.020 (0,51) MIN 0.310 (7,87) 0.290 (7,37) 0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN 0.023 (0,58) 0.015 (0,38) 0.100 (2,54) 0.014 (0,36) 0.008 (0,20) 0°–15° 4040107/C 08/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a ceramic lid using glass frit. Index point is provided on cap for terminal identification. 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