SN74LVC2GU04DCKR

SN74LVC2GU04 www.ti.com SCES197N – APRIL 1999 – REVISED DECEMBER 2013 Dual Inverter Gate Check for Samples: SN74LVC2GU04 FEATURES DESCRIPTION • This dual inverter is designed for 1.65-V to 5.5-V VCC operation. 1 2 • • • • • • • • • • • • Available in the Texas Instruments NanoFree™ Package Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V Max tpd of 3.7 ns at 3.3 V Low Power Consumption, 10-µA Max ICC ±24-mA Output Drive at 3.3 V Typical VOLP (Output Ground Bounce) 2 V at VCC = 3.3 V, TA = 25°C Ioff Supports Live Insertion, Partial-PowerDown Mode, and Back-Drive Protection Can Be Used as a Down Translator to Translate Inputs From a Max of 5.5 V Down to the VCC Level Unbuffered Outputs Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) DBV PACKAGE (TOP VIEW) 1A 1 6 The SN74LVC2GU04 device contains two inverters with unbuffered outputs and performs the Boolean function Y = A. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. DCK PACKAGE (TOP VIEW) 1Y GND 2 5 VCC 2A 3 4 2Y YZP PACKAGE (BOTTOM VIEW) 1A 1 6 1Y GND 2 5 VCC 2A 3 4 2Y 2A 3 4 GND 2 5 1A 1 6 2Y VCC 1Y See mechanical drawings for dimensions. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoFree is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1999–2013, Texas Instruments Incorporated SN74LVC2GU04 SCES197N – APRIL 1999 – REVISED DECEMBER 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Function Table (Each Inverter) INPUT A OUTPUT Y H L L H Logic Diagram (Positive Logic) 1A 2A 1 6 3 4 1Y 2Y Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) VCC MIN MAX Supply voltage range –0.5 6.5 UNIT V (2) –0.5 6.5 V –0.5 VCC + 0.5 VI Input voltage range VO Voltage range applied to any output in the high or low state (2) (3) IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±50 mA ±100 mA Continuous current through VCC or GND θJA Tstg (1) (2) (3) (4) 2 Package thermal impedance (4) DBV package 165 DCK package 259 YZP package 123 Storage temperature range –65 150 V °C/W °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. The value of VCC is provided in the recommended operating conditions table. The package thermal impedance is calculated in accordance with JESD 51-7. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: SN74LVC2GU04 SN74LVC2GU04 www.ti.com SCES197N – APRIL 1999 – REVISED DECEMBER 2013 Recommended Operating Conditions (1) VCC Supply voltage VIH High-level input voltage IO = –100 µA VIL Low-level input voltage IO = 100 µA VI Input voltage VO Output voltage MIN MAX 1.65 5.5 0.75 × VCC V V 0 5.5 V 0 VCC V –4 VCC = 2.3 V High-level output current –8 –16 VCC = 3 V –32 VCC = 1.65 V 4 VCC = 2.3 V Low-level output current 8 16 VCC = 3 V 32 Operating free-air temperature (1) mA 24 VCC = 4.5 V TA mA –24 VCC = 4.5 V IOL V 0.25 × VCC VCC = 1.65 V IOH UNIT –40 125 °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = –100 µA VOH VIL = 0 V VCC – 0.1 VCC – 0.1 1.2 1.2 2.3 V 1.9 1.9 2.4 2.4 2.3 2.3 3V MAX IOL = 100 µA 1.65 V to 5.5 V 0.1 0.1 IOL = 4 mA 1.65 V 0.45 0.45 IOL = 8 mA 2.3 V 0.3 0.3 0.4 0.4 0.55 0.55 0.55 0.55 VI = 5.5 V or GND, IO = 0 CI VI = VCC or GND 3.8 3V 4.5 V VI = 5.5 V or GND UNIT V 4.5 V IOL = 16 mA 3.8 TYP (1) IOH = –32 mA ICC (1) MIN 1.65 V IOL = 32 mA A inputs MAX IOH = –8 mA IOL = 24 mA II –40°C to 125°C TYP (1) IOH = –4 mA IOH = –24 mA VIH = VCC MIN 1.65 V to 5.5 V IOH = –16 mA VOL –40°C to 85°C VCC V 0 to 5.5 V ±5 ±5 µA 1.65 V to 5.5 V 10 10 µA 3.3 V 7 pF All typical values are at VCC = 3.3 V, TA = 25°C. Switching Characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) SN74LVC2GU04 –40°C to 85°C PARAMETER FROM (INPUT) TO (OUTPUT) tpd A Y VCC = 1.8 V ± 0.15 V VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V UNIT MIN MAX MIN MAX MIN MAX MIN MAX 1.2 5.5 1 4 1.1 3.7 1 3 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: SN74LVC2GU04 ns 3 SN74LVC2GU04 SCES197N – APRIL 1999 – REVISED DECEMBER 2013 www.ti.com Switching Characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) SN74LVC2GU04 –40°C to 125°C PARAMETER FROM (INPUT) TO (OUTPUT) tpd A Y VCC = 1.8 V ± 0.15 V VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V UNIT MIN MAX MIN MAX MIN MAX MIN MAX 1.2 6.3 1 4.5 1.1 4.2 1 3.5 ns Operating Characteristics TA = 25°C Cpd 4 PARAMETER TEST CONDITIONS Power dissipation capacitance f = 10 MHz VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V VCC = 5 V TYP TYP TYP TYP 7 7 8 23 Submit Documentation Feedback UNIT pF Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: SN74LVC2GU04 SN74LVC2GU04 www.ti.com SCES197N – APRIL 1999 – REVISED DECEMBER 2013 Parameter Measurement Information VLOAD S1 RL From Output Under Test Open TEST GND CL (see Note A) S1 Open VLOAD tPLH/tPHL tPLZ/tPZL tPHZ/tPZH RL GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5 V ± 0.5 V VI tr/tf VCC VCC 3V VCC £2 ns £2 ns £2.5 ns £2.5 ns VM VLOAD CL RL VD VCC/2 VCC/2 1.5 V VCC/2 2 × VCC 2 × VCC 6V 2 × VCC 30 pF 30 pF 50 pF 50 pF 1 kW 500 W 500 W 500 W 0.15 V 0.15 V 0.3 V 0.3 V VI Timing Input VM 0V tW tsu VI Input VM VM th VI Data Input VM VM 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VI VM Input VM 0V tPLH VOH Output VM VOL tPHL VM VM 0V tPLZ Output Waveform 1 S1 at VLOAD (see Note B) tPLH VLOAD/2 VM tPZH VOH Output VM tPZL tPHL VM VI Output Control VM VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS Output Waveform 2 S1 at GND (see Note B) VOL + VD VOL tPHZ VM VOH – VD VOH »0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR £ 10 MHz, ZO = 50 W. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: SN74LVC2GU04 5 SN74LVC2GU04 SCES197N – APRIL 1999 – REVISED DECEMBER 2013 www.ti.com REVISION HISTORY Changes from Revision M (February 2007) to Revision N Page • Updated document to new TI data sheet format. ................................................................................................................. 1 • Removed ordering information. ............................................................................................................................................ 1 • Updated Features. ................................................................................................................................................................ 1 • Added ESD warning. ............................................................................................................................................................ 2 • Updated operating temperature range. ................................................................................................................................. 3 6 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: SN74LVC2GU04 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) 74LVC2GU04DBVRG4 ACTIVE SOT-23 DBV 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 (CU45, CU4R) 74LVC2GU04DCKRG4 ACTIVE SC70 DCK 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 CD5 74LVC2GU04DCKTG4 ACTIVE SC70 DCK 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 CD5 SN74LVC2GU04DBVR ACTIVE SOT-23 DBV 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 (CU45, CU4R) SN74LVC2GU04DBVT ACTIVE SOT-23 DBV 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 (CU45, CU4R) SN74LVC2GU04DCKR ACTIVE SC70 DCK 6 3000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 125 (CD5, CDF, CDJ, CD K, CDR) SN74LVC2GU04DCKT ACTIVE SC70 DCK 6 250 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 125 (CD5, CDF, CDJ, CD K, CDR) SN74LVC2GU04YZPR ACTIVE DSBGA YZP 6 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 CDN (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of