SN74LVTH541DW


     

 
 
SCBS682G − MARCH 1997 − REVISED OCTOBER 2003 D Support Mixed-Mode Signal Operation (5-V D D D D OE1 A1 A2 A3 A4 A5 A6 A7 A8 GND 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC OE2 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 SN54LVTH541 . . . FK PACKAGE (TOP VIEW) description/ordering information These octal buffers/drivers are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. A3 A4 A5 A6 A7 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 Y1 Y2 Y3 Y4 Y5 A8 GND Y8 Y7 Y6 The ’LVTH541 devices are ideal for driving bus lines or buffer-memory address registers. These devices feature inputs and outputs on opposite sides of the package that facilitate printed circuit board layout. OE2 D Input and Output Voltages With 3.3-V VCC) Typical VOLP (Output Ground Bounce) VCC. 3. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 4) SN54LVTH541 SN74LVTH541 MIN MAX MIN MAX 2.7 3.6 2.7 3.6 UNIT VCC VIH Supply voltage VIL VI Low-level input voltage Input voltage 5.5 5.5 V IOH IOL High-level output current −24 −32 mA Low-level output current 48 64 mA ∆t/∆v Input transition rise or fall rate ∆t/∆VCC TA Power-up ramp rate 200 Operating free-air temperature −55 High-level input voltage 2 2 0.8 V 0.8 10 10 −40 V ns/V µs/V 200 125 V 85 °C NOTE 4: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.   ')"*%("' #"'#&*' +*"!$# ' & )"*%(2& "* !&1' +(& ") !&2&-"+%&' (*(#&*# !(( ('! "&* +&#)#("' (*& !&1' 1"(- &.( '*$%&' *&&*2& & *1 " #('1& "* !#"''$& && +*"!$# /"$ '"#& POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 

     

 
 
SCBS682G − MARCH 1997 − REVISED OCTOBER 2003 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH VCC = 2.7 V, VCC = 2.7 V to 3.6 V, II = −18 mA IOH = −100 µA VCC = 2.7 V, IOH = −8 mA IOH = −24 mA VCC = 3 V VCC = 2.7 V VOL VCC = 3 V Control inputs II Data inputs Ioff II(hold) IOZH IOZL VCC = 0 or 3.6 V, VCC = 3.6 V, VCC = 3.6 V VCC = 0, Data inputs SN54LVTH541 TYP† MAX TEST CONDITIONS MIN SN74LVTH541 TYP† MAX MIN −1.2 VCC−0.2 2.4 −1.2 V 2 2 0.2 0.2 IOL = 24 mA IOL = 16 mA 0.5 0.5 0.4 0.4 IOL = 32 mA IOL = 48 mA 0.5 0.5 0.55 IOL = 64 mA VI = 5.5 V 10 10 VI = VCC or GND VI = VCC ±1 ±1 1 1 VI = 0 VI or VO = 0 to 4.5 V −5 −5 VCC = 3 V VCC = 3.6 V‡, VCC = 3.6 V, VI = 0 to 3.6 V VO = 3 V V VCC−0.2 2.4 IOH = −32 mA IOL = 100 µA VI = 0.8 V VI = 2 V UNIT V 0.55 ±100 75 75 −75 −75 µA A µA µA ±500 5 5 µA −5 −5 µA IOZPU VCC = 3.6 V, VO = 0.5 V VCC = 0 to 1.5 V, VO = 0.5 V to 3 V, OE = don’t care ±100∗ ±100 µA IOZPD VCC = 1.5 V to 0, VO = 0.5 V to 3 V, OE = don’t care ±100∗ ±100 µA 0.19 0.19 ICC VCC = 3.6 V, IO = 0, VI = VCC or GND Outputs high Outputs low Outputs disabled ∆ICC§ VCC = 3 V to 3.6 V, One input at VCC − 0.6 V, Other inputs at VCC or GND Ci VI = 3 V or 0 VO = 3 V or 0 3 5 5 0.19 0.19 0.2 0.2 3 mA mA pF Co 7 7 pF ∗ On products compliant to MIL-PRF-38535, this parameter is not production tested. † All typical values are at VCC = 3.3 V, TA = 25°C. ‡ This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to another. § This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.   ')"*%("' #"'#&*' +*"!$# ' & )"*%(2& "* !&1' +(& ") !&2&-"+%&' (*(#&*# !(( ('! "&* +&#)#("' (*& !&1' 1"(- &.( '*$%&' *&&*2& & *1 " #('1& "* !#"''$& && +*"!$# /"$ '"#& 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 

     

 
 
SCBS682G − MARCH 1997 − REVISED OCTOBER 2003 switching characteristics over recommended ranges of supply voltage and operating free-air temperature, CL = 50 pF (unless otherwise noted) (see Figure 1) SN54LVTH541 PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL A Y tPZH tPZL OE1 or OE2 Y tPHZ tPLZ OE1 or OE2 Y VCC = 3.3 V ± 0.3 V SN74LVTH541 VCC = 2.7 V VCC = 3.3 V ± 0.3 V VCC = 2.7 V MIN MAX MAX MIN TYP† MAX 1 3.7 4 1.1 2.4 3.5 3.9 1 3.7 4 1.1 2.4 3.5 3.9 1.4 5.3 6.3 1.5 3.5 5.2 6.2 1.4 5.4 6 1.5 3.7 5.3 5.9 1.4 5.8 6.1 1.5 3.9 5.6 5.9 1.4 5.4 5.7 1.5 3 5 5.3 MIN MIN UNIT MAX ns ns ns † All typical values are at VCC = 3.3 V, TA = 25°C.   ')"*%("' #"'#&*' +*"!$# ' & )"*%(2& "* !&1' +(& ") !&2&-"+%&' (*(#&*# !(( ('! "&* +&#)#("' (*& !&1' 1"(- &.( '*$%&' *&&*2& & *1 " #('1& "* !#"''$& && +*"!$# /"$ '"#& POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 

     

 
 
SCBS682G − MARCH 1997 − REVISED OCTOBER 2003 PARAMETER MEASUREMENT INFORMATION 500 Ω From Output Under Test 6V Open S1 GND CL = 50 pF (see Note A) 500 Ω TEST S1 tPHL/tPLH tPLZ/tPZL tPHZ/tPZH Open 6V GND 2.7 V LOAD CIRCUIT Timing Input 1.5 V 0V tw tsu 2.7 V Input 1.5 V 1.5 V th 2.7 V Data Input 1.5 V 1.5 V 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 2.7 V 1.5 V Input 1.5 V 0V tPHL tPLH VOH 1.5 V Output 1.5 V VOL 1.5 V 1.5 V 1.5 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS 1.5 V 0V tPZL tPLZ 3V 1.5 V tPZH VOH Output Output Waveform 1 S1 at 6 V (see Note B) tPLH tPHL 2.7 V Output Control Output Waveform 2 S1 at GND (see Note B) VOL + 0.3 V VOL tPHZ 1.5 V VOH − 0.3 V VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time with one transition per measurement. E. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) SN74LVTH541DBR ACTIVE SSOP DB 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LXH541 Samples SN74LVTH541DW ACTIVE SOIC DW 20 25 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LVTH541 Samples SN74LVTH541DWR ACTIVE SOIC DW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LVTH541 Samples SN74LVTH541NSR ACTIVE SO NS 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LVTH541 Samples SN74LVTH541PW ACTIVE TSSOP PW 20 70 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LXH541 Samples SN74LVTH541PWR ACTIVE TSSOP PW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LXH541 Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of