TLC5602CDWR

TLC5602C, TLC5602M VIDEO 8-BIT DIGITAL-TO-ANALOG CONVERTERS SLAS023D – FEBRUARY 1989 – REVISED JANUARY 2002 D D D D D D D D 8-Bit Resolution ± 0.2% Linearity Maximum Conversion Rate 30 MHz Typ 20 MHz Min Analog Output Voltage Range VDD to VDD – 1 V TTL Digital Input Voltage 5-V Single Power-Supply Operation Low Power Consumption . . . 80 mW Typ Interchangeable With Fujitsu MB40778 description The TLC5602x devices are low-power, ultra-high-speed video, digital-to-analog converters that use the LinEPIC 1-µm CMOS process. The TLC5602x converts digital signals to analog signals at a sampling rate of dc to 20 MHz. Because of high-speed operation, the TLC5602x devices are suitable for digital video applications such as digital television, video processing with a computer, and radar-signal processing. The TLC5602C is characterized for operation from 0°C to 70°C. The TLC5602M is characterized over the full military temperature range of – 55°C to 125°C. N PACKAGE (TOP VIEW) DGTL GND DGTL VDD COMP REF ANLG VDD1 A OUT ANLG VDD2 DGTL VDD ANLG GND 1 18 2 17 3 16 4 15 5 14 6 13 7 12 8 11 9 10 DW PACKAGE (TOP VIEW) D0 (LSB) D1 D2 D3 D4 D5 D6 D7 (MSB) CLK DGTL GND DGTL VDD COMP REF ANLG VDD1 A OUT NC ANLG VDD2 DGTL VDD ANLG GND J PACKAGE (TOP VIEW) 20 2 19 3 18 4 17 5 16 6 15 7 14 8 9 10 13 12 11 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 NC D0 (LSB) D1 D2 D3 D4 D5 D6 D7 (MSB) CLK FK PACKAGE (TOP VIEW) NC D0 (LSB) D1 D2 D3 D4 D5 D6 D7 (MSB) CLK DGTL V DD DGTL GND NC NC D0 (LSB) 1 20 2 COMP REF ANLG VDD1 A OUT ANLG VDD2 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 D1 D2 D3 D4 D5 DGTL V DD ANLG GND CLK D7 (MSB) D6 NC DGTL GND DGTL VDD COMP REF ANLG VDD1 A OUT ANLG VDD2 DGTL VDD ANLG GND 1 NC—No internal connection LinEPIC is a trademark of Texas Instruments Incorporated. Copyright  2002, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TLC5602C, TLC5602M VIDEO 8-BIT DIGITAL-TO-ANALOG CONVERTERS SLAS023D – FEBRUARY 1989 – REVISED JANUARY 2002 AVAILABLE OPTIONS PACKAGE TA WIDE-BODY SMALL OUTLINE (DW) 0°C to 70°C TLC5602CDW CERAMIC CHIP CARRIER (FK) CERAMIC DIP (J) PLASTIC DIP (N) TLC5602CN – 55°C to 125°C TLC5602MFK TLC5602MJ functional block diagram COMP Current Switches With Register REF CLK 8 Buffer Driver With Register 8 63 Ix4 3 Decode D7 – D0 A OUT Ix1 FUNCTION TABLE DIGITAL INPUTS D7 D6 D5 D4 D3 D2 D1 D0 OUTPUT VOLTAGE† 0 L L L L L L L L 3.980 V 1 L L L L L L L H 3.984 V H 4.488 V STEP | | L H H H H H H 128 H L L L L L L L 4.492 V 129 H L L L L L L H 4.496 V H H H H H H H L 4.996 V 255 H H H † VDD = 5 V and Vref = 4.02 V H H H H H 5.000 V | 254 2 | 127 | POST OFFICE BOX 655303 | • DALLAS, TEXAS 75265 TLC5602C, TLC5602M VIDEO 8-BIT DIGITAL-TO-ANALOG CONVERTERS SLAS023D – FEBRUARY 1989 – REVISED JANUARY 2002 schematics of equivalent input and output EQUIVALENT OF EACH DIGITAL INPUT DGTL VDD EQUIVALENT OF ANALOG OUTPUT ANLG VDD1 DGTL VDD 80 Ω A OUT ÎÎ ÎÎ Dn ANLG‡ GND ANLG‡ GND DGTL‡ GND ‡ ANLG GND and DGTL GND do not connect internally and should be tied together as close to the device terminals as possible. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, ANLG VDD, DGTL VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V Digital input voltage range, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V Analog reference voltage range, Vref . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDD – 1.7 V to VDD + 0.5 V Operating free-air temperature range, TA: TLC5602C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C TLC5602M . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions Supply voltage, VDD Analog reference voltage, Vref High-level input voltage, VIH MIN NOM MAX UNIT 4.75 5 5.25 V 3.8 4 4.2 V 2 Low-level input voltage, VIL V 0.8 Pulse duration, CLK high or low, tw V 25 ns Setup time, data before CLK↑, tsu 16.5 ns Hold time, data after CLK↑, th 12.5 ns 1 µF 75 Ω Phase compensation capacitance, Ccomp (see Note 1) Load resistance, RL Operating free-air free air temperature,T temperature TA TLC5602C 0 70 TLC5602M – 55 125 °C NOTE 1: The phase compensation capacitor should be connected between COMP and ANLG GND. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 TLC5602C, TLC5602M VIDEO 8-BIT DIGITAL-TO-ANALOG CONVERTERS SLAS023D – FEBRUARY 1989 – REVISED JANUARY 2002 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER IIH IIL High-level input current Iref VFS Input reference current VZS ro Low-level input current TEST CONDITIONS Digital g inputs Full-scale analog output voltage Zero-scale analog output voltage Output resistance MIN TYP‡ MAX UNIT VI = 5 V VI = 0 V ±1 µA ±1 µA Vref = 4 V VDD = 5 V, 10 µA VDD = 5 V, V TA = full range§ Vref = 4.02 V Vref = 4 4.02 02 V V, TA = 25°C TA = full range§ VDD – 15 3.919 VDD 3.98 VDD + 15 4.042 mV TLC5602C TLC5602M 3.919 3.98 4.042 V TLC5602M 3.919 3.98 4.062 60 80 120 Ω 25 mA TLC5602C TLC5602M Ci Input capacitance fclock = 1 MHz, TA = 25°C IDD Supply current fclock = 20 MHz, Vref = VDD – 0.95 V ‡ All typical values are at VDD = 5 V and TA = 25°C. § Full range for the TLC5602C is 0°C to 70°C, and full range for the TLC5602M is – 55°C to 125°C. 15 pF 16 operating characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER EL(adj) ( j) Linearity error, best-straight-line EL ED Linearity error, end point Gdiff Differential gain fdiff Differential phase TEST CONDITIONS TA = full range‡ TLC5602C TA = 25°C TA = full range‡ TYP† MAX UNIT ± 0.2% ± 0.2% TLC5602M ± 0.4% ± 0.15% ± 0.2% Linearity error, differential NTSC 40-IRE modulated ramp,, fclock = 14.3 MHz, ZL ≥ 75 kΩ tpd Propagation delay time, CLK to analog output CL = 10 pF ts Settling time to within 1/2 LSB CL = 10 pF † All typical values are at VDD = 5 V and TA = 25°C. ‡ Full range for the TLC5602C is 0°C to 70°C, and full range for the TLC5602M is – 55°C to 125°C. 4 MIN POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 0.7% 0.4° 25 ns 30 ns TLC5602C, TLC5602M VIDEO 8-BIT DIGITAL-TO-ANALOG CONVERTERS SLAS023D – FEBRUARY 1989 – REVISED JANUARY 2002 PARAMETER MEASUREMENT INFORMATION tsu D0 – D7 th 50% 50% tw CLK 50% tw 50% 50% ± 1/2 LSB A OUT 50% ÏÏ ÏÏ ts tpd Figure 1. Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 TLC5602C, TLC5602M VIDEO 8-BIT DIGITAL-TO-ANALOG CONVERTERS SLAS023D – FEBRUARY 1989 – REVISED JANUARY 2002 TYPICAL CHARACTERISTICS BEST-STRAIGHT-LINE LINEARITY ERROR IDEAL CONVERSION CHARACTERISTICS 4.992 EL128 4.496 EL0 EL2 Digital Input Code Figure 3 ZERO-SCALE OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE OUTPUT RESISTANCE vs FREE-AIR TEMPERATURE 4.02 100 VDD = 5 V Vref = 4.02 V See Note A 95 4 VDD = 5 V VDD = VO = 0.5 V Data Input = FF ro – Output Resistance – Ω 90 3.99 3.98 3.97 3.96 3.95 3.94 3.93 85 80 75 70 65 60 55 3.92 – 55 – 35 – 15 5 25 45 65 85 105 125 50 – 55 – 35 – 15 TA – Free-Air Temperature – °C 5 25 45 Figure 5 Figure 4 POST OFFICE BOX 655303 65 85 TA – Free-Air Temperature – °C NOTE A: Vref is relative to ANLG GND. VDD is the voltage between ANLG VDD and DGTL VDD tied together and ANLG GND and DGTL GND tied together. 6 11111111 VZS 00001110 00000001 00000000 11111111 11111110 10000001 10000000 3.98 EL1 Figure 2 V ZS – Zero-Scale Output Voltage – V ÏÏÏÏÏÏÏ ÏÏÏÏÏÏÏ 3.988 Digital Input Code 4.01 EL253 Best-Fit Straight Line 4.488 3.984 01111111 00000001 00000000 EL127 4.492 Step 1 3.984 EL254 EL129 11111110 Step 2 3.988 EL255 VFS 10000001 Step 127 4.488 3.98 VO – Analog Output Voltage – V Step 128 4.492 VDD = 5 V Vref = 4.02 V 4.996 Step 253 Step 129 4.496 00001110 VO – Analog Output Voltage – V 4.992 Step 254 10000000 VDD = 5 V Vref = 4.02 V 4.996 ÏÏÏÏÏ ÏÏÏÏÏ 5 01111111 ÏÏÏÏÏ ÏÏÏÏÏ 5 • DALLAS, TEXAS 75265 105 125 TLC5602C, TLC5602M VIDEO 8-BIT DIGITAL-TO-ANALOG CONVERTERS SLAS023D – FEBRUARY 1989 – REVISED JANUARY 2002 TYPICAL CHARACTERISTICS SUPPLY CURRENT vs FREE-AIR TEMPERATURE ZERO-SCALE OUTPUT VOLTAGE vs REFERENCE VOLTAGE 5 21 VDD = 5 V Vref = 4.02 V fclock = 20 MHz 4.8 V ZS – Zero-Scale Output Voltage – V I DD – Supply Current – mA 20 19 18 17 16 – 55 – 35 – 15 5 25 45 65 85 105 125 VDD = 5 V TA = 25°C See Note A 4.6 4.4 4.2 4 3.8 3.6 3.4 3.4 3.6 TA – Free-Air Temperature – °C 3.8 4 4.2 4.4 4.6 4.8 5 Vref – Reference Voltage – V NOTE A: Vref is relative to ANLG GND. VDD is the voltage between ANLG VDD and DGTL VDD tied together and ANLG GND and DGTL GND tied together. Figure 6 Figure 7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 TLC5602C, TLC5602M VIDEO 8-BIT DIGITAL-TO-ANALOG CONVERTERS SLAS023D – FEBRUARY 1989 – REVISED JANUARY 2002 APPLICATION INFORMATION The following design recommendations benefit the TLC5602 user: D D D Physically separate and shield external analog and digital circuitry as much as possible to reduce system noise. Use RF breadboarding or RF printed-circuit-board (PCB) techniques throughout the evaluation and production process. Since ANLG GND and DGTL GND are not connected internally, these terminals need to be connected externally. With breadboards, these ground lines should connect to the power-supply ground through separate leads with proper supply bypassing. A good method is to use a separate twisted pair for the analog and digital supply lines to minimize noise pickup. Use wide ground leads or a ground plane on the PCB layouts to minimize parasitic inductance and resistance. The ground plane is the better choice for noise reduction. D D D D D 8 ANLG VDD and DGTL VDD are also separated internally, so they must connect externally. These external PCB leads should also be made as wide as possible. Place a ferrite bead or equivalent inductance in series with ANLG VDD and the decoupling capacitor as close to the device terminals as possible before the ANLG VDD and DGTL VDD leads are connected together on the board. Decouple ANLG VDD to ANLG GND and DGTL VDD to DGTL GND with a 1-µF and 0.01-µF capacitor, respectively, as close as possible to the appropriate device terminals. A ceramic chip capacitor is recommended for the 0.01-µF capacitor. Connect the phase compensation capacitor between COMP and ANLG GND with as short a lead-in as possible. The no-connection (NC) terminals on the small-outline package should be connected to ANLG GND. Shield ANLG VDD, ANLG GND, and A OUT from the high-frequency terminals CLK and D7 – D0. Place ANLG GND traces on both sides of the A OUT trace on the PCB. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TLC5602CDW ACTIVE SOIC DW 20 25 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 TLC5602C TLC5602CDWR ACTIVE SOIC DW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 TLC5602C (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of