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TMUX6111, TMUX6112, TMUX6113
SCDS383E – AUGUST 2018 – REVISED DECEMBER 2019
TMUX611x ±17-V, Low-capacitance, Low-leakage-current,
Precision, Quad SPST Switches
1 Features
3 Description
•
The TMUX6111, TMUX6112, and TMUX6113
devices are modern complementary metal-oxide
semiconductor (CMOS) devices that have four
independently selectable single-pole/ single-throw
(SPST) switches. The devices work well with dual
supplies (±5 V to ±17 V), a single supply (10 V to 17
V), or asymmetric supplies. All digital inputs have
transistor-transistor logic (TTL) compatible thresholds,
ensuring TTL/ CMOS logic compatibility.
1
•
•
•
•
•
•
•
•
•
•
•
•
Wide Supply Range: ±5 V to ±17 V (dual),
10 V to 17 V (single)
Latch-Up Performance Meets 100 mA per
JESD78 Class II Level A on all Pins
Low On-Capacitance: 4.2 pF
Low Input Leakage: 0.5 pA
Low Charge Injection: 0.6 pC
Rail-to-Rail Operation
Low On-Resistance: 120 Ω
Fast Switch Turn-On Time: 66 ns
Break-Before-Make Switching (TMUX6113)
EN Pin Connectable to VDD
Low Supply Current: 17 µA
Human Body Model (HBM) ESD Protection: ± 2
kV on All Pins
Industry-Standard TSSOP and smaller WQFN
Packages
The switches are turned on with Logic 0 on the digital
control inputs in the TMUX6111. Logic 1 is required
to turn on switches in the TMUX6112. The
TMUX6113 has two switches with similar digital
control logic to the TMUX6111 while the logic is
inverted on the other two switches. The TMUX6113
exhibits break-before-make switching, allowing the
device to be used in the cross-point switching
application.
The TMUX611x devices are part of Texas
Instruments Precision Switches and Multiplexers
family. The devices have very low leakage current
and charge injection, allowing them to be used in
high-precision measurement applications. Low supply
current of 17 µA enables the device usage in portable
applications.
2 Applications
•
•
•
•
•
Factory automation and industrial process controls
Programmable logic controllers (PLC)
Analog input modules
Semiconductor test equipment
Battery test equipment
Device Information(1)
PART NUMBER
TMUX6111
TMUX6112
TMUX6113
PACKAGE
BODY SIZE (NOM)
TSSOP (16)
5.00 mm × 4.40 mm
WQFN (16)
3.00 mm x 3.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Schematic
VDD
VSS
VDD
SW
VSS
VDD
SW
S1
D1
S1
D2
S2
SW
D1
S1
D2
S2
SW
S2
SW
D3
S3
D4
S4
SW
S4
D2
SW
D3
S3
D4
S4
D3
SW
SW
SEL1
SEL1
SEL1
SEL2
SEL2
SEL2
SEL3
SEL3
SEL3
SEL4
SEL4
SEL4
TMUX6111
D1
SW
SW
S3
VSS
SW
TMUX6112
D4
TMUX6113
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TMUX6111, TMUX6112, TMUX6113
SCDS383E – AUGUST 2018 – REVISED DECEMBER 2019
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
4
4
5
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
5
5
5
5
6
7
7
8
9
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Thermal Information ..................................................
Recommended Operating Conditions.......................
Electrical Characteristics (Dual Supplies: ±15 V) .....
Switching Characteristics (Dual Supplies: ±15 V).....
Electrical Characteristics (Single Supply: 12 V)........
Switching Characteristics (Single Supply: 12 V).......
Typical Characteristics ..............................................
8
Parameter Measurement Information ................ 12
9
Detailed Description ............................................ 13
8.1 Truth Tables ............................................................ 12
9.1 Overview ................................................................. 13
9.2 Functional Block Diagram ....................................... 18
9.3 Feature Description................................................. 18
9.4 Device Functional Modes........................................ 19
10 Application and Implementation........................ 20
10.1 Application Information.......................................... 20
10.2 Typical Application ............................................... 20
10.3 Application Curves ................................................ 21
11 Power Supply Recommendations ..................... 22
12 Layout................................................................... 23
12.1 Layout Guidelines ................................................. 23
12.2 Layout Example .................................................... 23
13 Device and Documentation Support ................. 24
13.1
13.2
13.3
13.4
13.5
13.6
13.7
Documentation Support ........................................
Related Links ........................................................
Receiving Notification of Documentation Updates
Support Resources ...............................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
24
24
24
24
24
24
24
14 Mechanical, Packaging, and Orderable
Information ........................................................... 25
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision D (January 2019) to Revision E
Page
•
Changed the Title From: TMUX611x ±16.5-V To: TMUX611x ±17-V ................................................................................... 1
•
Changed Feature From: Wide Supply Range: ±5 V to ±16.5 V (dual), 10 V to 16.5 V (single) To: Wide Supply
Range: ±5 V to ±17 V (dual), 10 V to 17 V (single)................................................................................................................ 1
•
Changed the Description From: dual supplies (±5 V to ±16.5 V), a single supply (10 V to 16.5 V) To: dual supplies
(±5 V to ±17 V), a single supply (10 V to 17 V)...................................................................................................................... 1
•
Changed ±16.5-V to ±17.5-V in the Description of the Device Comparison Table ................................................................ 4
•
Changed recommended power supply voltage differential from 33 V to 34 V ....................................................................... 5
•
Changed recommended single supply voltage from 16.5 V to 17 V ...................................................................................... 5
•
Changed positive and negative power supply voltage to +17 V and -17V............................................................................. 5
•
The Overview From: dual supplies (±5 V to ±16.5 V) or single supply (10 V to 16.5 V) To: dual supplies (±5 V to ±17
V) or single supply (10 V to 17 V) ........................................................................................................................................ 13
•
Changed the Application Information From: 16.5 V (single supply) To: 17 V (single supply) ............................................. 20
•
The Power Supply Recommendations From: wide supply range of of ±5 V to ±16.5 V (10 V to 16.5 V in singlesupply mode) To: wide supply range of of ±5 V to ±17 V (10 V to 17 V in single-supply mode)......................................... 22
Changes from Revision C (December 2018) to Revision D
Page
•
Changed descriptions in the Device Comparison Table to match the data sheet title........................................................... 4
•
Changed Figure 30 to correct Op-Amp terminal polarities. ................................................................................................. 20
Changes from Revision B (November 2018) to Revision C
•
2
Page
Changed units for channel current and ambient temperature. ............................................................................................... 6
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Product Folder Links: TMUX6111 TMUX6112 TMUX6113
TMUX6111, TMUX6112, TMUX6113
www.ti.com
SCDS383E – AUGUST 2018 – REVISED DECEMBER 2019
Changes from Revision A (November 2018) to Revision B
•
Page
Changed the document status From: Product Preview To: Production data for TMUX6111 and TMUX6113 ...................... 1
Changes from Original (August 2018) to Revision A
•
Page
Changed the document status From: Advanced Information To: Production data for TMUX6112........................................ 1
Copyright © 2018–2019, Texas Instruments Incorporated
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Product Folder Links: TMUX6111 TMUX6112 TMUX6113
3
TMUX6111, TMUX6112, TMUX6113
SCDS383E – AUGUST 2018 – REVISED DECEMBER 2019
www.ti.com
5 Device Comparison Table
PRODUCT
DESCRIPTION
TMUX6111
±17-V, Low-Capacitance, Low-Leakage-Current, Precision, Quad SPST Switches (Normally Closed)
TMUX6112
±17-V, Low-Capacitance, Low-Leakage-Current, Precision, Quad SPST Switches (Normally Open)
TMUX6113
±17-V, Low-Capacitance, Low-Leakage-Current, Precision, Quad SPST Switches (Dual Open + Dual Closed)
6 Pin Configuration and Functions
PW Package
16-Pin TSSOP
Top View
VDD
GND
5
12
NC
S4
6
11
S3
D4
7
10
D3
SEL4
8
9
S1
1
VSS
2
GND
3
S4
4
D2
13
13
4
12
S2
11
VDD
10
NC
9
S3
Thermal
Pad
8
VSS
D3
S2
SEL2
14
14
3
7
S1
SEL3
D2
SEL1
15
15
2
6
D1
SEL4
SEL2
D1
16
5
1
D4
SEL1
16
RTE Package
16-Pin WQFN
Top View
SEL3
Not to scale
Not to scale
Pin Functions
PIN
TYPE
(1)
DESCRIPTION
NAME
TSSOP
WQFN
SEL1
1
15
I
D1
2
16
I/O
Drain pin 1. Can be an input or output.
S1
3
1
I/O
Source pin 1. Can be an input or output.
VSS
4
2
P
Negative power supply. This pin is the most negative power-supply potential. In single-supply
applications, this pin can be connected to ground. For reliable operation, connect a decoupling
capacitor ranging from 0.1 µF to 10 µF between VSS and GND.
GND
5
3
P
Ground (0 V) reference
S4
6
4
I/O
Source pin 4. Can be an input or output.
D4
7
5
I/O
Drain pin 4. Can be an input or output.
SEL4
8
6
I
Logic control input 4.
SEL3
9
7
I
Logic control input 3.
D3
10
8
I/O
Drain pin 3. Can be an input or output.
S3
11
9
I/O
Source pin 3. Can be an input or output.
NC
12
10
–
No internal connection.
VDD
13
11
P
Positive power supply. This pin is the most positive power-supply potential. For reliable
operation, connect a decoupling capacitor ranging from 0.1 µF to 10 µF between VDD and GND.
S2
14
12
I/O
Source pin 2. Can be an input or output.
D2
15
13
I/O
Drain pin 2. Can be an input or output.
SEL2
16
14
I
Logic control input 2.
-
EP
–
Exposed Pad. The exposed pad is electrically connected to VSS internally. Connect EP to VSS to
achieve rated thermal and ESD performance.
–
(1)
4
Logic control input 1.
I = input, O = output, I/O = input and output, P = power
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Product Folder Links: TMUX6111 TMUX6112 TMUX6113
TMUX6111, TMUX6112, TMUX6113
www.ti.com
SCDS383E – AUGUST 2018 – REVISED DECEMBER 2019
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
VDD to VSS
VDD to GND
UNIT
36
V
–0.3
18
V
–18
0.3
V
GND –0.3
VDD+0.3
V
Supply voltage
VSS to GND
VDIG
Digital input pin (SEL1, SEL2, SEL3, SEL4) voltage
IDIG
Digital input pin (SEL1, SEL2, SEL3, SEL4) current
–30
30
VANA_IN
Analog input pin (Sx) voltage
VSS–0.3
VDD+0.3
IANA_IN
Analog input pin (Sx) current
–30
30
VANA_OUT
Analog output pin (D) voltage
VSS–0.3
VDD+0.3
IANA_OUT
Analog output pin (D) current
–30
30
mA
TA
Ambient temperature
–55
140
°C
TJ
Junction temperature
150
°C
Tstg
Storage temperature
150
°C
(1)
–65
mA
V
mA
V
Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human body model (HBM), per
ANSI/ESDA/JEDEC JS-001, all pins (1)
±2000
Charged device model (CDM), per JEDEC
specification JESD22-C101, all pins (2)
±500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Thermal Information
TMUX6111/ TMUX6112/ TMUX6113
THERMAL METRIC
PW (TSSOP)
RTE (QFN)
UNIT
16 PINS
16 PINS
RθJA
Junction-to-ambient thermal resistance
111.0
51.9
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
41.7
53.3
°C/W
RθJB
Junction-to-board thermal resistance
57.2
26.6
°C/W
ΨJT
Junction-to-top characterization parameter
4.1
1.7
°C/W
ΨJB
Junction-to-board characterization parameter
56.6
26.6
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
11.6
°C/W
7.4 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
VDD to VSS (1)
Power supply voltage differential
10
VDD to GND
Positive power supply voltage (singlle supply, VSS = 0 V)
VDD to GND
Positive power supply voltage (dual supply)
VSS to GND
Negative power supply voltage (dual supply)
VS (2)
Source pins voltage
(1)
(2)
NOM
MAX
UNIT
34
V
10
17
V
5
17
V
–5
–17
V
VSS
VDD
V
VDD and VSS can be any value as long as 10 V ≤ (VDD – VSS) ≤ 34 V.
VS is the voltage on all the S pins.
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SCDS383E – AUGUST 2018 – REVISED DECEMBER 2019
www.ti.com
Recommended Operating Conditions (continued)
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VSS
VDD
V
0
VDD
VD
Drain pin voltage
VDIG
Digital input pin (SEL1, SEL2, SEL3, SEL4) voltage
ICH
Channel current (TA = 25°C )
–25
25
mA
TA
Ambient temperature
–40
125
°C
V
7.5 Electrical Characteristics (Dual Supplies: ±15 V)
at TA = 25°C, VDD = 15 V, and VSS = -15 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ANALOG SWITCH
VA
Analog signal range
TA = –40°C to +125°C
VSS
VDD
V
120
135
Ω
140
160
Ω
TA = –40°C to +85°C
210
Ω
TA = –40°C to +125°C
245
Ω
6
Ω
9
Ω
11
Ω
33
Ω
37
Ω
VS = 0 V, IS = 1 mA
RON
On-resistance
VS = ±10 V, IS = 1 mA
2.5
On-resistance mismatch
between channels
ΔRON
VS = ±10 V, IS = 1 mA
TA = –40°C to +85°C
TA = –40°C to +125°C
23
RON_FLAT
On-resistance flatness
RON_DRIFT
On-resistance drift
IS(OFF)
ID(OFF)
ID(ON)
Source off leakage current
VS = –10 V, 0 V, +10 V, IS
TA = –40°C to +85°C
= 1 mA
TA = –40°C to +125°C
38
VS = 0 V
(1)
Switch state is off, VS =
+10 V/ –10 V, VD = –10
V/ + 10 V
Switch state is off, VS =
+10 V/ –10 V, VD = –10
V/ +10 V
Drain off leakage current (1)
Switch state is on, VS =
+10 V/ –10 V, VD = –10
V/ +10 V
Drain on leakage current
0.52
–0.02
0.005
Ω
%/°C
0.02
nA
TA = –40°C to +85°C
-0.14
0.05
nA
TA = –40°C to +125°C
–1.3
0.25
nA
0.02
nA
0.05
nA
0.25
nA
0.04
nA
–0.02
TA = –40°C to +85°C
TA = –40°C to +125°C
0.005
–0.14
–1.3
–0.04
0.01
TA = –40°C to +85°C
–0.25
0.1
nA
TA = –40°C to +125°C
–1.8
0.5
nA
DIGITAL INPUT (SELx pins)
VIH
Logic voltage high
2
VIL
Logic voltage low
RPD(IN)
Pull-down resistance on SELx
pins
V
0.8
6
V
MΩ
POWER SUPPLY
17
IDD
VA = 0 V or 3.3 V, VS = 0
V
VDD supply current
21
µA
TA = –40°C to +85°C
22
µA
TA = –40°C to +125°C
23
µA
8
ISS
(1)
6
VA = 0 V or 3.3 V, VS = 0
V
VSS supply current
10
µA
TA = –40°C to +85°C
11
µA
TA = –40°C to +125°C
12
µA
When VS is positive, VD is negative, and vice versa.
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SCDS383E – AUGUST 2018 – REVISED DECEMBER 2019
7.6 Switching Characteristics (Dual Supplies: ±15 V)
at TA = 25°C, VDD = 15 V, and VSS = -15 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
VS = ±10 V, RL = 300 Ω , CL = 35 pF
tON
Enable turn-on time
Enable turn-off time
MAX
66
UNIT
78
ns
VS = ±10 V, RL = 300 Ω , CL = 35 pF, TA = –40°C to
+85°C
107
ns
VS = ±10 V, RL = 300 Ω , CL = 35 pF, TA = –40°C to
+125°C
117
ns
VS = ±10 V, RL = 300 Ω , CL = 35 pF
tOFF
TYP
68
ns
VS = ±10 V, RL = 300 Ω , CL = 35 pF, TA = –40°C to
+85°C
77
ns
VS = ±10 V, RL = 300 Ω , CL = 35 pF, TA = –40°C to
+125°C
81
ns
tBBM
Break-before-make time delay
(TMUX6113 Only)
VS = 10 V, RL = 300 Ω , CL = 35 pF, TA = –40°C to
+125°C
QJ
Charge injection
OISO
Off-isolation
56
8
40
ns
VS = 0 V, RS = 0 Ω , CL = 1 nF
0.6
pC
RL = 50 Ω , CL = 5 pF, f = 1 MHz
–85
dB
RL = 50 Ω , CL = 5 pF, f = 1 MHz, adjacent channel
–100
dB
XTALK
Channel-to-channel crosstalk
RL = 50 Ω , CL = 5 pF, f = 1 MHz, nonadjacentchannel
–115
dB
IL
Insertion loss
RL = 50 Ω , CL = 5 pF, f = 1 MHz
–7.0
dB
RL = 10 kΩ , CL = 5 pF, VPP= 0.62 V on VDD, f= 1
MHz
–59
dB
ACPSRR
AC Power Supply Rejection
Ratio
RL = 10 kΩ , CL = 5 pF, VPP= 0.62 V on VSS, f= 1
MHz
–59
dB
BW
-3dB Bandwidth
RL = 50 Ω , CL = 5 pF
800
MHz
THD
Total harmonic distortion +
noise
RL = 10k Ω , CL = 5 pF, f= 20Hz to 20kHz
0.08
%
CIN
Digital input capacitance
VIN = 0 V or VDD
1.5
VS = 0 V, f = 1 MHz (PW package)
1.9
3.0
pF
VS = 0 V, f = 1 MHz (RTE package)
2.5
3.6
pF
pF
CS(OFF)
Source off-capacitance
CD(OFF)
Drain off-capacitance
VS = 0 V, f = 1 MHz
2.4
3.1
pF
CS(ON),
CD(ON)
Source and drain oncapacitance
VS = 0 V, f = 1 MHz
4.2
6.0
pF
TYP
MAX
7.7 Electrical Characteristics (Single Supply: 12 V)
at TA = 25°C, VDD = 12 V, and VSS = 0 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
UNIT
ANALOG SWITCH
VA
Analog signal range
TA = –40°C to +125°C
VSS
VDD
V
265
Ω
355
Ω
405
Ω
12
Ω
TA = –40°C to +85°C
19
Ω
TA = –40°C to +125°C
23
Ω
230
RON
On-resistance
VS = 10 V, IS = 1 mA
TA = –40°C to +85°C
TA = –40°C to +125°C
5
ΔRON
RON_DRIFT
On-resistance mismatch
between channels
VS = 10 V, IS = 1 mA
On-resistance drift
VS = 0 V
0.5
–0.02
IS(OFF)
(1)
Source off leakage current (1)
Switch state is off, VS =
T = –40°C to +85°C
10 V/ 1 V, VD = 1 V/ 10 V A
TA = –40°C to +125°C
0.005
%/°C
0.02
nA
–0.1
0.04
nA
-1
0.2
nA
When VS is positive, VD is negative, and vice versa.
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Electrical Characteristics (Single Supply: 12 V) (continued)
at TA = 25°C, VDD = 12 V, and VSS = 0 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
Switch state is off, VS =
T = –40°C to +85°C
10 V/ 1 V, VD = 1 V/ 10 V A
TA = –40°C to +125°C
Drain off leakage current (1)
ID(OFF)
MIN
TYP
MAX
UNIT
–0.02
0.005
0.02
nA
–0.1
0.04
nA
–1
0.2
nA
–0.04
ID(ON)
Switch state is on, VS =
floating, VD = 1 V/ 10 V
Drain on leakage current
0.04
nA
TA = –40°C to +85°C
–0.16
0.01
0.08
nA
TA = –40°C to +125°C
–1.4
0.4
nA
DIGITAL INPUT (SELx pins)
VIH
Logic voltage high
VIL
Logic voltage low
2
RPD(EN)
Pull-down resistance on SELx
pins
V
0.8
6
V
MΩ
POWER SUPPLY
13
IDD
VA = 0 V or 3.3 V, VS = 0
V
VDD supply current
16
µA
TA = –40°C to +85°C
17
µA
TA = –40°C to +125°C
18
µA
7.8 Switching Characteristics (Single Supply: 12 V)
at TA = 25°C, VDD = 12 V, and VSS = 0 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
VS = 8 V, RL = 300 Ω , CL = 35 pF
tON
Enable turn-on time
Enable turn-off time
MAX
72
UNIT
84
ns
VS = 8 V, RL = 300 Ω , CL = 35 pF, TA = –40°C to
+85°C
117
ns
VS = 8 V, RL = 300 Ω , CL = 35 pF, TA = –40°C to
+125°C
128
ns
VS = 8 V, RL = 300 Ω , CL = 35 pF
tOFF
TYP
66
ns
VS = 8 V, RL = 300 Ω , CL = 35 pF, TA = –40°C to
+85°C
57
78
ns
VS = 8 V, RL = 300 Ω , CL = 35 pF, TA = –40°C to
+125°C
84
ns
tBBM
Break-before-make time delay
(TMUX6113 only)
VS = 8 V, RL = 300 Ω , CL = 35 pF, TA = –40°C to
+125°C
QJ
Charge injection
OISO
Off-isolation
XTALK
Channel-to-channel crosstalk
RL = 50 Ω , CL = 5 pF, f = 1 MHz, non-adjacent
channel
IL
Insertion loss
ACPSRR
17
47
ns
VS = 0 V to 12 V, RS = 0 Ω , CL = 1 nF
0.6
pC
RL = 50 Ω , CL = 5 pF, f = 1 MHz
–86
dB
RL = 50 Ω , CL = 5 pF, f = 1 MHz, adjacent channel
–98
dB
–117
dB
RL = 50 Ω , CL = 5 pF, f = 1 MHz
-14
dB
AC Power Supply Rejection
Ratio
RL = 10 kΩ , CL = 5 pF, VPP= 0.62 V, f= 1 MHz
–59
dB
BW
-3dB Bandwidth
RL = 50 Ω , CL = 5 pF
750
MHz
CIN
Digital input capacitance
VIN = 0 V or VDD
1.6
VS = 6 V, f = 1 MHz (PW package)
2.2
3.1
pF
VS = 6 V, f = 1 MHz (RTE package)
2.9
4.0
pF
pF
CS(OFF)
Source off-capacitance
CD(OFF)
Drain off-capacitance
VS = 6 V, f = 1 MHz
2.8
3.5
pF
CS(ON),
CD(ON)
Source and drain oncapacitance
VS = 6 V, f = 1 MHz
4.6
6.3
pF
8
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7.9 Typical Characteristics
at TA = 25°C, VDD = 15 V, and VSS = –15 V (unless otherwise noted)
650
250
600
550
VDD= 13.5V
VSS = -13.5V
On Resistance (:)
On Resistance (:)
200
VDD= 12V
VSS = -12V
150
100
VDD= 15V
VSS = -15V
50
0
-20
VDD= 16.5V
VSS = -16.5V
VDD= 10V
VSS = 0V
500
450
VDD= 12V
VSS = 0V
400
350
300
250
200
VDD= 14V
VSS = 0V
150
100
-15
-10
-5
0
5
10
Source or Drain Voltage (V)
15
0
20
2
4
6
8
10
Source or Drain Voltage (V)
D001
Dual Supply Operation (TA = 25°C)
Figure 1. On-Resistance vs Source or Drain Voltage
D002
Figure 2. On-Resistance vs Source or Drain Voltage
700
TA = 125qC
TA = 85qC
600
TA = 125qC
On Resistance (:)
200
On Resistance (:)
14
Single Supply Operation (TA = 25°C)
250
150
100
TA = 85qC
500
400
300
200
TA = 25qC
50
TA = -40qC
0
-15
100
TA = 25qC
TA = -40qC
0
-10
-5
0
5
Source or Drain Voltage (V)
10
15
0
2
4
6
8
Source or Drain Voltage (V)
D003
VDD = 15 V, VSS = –15 V
10
12
D004
VDD = 12 V, VSS = 0 V
Figure 3. On-Resistance vs Source or Drain Voltage
Figure 4. On-Resistance vs Source or Drain Voltage
400
400
ID(OFF)IS(OFF)+
ID(OFF)_1V
0
IS(OFF)+
-200
IS(OFF)-
-400
-600
ID(OFF)_10V
200
ID(ON)+
Leakage Current (pA)
200
Leakage Current (pA)
12
0
-200
IS(OFF)_1V
ID(ON)_10V
-400
ID(ON)-
ID(ON)_10V
ID(ON)_1V
-800
-50
-25
0
25
50
75
100
Ambient Temperature (qC)
125
VDD = 15 V, VSS = –15 V
Figure 5. Leakage Current vs Temperature
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150
D005
-600
-50
-25
0
25
50
75
100
Ambient Temperature (qC)
125
150
D006
VDD = 12 V, VSS = 0 V
Figure 6. Leakage Current vs Temperature
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Typical Characteristics (continued)
at TA = 25°C, VDD = 15 V, and VSS = –15 V (unless otherwise noted)
4
9
Charge Injection (pC)
Charge Injection (pC)
6
VDD= 10V
VSS = -10V
VDD= 15V
VSS = -15V
2
0
-2
VDD= 12V
VSS = 0V
-4
-15
-10
VDD= 10V
VSS = -10V
3
0
-3
-5
0
5
Source Voltage (V)
10
-9
-15
15
-10
-5
D007
TA = 25°C
Figure 7. Charge Injection vs Source Voltage
10
15
D008
Figure 8. Charge Injection vs Drain Voltage
0
tON (VDD= 12V, VSS= 0V)
-20
90 tON (VDD= 15V, VSS= -15V)
Off Isolation (dB)
Turn On/Off Time (ns)
0
5
Drain Voltage (V)
TA = 25°C
120
60
tOFF (VDD= 12V, VSS= 0V)
30
tOFF (VDD= 15V, VSS= -15V)
0
-50
VDD= 12V
VSS = 0V
VDD= 15V
VSS = -15V
-6
-25
0
VDD= 15V
VSS = -15V
-40
-60
-80
-100
VDD= 12V
VSS = 0V
-120
25
50
75
100
Ambient Temperature (qC)
125
-140
1E+5
150
1E+6
D009
1E+7
Frequency (Hz)
1E+8
5E+8
D001
TA = 25°C
Figure 9. Turn-On and Turn-Off Times vs Temperature
Figure 10. Off Isolation vs Frequency
0
100
50
-20
Adjacent Channels
THD + N (%)
Crosstalk (dB)
-40
-60
-80
-140
1E+5
Non-Adjacent Channels
1E+6
1E+7
Frequency (Hz)
1E+8
2
1
0.5
VDD= 5V
VSS = -5V
VDD= 15V
VSS = -15V
0.2
0.1
0.05
-100
-120
20
10
5
5E+8
0.02
0.01
1E+1
1E+2
D001
VDD = 15 V, VSS = –15 V, TA = 25°C
Figure 11. Crosstalk vs Frequency
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1E+3
Frequency (Hz)
1E+4
1E+5
D001
TA = 25°C
Figure 12. THD+N vs Frequency
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Typical Characteristics (continued)
at TA = 25°C, VDD = 15 V, and VSS = –15 V (unless otherwise noted)
-5
0
-40
-10
ACPSRR (dB)
Insertion Loss (dB)
-20
-15
-60
-80
-100
-120
-20
1E+5
1E+6
1E+7
Frequency(Hz)
1E+8
1E+9
-140
1E+3
1E+4
VDD = 15 V, VSS = –15 V, TA = 25°C
Figure 13. On Response vs Frequency
1E+7
D001
Figure 14. ACPSRR vs Frequency
8
6
4
CD(ON), CS(ON)
6
CS(ON), CD(ON)
Capactiance (pF)
Capactiance (pF)
1E+6
VDD = 15 V, VSS = –15 V, VPP= 0.62 V, TA = 25°C
8
CD(OFF)
2
CD(OFF)
4
2
CS(OFF)
0
-15
1E+5
Frequency (Hz)
D001
CS(OFF)
0
-12
-9
-6
-3
0
3
6
Source Voltage (V)
9
12
15
D001
0
2
4
6
8
Source Voltage (V)
10
12
D001
VDD = 15 V, VSS = –15 V, TA = 25°C
Figure 15. Capacitance vs Source Voltage
VDD = 12 V, VSS = 0 V, TA = 25°C
Figure 16. Capacitance vs Source Voltage
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8 Parameter Measurement Information
8.1 Truth Tables
Table 1, Table 2, Table 3and show the truth tables for the TMUX6111, TMUX6112, and TMUX6113, respectively.
Table 1. TMUX6111 Truth Table
SELx
STATE
0
All Switch ON
1
All Switch OFF
Table 2. TMUX6112 Truth Table
SELx
STATE
0
All Switch OFF
1
All Switch ON
Table 3. TUMUX6113 Truth Table
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SELx
STATE
0
Switch 1, 4 OFF
Switch 2, 3 ON
1
Switch 1, 4 ON
Switch 2, 3 OFF
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9 Detailed Description
9.1 Overview
The TMUX6111, TMUX6112, and TMUX6113 are 4-channel single-pole/ single-throw (SPDT) switches that
supports dual supplies (±5 V to ±17 V) or single supply (10 V to 17 V) operation. Each channel of the switch is
turned on or turned off based on the state of its corresponding SELx pin. The Functional Block Diagram section
provides a top-level block diagram of the switches.
9.1.1 On-Resistance
The on-resistance of the TMUX6111, TMUX6112, and TMUX6113 is the ohmic resistance across the source (Sx)
and drain (Dx) pins of the device. The on-resistance varies with input voltage and supply voltage. The symbol
RON is used to denote on-resistance. The measurement setup used to measure RON is shown in Figure 17.
Voltage (V) and current (ICH) are measured using this setup, and RON is computed as shown in Equation 1:
V
D
S
ICH
VS
Figure 17. On-Resistance Measurement Setup
RON = V / ICH
(1)
9.1.2 Off-Leakage Current
There are two types of leakage currents associated with a switch during the off state:
1. Source off-leakage current
2. Drain off-leakage current
Source leakage current is defined as the leakage current flowing into or out of the source pin when the switch is
off. This current is denoted by the symbol IS(OFF).
Drain leakage current is defined as the leakage current flowing into or out of the drain pin when the switch is off.
This current is denoted by the symbol ID(OFF).
The setup used to measure both off-leakage currents is shown in Figure 18
ID (OFF)
Is (OFF)
A
VS
S
D
A
VD
Figure 18. Off-Leakage Measurement Setup
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Overview (continued)
9.1.3 On-Leakage Current
On-leakage current is defined as the leakage current that flows into or out of the drain pin when the switch is in
the on state. The source pin is left floating during the measurement. Figure 19 shows the circuit used for
measuring the on-leakage current, denoted by ID(ON).
ID (ON)
D
S
A
NC
NC = No Connection
VD
Figure 19. On-Leakage Measurement Setup
9.1.4 Break-Before-Make Delay
The break-before-make delay is a safety feature of the TMUX6113 switch. The TMUX6113's ON switches first
break the connection before the OFF switches make connection. The time delay between the break and the
make is known as break-before-make delay. Figure 20 shows the setup used to measure break-before-make
delay, denoted by the symbol tBBM.
VDD
VSS
VDD
VSS
3V
TMUX6113
50%
VIN
50%
0V
VS
S1
D1
VS
VS
S2
D2
0.9 VS
0.9 VS
Output 1
Output 2
300 Ÿ
Output 2
VS
Output 1
300 Ÿ
SEL1,
SEL2
0V
0.9 VS
35 pF
35 pF
0.9 VS
tBBM2
tBBM1
VIN
GND
0V
tBBM= min (tBBM2, tBBM2)
Figure 20. Break-Before-Make Delay Measurement Setup
9.1.5 Turn-On and Turn-Off Time
Turn-on time is defined as the time taken by the output of the TMUX6111, TMUX6112, and TMUX6113 to rise to
a 90% final value after the SELx signal has risen (for NC switches) or fallen (for NO switches) to a 50% final
value. Figure 21 shows the setup used to measure turn-on time. Turn-on time is denoted by the symbol tON.
Turn off time is defined as the time taken by the output of the TMUX6111, TMUX6112, and TMUX6113 to fall to
a 10% initial value after the SELx signal has fallen (for NC switches) or risen (for NO switches) to a 50% initial
value. Figure 21 shows the setup used to measure turn-off time. Turn-off time is denoted by the symbol tOFF.
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Overview (continued)
VDD
VSS
VDD
VSS
3V
TMUX6111
50%
VIN
50%
0V
VS
3V
TMUX6112
50%
VIN
50%
Sx
Output
Dx
SELx
300 Ÿ
35 pF
0V
VS
Output
0.9 VS
VIN
GND
tOFF
tON
0.1 VS
Figure 21. Turn-On and Turn-Off Time Measurement Setup
9.1.6 Charge Injection
The TMUX6111, TMUX6112, and TMUX6113 have a simple transmission-gate topology. Any mismatch in
capacitance between the NMOS and PMOS transistors results in a charge injected into the drain or source
during the falling or rising edge of the gate signal. The amount of charge injected into the source or drain of the
device is known as charge injection, and is denoted by the symbol QINJ. Figure 22 shows the setup used to
measure charge injection.
VDD
VSS
VDD
VSS
3V
TMUX6111
VIN
0V
Sx
3V
Output
Dx
RS
TMUX6112
VS
VIN
1 nF
SELx
0V
VS
Output
VIN
QINJ = CL ×
VOUT
GND
VOUT
Figure 22. Charge-Injection Measurement Setup
9.1.7 Off Isolation
Off isolation is defined as the voltage at the drain pin (Dx) of the TMUX6111, TMUX6112, and TMUX6113 when
a 1-VRMS signal is applied to the source pin (Sx) of an OFF switch. Figure 23 shows the setup used to measure
off isolation. Use Equation 2 to compute off isolation.
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Overview (continued)
Network Analyzer
VDD
VSS
VDD
VSS
Sx
VOUT
Dx
SELx
VS
50 Ÿ
50 Ÿ
VIN
GND
Figure 23. Off Isolation Measurement Setup
Off Isolation
§V
·
20 ˜ Log ¨ OUT ¸
V
© S ¹
(2)
9.1.8 Channel-to-Channel Crosstalk
Channel-to-channel crosstalk is defined as the voltage at the source pin (Sx) of an off-channel, when a 1-VRMS
signal is applied at the source pin of an on-channel. Figure 24 shows the setup used to measure, and Equation 3
is the equation used to compute, channel-to-channel crosstalk.
Network Analyzer
VOUT
VS
VDD
VSS
VDD
VSS
S1
D1
S2
D2
50 Ÿ
SELx
50 Ÿ
50 Ÿ
VIN
GND
Figure 24. Channel-to-Channel Crosstalk Measurement Setup
Channel-to-Channel Crosstalk
§V
·
20 ˜ Log ¨ OUT ¸
© VS ¹
(3)
9.1.9 Bandwidth
Bandwidth is defined as the range of frequencies that are attenuated by < 3 dB when the input is applied to the
source pin (Sx) of an on-channel, and the output is measured at the drain pin (Dx) of the TMUX6111,
TMUX6112, and TMUX6113. Figure 25 shows the setup used to measure bandwidth of the switch. Use
Equation 4 to compute the attenuation.
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Overview (continued)
Network Analyzer
VDD
VSS
VDD
VSS
Sx
VOUT
Dx
SELx
VS
50 Ÿ
VIN
GND
Figure 25. Bandwidth Measurement Setup
Attenuation
§V ·
20 ˜ Log ¨ 2 ¸
© V1 ¹
(4)
9.1.10 THD + Noise
The total harmonic distortion (THD) of a signal is a measurement of the harmonic distortion, and is defined as the
ratio of the sum of the powers of all harmonic components to the power of the fundamental frequency at the mux
output. The on-resistance of the TMUX6111, TMUX6112, and TMUX6113 varies with the amplitude of the input
signal and results in distortion when the drain pin is connected to a low-impedance load. Total harmonic
distortion plus noise is denoted as THD+N. Figure 26 shows the setup used to measure THD+N of the
TMUX6111, TMUX6112, and TMUX6113.
Audio Precision
VDD
VSS
VDD
VSS
Sx
RS
VOUT
Dx
SELx
VS
10N Ÿ
VIN
GND
Figure 26. THD+N Measurement Setup
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9.2 Functional Block Diagram
VDD
VSS
VDD
SW
VSS
VDD
SW
D1
S1
SW
S1
D1
SW
S1
D1
SW
D2
S2
SW
S2
D2
SW
S2
D2
SW
D3
S3
VSS
SW
S3
D3
SW
S3
D3
SW
D4
S4
SW
S4
D4
S4
SEL1
SEL1
SEL1
SEL2
SEL2
SEL2
SEL3
SEL3
SEL3
SEL4
SEL4
SEL4
TMUX6111
D4
TMUX6112
TMUX6113
9.3 Feature Description
9.3.1 Ultra-low Leakage Current
The TMUX6111, TMUX6112, and TMUX6113 provide extremely low on- and off-leakage currents. The devices
are capable of switching signals from high source-impedance inputs into a high input-impedance op amp with
minimal offset error because of the ultralow leakage currents. Figure 27 shows typical leakage currents of the
devices versus temperature.
400
ID(OFF)-
Leakage Current (pA)
200
IS(OFF)+
ID(ON)+
0
IS(OFF)+
-200
IS(OFF)-
-400
-600
-800
-50
ID(ON)-
-25
0
25
50
75
100
Ambient Temperature (qC)
125
150
D005
Figure 27. Leakage Current vs Temperature
9.3.2 Ultra-low Charge Injection
The TMUX6111, TMUX6112, and TMUX6113 are implemented with simple transmission gate topology, as
shown in Figure 28. Any mismatch in the stray capacitance associated with the NMOS and PMOS causes an
output level change whenever the switch is opened or closed. The devices utilize special charge-injection
cancellation circuitry that reduces the source (Sx)-to-drain (Dx) charge injection to as low as 0.6 pC at VS = 0 V,
as shown in Figure 29.
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Feature Description (continued)
OFF ON
CGSN
CGDN
S
D
CGSP
CGDP
OFF ON
Figure 28. Transmission Gate Topology
Charge Injection (pC)
4
2
VDD= 15V
VSS = -15V
VDD= 10V
VSS = -10V
0
-2
VDD= 12V
VSS = 0V
-4
-15
-10
-5
0
5
Source Voltage (V)
10
15
D007
Figure 29. Source-to-Drain Charge Injection vs Source or Drain Voltage
9.3.3 Bidirectional and Rail-to-Rail Operation
The TMUX6111, TMUX6112, and TMUX6113 conduct equally well from source (Sx) to drain (Dx) or from drain
(Dx) to source (Sx). Each channel of the switches has very similar characteristics in both directions. The input
signal to the devices swings from VSS to VDD without any significant degradation in performance. The onresistance of these devices varies with input signal.
9.4 Device Functional Modes
Each channel of the TMUX6111, TMUX6112, and TMUX6113 is turned on or turned off based on the state of its
corresponding SELx pin. The SELx pins are weakly pulled-down through an internal 6 MΩ resistor, allowing the
switches to stay in a determined state when power is applies to the devices. The SELx pins can be connected to
VDD.
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10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
The TMUX6111, TMUX6112, and TMUX6113 offer outstanding input/output leakage currents and ultralow charge
injection. These devices operate up to 34 (dual supply) or 17 V (single supply), and offer true rail-to-rail input and
output. The on-capacitance of the TMUX6111, TMUX6112, and TMUX6113 is low. These features makes the
TMUX6111, TMUX6112, and TMUX6113 a family of precision, robust, high-performance analog multiplexer for
high-voltage, industrial applications.
10.2 Typical Application
One useful application to take advantage of TMUX6111, TMUX6112, and TMUX6113's precision performance is
the sample and hold circuit. A sample and hold circuit can be useful for an analog to digital converter (ADC) to
sample a varying input voltage with improved reliability and stability. It can also be used to store the output
samples from a single digital-to-analog converter (DAC) in a multi-output application. A simple sample and hold
circuit can be realized using an analog switch like one of the TMUX6111, TMUX6112, and TMUX6113 analog
switches.
+15V
-15V
VDD
VSS
CH
VIN1
SW1
+15V
+15V
±
CC
+
OPA2192
VOUT1
RC
OPA2192
±
±
-15V
+15V
+
SW2
SEL1/
SEL2
SEL3/
SEL4
-15V
CH
GND
CH
+15V
OPA2192
VIN2
SW3
+
RC
OPA2192
+
-15V
VOUT2
CC
±
SW4
-15V
CH
TMUX611x
Figure 30. A 2-output Sample and Hold Circuit Realized Using the TMUX611x Analog Switch
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Typical Application (continued)
10.2.1 Design Requirements
The purpose of this precision design is to implement an optimized 2-output sample and hold circuit using a 4channel SPST switch. The sample and hold circuit needs to be capable of supporting high voltage output swing
up to ± 15V with minimized pedestal error and fast settling time. The overall system block diagram is illustrated in
Figure 30.
10.2.2 Detailed Design Procedure
The TMUX6111, TMUX6112, or TMUX6113 switch is used in conjunction with the voltage holding capacitors
(CH) to implement the sample and hold circuit. The basic operation is:
1. When the switch (SW2 or SW3) is closed, it samples the input voltage and charges the holding capacitors
(CH) to the input voltages values.
2. When the switch (SW2 or SW3) is open, the holding capacitors (CH) holds its previous value, maintaining
stable voltage at the amplifier output (VOUT).
Ideally, the switch delivers only the input signals to the holding capacitors. However, when the switch gets
toggled, some amount of charge also gets transferred to the switch output in the form of charge injection,
resulting slight sampling error. The TMUX6111, TMUX6112, and TMUX6113 switches have excellent charge
injection performance of only 0.6 pC, making them ideal choices for this implementation to minimize sampling
error.
Due to switch and capacitor leakage current, the voltage on the hold capacitors droops with time. The
TMUX6111, TMUX6112, and TMUX6113 minimize the droops due to its ultra-low leakage performance. At 25°C,
the TMUX6111, TMUX6112, and TMUX6113 have extremely tiny leakage current at 1 pA typical and 20 pA max.
The TMUX6111, TMUX6112, and TMUX6113 devices also support high voltage capability. The devices support
up to ± 17 V dual supply operation, making it an ideal solution in this high voltage sample and hold application.
A second switch SW1 (or SW4) is also included to operate in parallel with SW2 (or SW3) to reduce pedestal
error during switch toggling. Because both switches are driven at the same potential, they act as common-mode
signal to the op-amp, thereby minimizing the charge injection effects caused by the switch toggling action.
Compensation network consisting of RC and CC is also added to further reduce the pedestal error, whiling
reducing the hold-time glitch and improving the settling time of the circuit.
10.3 Application Curves
TMUX6111, TMUX6112, and TMUX6113 have excellent charge injection performance of only 0.6 pC (typical),
making them ideal choices to minimize sampling error for the sample and hold application. Figure 31 shows the
plot for the charge injection vs. source input voltage for TMUX6111, TMUX6112, and TMUX6113.
Charge Injection (pC)
4
2
VDD= 15V
VSS = -15V
VDD= 10V
VSS = -10V
0
-2
VDD= 12V
VSS = 0V
-4
-15
-10
-5
0
5
Source Voltage (V)
10
15
D007
Figure 31. Charge injection vs. Source Voltage for TMUX6111, TMUX6112 and TMUX6113
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TMUX6111, TMUX6112, TMUX6113
SCDS383E – AUGUST 2018 – REVISED DECEMBER 2019
www.ti.com
11 Power Supply Recommendations
The TMUX6111, TMUX6112, and TMUX6113 operate across a wide supply range of ±5 V to ±17 V (10 V to 17 V
in single-supply mode). They also perform well with asymmetrical supplies such as VDD = 12 V and VSS= –5 V.
For improved supply noise immunity, use a supply decoupling capacitor ranging from 0.1 µF to 10 µF at both the
VDD and VSS pins to ground. Always ensure the ground (GND) connection is established before supplies are
ramped. As a best practice, it is recommended to ramp VSS first before VDD in dual or asymmetrical supply
applications.
The on-resistance of the devices varies with supply voltage, as illustrated in Figure 32
250
On Resistance (:)
200
VDD= 12V
VSS = -12V
VDD= 13.5V
VSS = -13.5V
150
100
VDD= 15V
VSS = -15V
50
0
-20
-15
VDD= 16.5V
VSS = -16.5V
-10
-5
0
5
10
Source or Drain Voltage (V)
15
20
D001
Figure 32. On-Resistance Variation With Supply and Input Voltage
22
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SCDS383E – AUGUST 2018 – REVISED DECEMBER 2019
12 Layout
12.1 Layout Guidelines
Figure 33 illustrates an example of a PCB layout with the TMUX6112PW. Some key considerations are:
•
•
•
•
Decouple the VDD and VSS pins with a 0.1-µF capacitor, placed as close to the pin as possible. Make sure
that the capacitor voltage rating is sufficient for the VDD and VSS supplies.
Keep the input lines as short as possible.
Use a solid ground plane to help distribute heat and reduce electromagnetic interference (EMI) noise pickup.
Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if
possible, and only make perpendicular crossings when necessary.
12.2 Layout Example
Via to
ground plane
SEL1
SEL2
D1
D2
S1
S2
VSS
VDD
GND
C
TMUX6112
C
NC
S4
S3
D4
D3
SEL4
SEL3
Via to
ground plane
Figure 33. TMUX6112PW Layout Example
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TMUX6111, TMUX6112, TMUX6113
SCDS383E – AUGUST 2018 – REVISED DECEMBER 2019
www.ti.com
13 Device and Documentation Support
13.1 Documentation Support
13.1.1 Related Documentation
• OPAx192 36-V, Precision, Rail-to-Rail Input/Output, Low Offset Voltage, Low Input Bias Current Op Amp with
e-trim™ (SBOS620E)
13.2 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to order now.
Table 4. Related Links
PARTS
PRODUCT FOLDER
ORDER NOW
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
TMUX6111
Click here
Click here
Click here
Click here
Click here
TMUX6112
Click here
Click here
Click here
Click here
Click here
TMUX6113
Click here
Click here
Click here
Click here
Click here
13.3 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
13.4 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
13.5 Trademarks
E2E is a trademark of Texas Instruments.
13.6 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
13.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
24
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Product Folder Links: TMUX6111 TMUX6112 TMUX6113
TMUX6111, TMUX6112, TMUX6113
www.ti.com
SCDS383E – AUGUST 2018 – REVISED DECEMBER 2019
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2018–2019, Texas Instruments Incorporated
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Product Folder Links: TMUX6111 TMUX6112 TMUX6113
25
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TMUX6111PWR
ACTIVE
TSSOP
PW
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
MUX6111
TMUX6111RTER
ACTIVE
WQFN
RTE
16
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
TM6111
TMUX6112PWR
ACTIVE
TSSOP
PW
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
MUX6112
TMUX6112RTER
ACTIVE
WQFN
RTE
16
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
TM6112
TMUX6113PWR
ACTIVE
TSSOP
PW
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
MUX6113
TMUX6113RTER
ACTIVE
WQFN
RTE
16
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
TM6113
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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