TPS40120
www.ti.com
SLUS616B – JULY 2004 – REVISED AUGUST 2004
VRM10.0 COMPLIANT PROGRAMMABLE FEEDBACK DIVIDER
FEATURES
•
•
DESCRIPTION
VRM 10.x VID Code Table
14-Pin TSSOP
The TPS40120 is a 6-bit digitally programmed
feedback divider designed to work with TPS40090
multiphase controller or other controllers having 0.7-V
internal reference to support VRM 10.x compliant
power supplies. The TPS40120 is designed to support discrete DC/DC converters for Intel® processors
using 5-bit (Pentium® 4 or Xeon™) or 6-bit VID codes
with 12.5 mV steps.
APPLICATIONS
•
•
Voltage Regulator Modules VRM/EVRD 10.x
Multiphase Processor Power Supplies
TYPICAL APPLICATION
TPS40090
BP5
22
GNDS
14
VOUT
VCC
12
TPS40120
1
11
R3
2
FB
VID0
C1
9
COMP
9
FB
3
7
VID2
BIAS
VID3
10
NCPU2 13
6
+
DROOP
REF
RDROOP
5
Error Amplifier
10
VID1
RZCO
4
+
DIFFO
VOUT 8
VID5
Differential
Amplifier
13
VID4
+
Drivers
Enable
SS
NCPU1 12
GND
7
IDROOP
8
700 mV
15
CSS
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004, Texas Instruments Incorporated
TPS40120
www.ti.com
SLUS616B – JULY 2004 – REVISED AUGUST 2004
These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOSFET
gates.
ORDERING INFORMATION
(1)
TA
PLASTIC HTTSOP (1)
-40°C to 85°C
TPS40120PW
The PW package is available taped and reeled. Add an R suffix to
the device type (i.el TPS40120PWR).
ABSOLUTE MAXIMUM RATING (1)
over operating free-air temperature range unless otherwise noted
TPS40120
UNITS
VID0, VID1, VID2, VID3, VID4, VID5, VOUT
-0.3 to 5.5
V
FB, NCPU2
-0.3 to 5.5
VCC, NCPU1
-0.3 to 7.0
TA
Operating ambient temperature range
-40 to 85
Tstg
Storage temperature
-55 to 150
VIN
Input voltage range
VOUT
Output voltage range
(1)
V
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage
values are with respect to the network ground terminal unless otherwise noted.
RECOMMENDED OPERATING CONDITIONS
Supply voltage, VCC
VID0, VID1, VID2, VID3, VID4, VID5,
VOUT
I/O voltage range
Operating free-air temperature, TA
MIN
NOM
MAX
4.3
5.0
5.5
-0.1
5.5
-40
85
UNIT
V
°C
ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
VVCC
Supply voltatge
IVCC
Supply current
RFB
Resistance between FB and OUT
TEST CONDITIONS
MIN
TYP
MAX
4.3
5.0
5.5
1
mA
7.5
10
14.5
kΩ
All VID inputs low
Divider accuracy
-0.5%
UNIT
V
0.5%
VIDTHD
VID input logic high
VIDTHD
VID input logic low
0.85
IBIAS
BIAS input leakage
VBIAS = 0.7 V
100
Logic low voltage
IPULLUP= 1 mA
0.8
V
1
µA
VVCC 0.5
V
0.3
Logic high leakage current
No CPU output voltage
2
IL(SNK)= 0.5 mA, IL(SRC)= 0.5 mA
VVSS+
0.5
V
µA
TPS40120
www.ti.com
SLUS616B – JULY 2004 – REVISED AUGUST 2004
DEVICE INFORMATION
PW PACKAGE
(TOP VIEW)
VID5
VID0
VID1
VID2
VID3
VID4
GND
1
2
3
4
5
6
7
VCC
NCPU2
NCPU1
N/C
BIAS
FB
VOUT
14
13
12
11
10
9
8
TERMINAL FUNCTIONS
TERMINAL
NAME
NO.
I/O
DESCRIPTION
BIAS
10
I
Provides controller’s reference voltage into the divider for improved tolerance.
FB
9
O
Middle point of the feedback divider connected to the inverting input of the controller’s error
amplifier
GND
7
-
Signal ground pin.
NCPU1
12
O
Signals no CPU state. VID = x11111. Open drain output.
NCPU2
13
O
Signals no CPU state. VID = x11111. TTL logic output.
VCC
14
I
Power to the device.
VID0
2
I
VID1
3
I
VID2
4
I
VID3
5
I
VID4
6
I
VID5
1
I
VOUT
8
I
Voltage identification inputs. VREF voltage is set in accordance with VRM 10.x codes applied to
these pins.
This pin is connected to the output of the VR module or to the output of the differential amplifier
of the TPS40090 controller.
FUNCTIONAL BLOCK DIAGRAM
TPS40120
14 VCC
10 kΩ
8
VID5
1
VID0
2
VID1
3
VID2
4
VID3
5
VID4
6
GND
7
9
DC
Rx
FB
10 BIAS
12 NCPU1
No CPU
VOUT
13 NCPU2
3
TPS40120
www.ti.com
SLUS616B – JULY 2004 – REVISED AUGUST 2004
DETAILED DESCRIPTION
Operation
The digitally programmed feedback divider TPS40120 substitutes for a discrete output voltage set-divider and
allows for multiphase PWM controllers such as the TPS4009x, TPS40130 and with internal reference of 0.7 V to
provide voltage identification (VID) feature to power supply designs.
The TPS40120 operates as a resistive divider with constant value of the upper resistor and variable and code
determined value of the lower resistor, refer to the functional block diagram. The VID code truth table is
presented in Table 1.
Dynamic VID
Most modern processors adjust their core voltage depending on the workload and clock frequency by
commanding voltage identification (VID) codes to the power supply.The power supply reads these VID codes
and adjusts the output voltage in a control manner per processor requirements. To provide safe transition from
one VID code to another (and to ensure that no erroneous output voltage is produced by the power supply), the
TPS40120 VID inputs have internal anti-skew circuit with approximately 500 ns of filtering time. With a rate of
change of 12.5 mV in 5 µs, nothing else is required to achieve smooth upward and downward core voltage
transitions. See Figure 1 and Figure 2.
Figure 1. VID Step-Up Transition
4
Figure 2. VID Step-Down Transition
TPS40120
www.ti.com
SLUS616B – JULY 2004 – REVISED AUGUST 2004
DETAILED DESCRIPTION (continued)
Table 1. Voltage Identification (VID)
PROCESSOR PINS (0=LOW, 1=HIGH)
(1)
VREF (V)
VID4
VID3
VID2
VID1
VID0
VID5
0
1
0
1
0
0
0.8375
0
1
0
0
1
1
0.8500
0
1
0
0
1
0
0.8625
0
1
0
0
0
1
0.8750
0
1
0
0
0
0
0.8875
0
0
1
1
1
1
0.9000
0
0
1
1
1
0
0.9125
0
0
1
1
0
1
0.9250
0
0
1
1
0
0
0.9375
0
0
1
0
1
1
0.9500
0
0
1
0
1
0
0.9625
0
0
1
0
0
1
0.9750
0
0
1
0
0
0
0.9875
0
0
0
1
1
1
1.0000
0
0
0
1
1
0
1.0125
0
0
0
1
0
1
1.0250
0
0
0
1
0
0
1.0375
0
0
0
0
1
1
1.0500
0
0
0
0
1
0
1.0625
0
0
0
0
0
1
1.075
0
0
0
0
0
0
1.0875
1
1
1
1
1
1
OFF (1)
1
1
1
1
1
0
OFF (1)
1
1
1
1
0
1
1.1000
1
1
1
1
0
0
1.1125
1
1
1
0
1
1
1.1250
1
1
1
0
1
0
1.1375
1
1
1
0
0
1
1.1500
1
1
1
0
0
0
1.1625
1
1
0
1
1
1
1.1750
1
1
0
1
1
0
1.1875
1
1
0
1
0
1
1.2000
1
1
0
1
0
0
1.2125
1
1
0
0
1
1
1.2250
1
1
0
0
1
0
1.2375
1
1
0
0
0
1
1.2500
1
1
0
0
0
0
1.2625
1
0
1
1
1
1
1.2750
1
0
1
1
1
0
1.2875
1
0
1
1
0
1
1.3000
1
0
1
1
0
0
1.3125
1
0
1
0
1
1
1.3250
1
0
1
0
1
0
1.3375
1
0
1
0
0
1
1.3500
NCPU1 and NCPU2 outputs go low.
5
TPS40120
www.ti.com
SLUS616B – JULY 2004 – REVISED AUGUST 2004
DETAILED DESCRIPTION (continued)
Table 1. Voltage Identification (VID) (continued)
PROCESSOR PINS (0=LOW, 1=HIGH)
6
VREF (V)
VID4
VID3
VID2
VID1
VID0
VID5
1
0
1
0
0
0
1.3625
1
0
0
1
1
1
1.3750
1
0
0
1
1
0
1.3875
1
0
0
1
0
1
1.4000
1
0
0
1
0
0
1.4125
1
0
0
0
1
1
1.4250
1
0
0
0
1
0
1.4375
1
0
0
0
0
1
1.4500
1
0
0
0
0
0
1.4625
0
1
1
1
1
1
1.4750
0
1
1
1
1
0
1.4875
0
1
1
1
0
1
1.500
0
1
1
1
0
0
1.5125
0
1
1
0
1
1
1.5250
0
1
1
0
1
0
1.5375
0
1
1
0
0
1
1.5500
0
1
1
0
0
0
1.5625
0
1
0
1
1
1
1.5750
0
1
0
1
1
0
1.5875
0
1
0
1
0
1
1.6000
TPS40120
www.ti.com
SLUS616B – JULY 2004 – REVISED AUGUST 2004
APPLICATION INFORMATION
Typical application circuit for TPS40120 and TPS40090 combination is presented on the front page. Normally,
the TPS40120 accepts power from the BP5 pin of the TPS40090 multiphase controller which simplifies its
enable/disable control. The upper resistor of the programmable divider (pin 8) is connected to the output of the
differential amplifier DIFFO. The center tap of the divider (pin 9) is connected to the joint point of the FB pin of
the multi-phase controller and error amplifier compensation network. TPS40120 has two logic NCPUx outputs
that can be used to control output and the gate drivers in a multi-phase power supply when no-CPU code is
asserted. The NCPU1 output is an open drain that can be useful by discharging the soft-start capacitor and
bringing the output voltage down. The push-pull NCPU2 output can be used to control gate drivers to provide
high impedance of the power supply output in off state.
The application circuit for a four-phase 105-A CPU VRM10.x compliant power supply is shown in Figure 3.
+
12V
+
+
ZLO Set
Figure 3. VRM 10.x Compliant CPU Power Supply
For detailed information on TPS40090 multiphase controller and design example request the TPS4009x
datasheet (SLUS578) and the user's guide (SLUU026).
7
PACKAGE OPTION ADDENDUM
www.ti.com
18-Aug-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
TPS40120PW
ACTIVE
TSSOP
PW
14
90
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
40120
Samples
TPS40120PWR
ACTIVE
TSSOP
PW
14
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
40120
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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