UC3853NG4

UC1853 UC2853 UC3853 High Power Factor Preregulator FEATURES • Complete 8-pin Power Factor Solution • Reduced External Components • RMS Line Voltage Compensation • Precision Multiplier/Squarer/Divider • Internal 75kHz Synchronizable Oscillator • Average Current Mode PWM Control • Overvoltage Protection Comparator • High Current, Clamped Gate Driver DESCRIPTION The UC3853 provides simple, yet high performance active power factor correction. Using the same control technique as the UC1854, this 8-pin device exploits a simplified architecture and an internal oscillator to minimize external component count. The UC3853 incorporates a precision multiplier/squarer/divider circuit, voltage and current loop error amplifiers, and a precision voltage reference to implement average current mode control with RMS line voltage compensation. This control technique maintains constant loop gain with changes in input voltage, which minimizes input line current distortion over the worldwide input voltage range. The internal 75kHz oscillator includes an external clock input, allowing synchronization to downstream converters. Additionally, the device features an overvoltage protection comparator, a clamped MOSFET gate driver which self-biases low during undervoltage lockout, and low startup and supply current. These devices are available in 8-pin plastic and ceramic dual in-line (DIP) packages, and 8-lead small outline (SOIC) packages. The UC1853 is specified for operation from –55°C to +125°C, the UC2853 is specified for operation from –25°C to +85°C, and the UC3853 is specified for operation from 0°C to +70°C. BLOCK DIAGRAM UDG-94120-1 11/97 UC1853 UC2853 UC3853 ABSOLUTE MAXIMUM RATINGS CONNECTION DIAGRAM Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40V Output Drive Current, Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.125A Peak . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5A Output Minimum Voltage . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V IAC Maximum Input Current . . . . . . . . . . . . . . . . . . . . . . . . 1mA IMO Maximum Output Current . . . . . . . . . . . . . . . . . . . . . –2mA IMO Minimum Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V FB Maximum Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 5V VCOMP Maximum Voltage. . . . . . . . . . . . . . . . . . . . . . . . . 6.2V ICOMP Sourcing Current . . . . . . . . . . . . . . . . . . . . Self-Limiting ICOMP Sinking Current . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA ICOMP Maximum Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 7.2V Storage Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C Junction Temperature . . . . . . . . . . . . . . . . . . . –55°C to +150°C Lead Temperature (Soldering, 10 sec.) . . . . . . . . . . . . . +300°C All voltages with respect to GND. Currents are positive into, negative out of the specified terminal. Consult Packaging Section of Databook for thermal limitations and considerations of packages. DIL-8, SOIC-8 (Top View) J or N, D Package ELECTRICAL CHARACTERISTICS Unless otherwise stated, these parameters apply for TA = –55°C to +125°C for the UC1853; –25°C to +85°C for the 2853; and 0°C to +70°C for the UC3853; VCC = 16V, VFB = 3V, IAC = 100mA, VVCOMP = 3.75V, VICOMP = 3V, TA = TJ. PARAMETER TEST CONDITIONS MIN TYP MAX UNITS Undervoltage Lockout Section VCC Turn-on Threshold VVCOMP, VICOMP Open Hysteresis 1.5 11.5 13 V 1.8 2.1 V Supply Current Section IVCC Startup VCC = 8V, IAC = 100µA; VVCOMP, VICOMP Open 250 500 mA IVCC IAC = 0µA, VICOMP = 0V 10 15 mA 450 575 µmho 640 µmho 3 3.075 V Voltage Loop Error Amplifier Section Transconductance IOUT = ± 20µA 0-70C Temperature Input Voltage 300 135 0-70C 2.925 Temperature 2.9 AVOL VVCOMP = 1V – 4V 50 Output Sink Current VFB = 3.2V, VVCOMP = 3.75V 20 Output Source Current VFB = 2.8V, VVCOMP = 3.75V Output Voltage High 3.1 60 5.5 Output Voltage Low µA 50 –50 –20 6 0.6 V dB µA V 0.9 V 6 mV Current Loop Error Amplifier Section Offset Voltage Voltage Gain 0 VICOMP = 1V – 4V Sink Current VIMO = 100mV, VICOMP = 3V Source Current VIMO = –0.1V, VICOMP = 3V 70 1 mA –150 Output High IICOMP = –50mA Output Low IICOMP = 50mA 6 0.3 PWM Modulator Gain VICOMP = 2V – 3V (Note 1) 20 2 dB –80 6.8 mA V 0.8 V %/V UC1853 UC2853 UC3853 ELECTRICAL CHARACTERISTICS Unless otherwise stated, these parameters apply for TA = –55°C to +125°C for the UC1853; –25°C to +85°C for the 2853; and 0°C to +70°C for the UC3853; VCC = 16V, VFB = 3V, IAC = 100mA, VVCOMP = 3.75V, VICOMP = 3V, TA = TJ. (continued) PARAMETER TEST CONDITIONS MIN TYP MAX UNITS –230 –200 –170 µA –2 –0.2 2 µA –236 –178 –168 µA Multiplier Section Output Current – IAC Limited VCC = 11V, VVCOMP = 6V Output Current – Zero IAC = 0µA Output Current – Power Limited VCC = 12V, VVCOMP = 5.5V Output Current VCC= 12V, VVCOMP = 2V –22 µA VCC= 12V, VVCOMP = 5V –156 µA VCC= 40V, VVCOMP = 2V –2 µA VCC= 40V, VVCOMP = 5V –14 µA VCC= 12V, VVCOMP = 5.5V (Note 2) –1.05 Oscillator Initial Frequency TA = 25°C Oscillator Frequency Line, Load, Temperature Multiplier Gain Constant V –1 –0.9 –0.75 67.5 75 82.5 kHz 56 75 94 kHz 100 kHz Oscillator Section Synchronization Frequency Range Synchronization Pulse Amplitude Pulse slew rate = 100V/msec (Note 3) 2 V Output Driver Section Maximum Output Voltage 0mA load, VCC = 20V Output High 0mA load, VCC = 12V, ref. to VCC –50mA load, VCC = 12V, ref. to VCC 12 15 17.5 V –2.7 –1.7 V –3 –2.2 V Output Low (Device Inactive) Vcc = 0V, 20mA load (Sinking) 0.9 2.0 V Output Low (Device Active) 50mA load (Sinking) 0.5 1 V OUT Rise Time 1nF from OUT to GND 55 100 ns OUT Fall Time 1nF from OUT to GND 35 100 ns OUT Maximum Duty Cycle VICOMP = 0V 88 93 % Volts Above EA Input V 90 150 mV 80 mV OVP Comparator Section Threshold Voltage Hysteresis Note 1: PWM modulator gain = ∆DutyCycle ∆VICOMP Note 2: – 1. 5 V ) Gain constant (K) = IAC • (VCOMP VCC , VCC = 12V. IMO • VCC • 64 Note 3. Synchronization is accomplished with a falling edge of 2V magnitude and 100V/µsec slew rate. 3 UC1853 UC2853 UC3853 PIN DESCRIPTIONS vents excessive MOSFET gate-to-source voltage so that the UC3853 can be operated with VCC and high as 40V. A series gate resistor of at least 5 ohms should be used to minimize clamp voltage overshoot. In addition, a Schottky diode such as a 1N5818 connected between OUT and GND may be necessary to prevent parasitic substrate diode conduction. FB: Voltage Amplifier Inverting Input, Overvoltage Comparator Input, Sync Input. This pin serves three functions. FB accepts a fraction of the power factor corrected output voltage through a voltage divider, and is nominally regulated to 3V. FB voltages 5% greater than nominal will trip the overvoltage comparator, and shut down the output stage until the output voltage drops 5%. The internal oscillator can be synchronized through FB by injecting a 2V clock signal though a capacitor. To prevent false tripping of the overvoltage comparator, the clock signal must have a fast falling edge, but a slow rising edge. See Application Note U-159 for more information. ICOMP: Current Loop Error Amplifier Output. The current loop error amplifier is a conventional operational amplifier with a 150µA current source class A output stage. Compensate the current loop by placing an impedance between ICOMP and IMO. This output can swing above the oscillator peak voltage, allowing zero duty cycle when necessary. GND: Ground. All voltages are measured with respect to GND. The VCC bypass capacitor should be connected to ground as close to the GND pin as possible. VCC: Input Supply Voltage. This pin serves two functions. It supplies power to the chip, and an input voltage level signal to the squarer circuit. When this input is connected to a DC voltage proportional to the AC input RMS voltage, the voltage loop gain is reduced by IAC: AC Waveform Input. This input provides voltage waveform information to the multiplier. The current loop will try to produce a current waveform with the same shape as the IAC signal. IAC is a low impedance input, nominally at 2V, which accepts a current proportional to the input voltage. Connect a resistor from the rectified input line to IAC which will conduct 500mA at maximum line voltage. CC 2 . This configuration maintains constant loop gain. The UC3853 input voltage range extends from 12V to 40V, allowing an AC supply voltage range in excess of 85VAC to 265VAC. Bypass VCC with at least a 0.1µF ceramic capacitor to ensure proper operation. See the Applications section for the recommended circuit configuration. IMO: Multiplier Output and Current Sense Inverting Input. The output of the multiplier and the inverting input of the current amplifier are connected together at IMO. Avoid bringing this input below –0.5V to prevent the internal protection diode from conducting. The multiplier output is a current, making this a summing node and allowing a differential current error amplifier configuration to reject ground noise. The input resistance at this node should be 3.9k to minimize input bias current induced offset voltage. See the Applications section for the recommended circuit configuration. VCOMP: Voltage Loop Error Amplifier Output. The voltage loop error amplifier is a transconductance type operational amplifier. A feedback impedance between VCOMP and FB for loop compensation must be avoided to maintain proper operation of the overvoltage protection comparator. Instead, compensate the voltage loop with an impedance between VCOMP and GND. When VCOMP is below 1.5V, the multiplier output current is zero. OUT: Gate Driver Output. OUT provides high current gate drive for the external power MOSFET. A 15V clamp pre- 4 UC1853 UC2853 UC3853 UC3853 TYPICAL APPLICATION UDG-97127 Note: the application circuit shown is a 100W, 75KHz design. Additional application information can be found in Application Note U–159 and Design Note DN–78. UNITRODE CORPORATION 7 CONTINENTAL BLVD. • MERRIMACK, NH 03054 TEL. (603) 424-2410 • FAX (603) 424-3460 5 PACKAGE OPTION ADDENDUM www.ti.com 13-Aug-2021 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) UC2853D ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-2-260C-1 YEAR -25 to 85 UC2853D UC2853DTR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -25 to 85 UC2853D UC2853N ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type -25 to 85 UC2853N UC3853D ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-2-260C-1 YEAR 0 to 70 UC3853D UC3853DTR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR 0 to 70 UC3853D UC3853N ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 UC3853N UC3853NG4 ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 UC3853N (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of