CAT24C02C

CAT24C02C 2K-Bit Serial E2PROM FEATURES s 400 KHZ I C Bus Compatible* s 1.8 to 6.0Volt Operation s Low Power CMOS Technology 2 s Page Write Buffer s Self-Timed Write Cycle with Auto-Clear s 1,000,000 Program/Erase Cycles s 100 Year Data Retention DESCRIPTION The CAT24C02C is a 2K-bit Serial CMOS E2PROM internally organized as 256 words of 8 bits each. Catalyst’s advanced CMOS technology substantially reduces device power requirements. The the CAT24C02C features a 16-byte page write buffer. The device operates via the I2C bus serial interface and has a ISO 7816 compatible pinout. DIE PAD CONFIGURATION VSS DC DC DC BLOCK DIAGRAM VCC EXTERNAL LOAD DOUT ACK VCC VSS WORD ADDRESS BUFFERS COLUMN DECODERS SENSE AMPS SHIFT REGISTERS SDA START/STOP LOGIC XDEC CONTROL LOGIC E2PROM SDA NC NC SCL DATA IN STORAGE PIN FUNCTIONS Pin Name NC SDA SCL VCC VSS DC Function No Connect Serial Data/Address Serial Clock +1.8V to +6.0V Power Supply Ground Don't Connect SCL STATE COUNTERS SLAVE ADDRESS COMPARATORS HIGH VOLTAGE/ TIMING CONTROL * Catalyst Semiconductor is licensed by Philips Corporation to carry the I2C Bus Protocol. © 1999 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice 1 Doc. No. 25086 -00 8/99 S-1 CAT24C02C ABSOLUTE MAXIMUM RATINGS* Temperature Under Bias ................. –55°C to +125°C Storage Temperature ....................... –65°C to +150°C Voltage on Any Pin with Respect to VSS(1) ................. –2.0V to +VCC + 2.0V VCC with Respect to VSS ................................ –2.0V to +7.0V Package Power Dissipation Capability (Ta = 25°C) ................................... 1.0W Lead Soldering Temperature (10 secs) ............ 300°C Output Short Circuit Current(2) ........................ 100mA RELIABILITY CHARACTERISTICS Symbol NEND(3) TDR (3) *COMMENT Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability. Parameter Endurance Data Retention ESD Susceptibility Latch-up Min. 1,000,000 100 2000 100 Max. Units Cycles/Byte Years Volts mA Reference Test Method MIL-STD-883, Test Method 1033 MIL-STD-883, Test Method 1008 MIL-STD-883, Test Method 3015 JEDEC Standard 17 VZAP(3) ILTH(3)(4) D.C. OPERATING CHARACTERISTICS VCC = +1.8V to +6.0V, unless otherwise specified. Limits Symbol ICC ISB (5) Parameter Power Supply Current Standby Current (VCC = 5.0V) Input Leakage Current Output Leakage Current Input Low Voltage Input High Voltage Output Low Voltage (VCC = 3.0V) Output Low Voltage (VCC = 1.8V) Min. Typ. Max. 3 0 10 10 Units mA µA µA µA V V V V Test Conditions fSCL = 100 KHz VIN = GND or VCC VIN = GND to VCC VOUT = GND to VCC ILI ILO VIL VIH VOL1 VOL2 –1 VCC x 0.7 VCC x 0.3 VCC + 0.5 0.4 0.5 IOL = 3 mA IOL = 1.5 mA CAPACITANCE TA = 25°C, f = 1.0 MHz, VCC = 5V Symbol CI/O(3) CIN(3) Test Input/Output Capacitance (SDA) Input Capacitance (SCL) Max. 8 6 Units pF pF Conditions VI/O = 0V VIN = 0V Note: (1) The minimum DC input voltage is –0.5V. During transitions, inputs may undershoot to –2.0V for periods of less than 20 ns. Maximum DC voltage on output pins is VCC +0.5V, which may overshoot to VCC + 2.0V for periods of less than 20ns. (2) Output shorted for no more than one second. No more than one output shorted at a time. (3) This parameter is tested initially and after a design or process change that affects the parameter. (4) Latch-up protection is provided for stresses up to 100 mA on address and data pins from –1V to VCC +1V. (5) Standby Current (ISB) = 0µA (