CY6264_06

CY6264 8K x 8 Static RAM Features • Temperature Ranges — Commercial: 0°C to 70°C — Industrial: –40°C to 85°C — Automotive-A: –40°C to 85°C • High Speed — 55 ns • CMOS for optimum speed/power • Easy memory expansion with CE1, CE2 and OE features • TTL-compatible inputs and outputs • Automatic power-down when deselected • Available in Pb-free and non Pb-free 28-lead SNC package Functional Description The CY6264 is a high-performance CMOS static RAM organized as 8192 words by 8 bits. Easy memory expansion is provided by an active LOW chip enable (CE1), an active HIGH chip enable (CE2), and active LOW output enable (OE) and three-state drivers. Both devices have an automatic power-down feature (CE1), reducing the power consumption by over 70% when deselected. The CY6264 is packaged in a 450-mil (300-mil body) SOIC. An active LOW write enable signal (WE) controls the writing/reading operation of the memory. When CE1 and WE inputs are both LOW and CE2 is HIGH, data on the eight data input/output pins (I/O0 through I/O7) is written into the memory location addressed by the address present on the address pins (A0 through A12). Reading the device is accomplished by selecting the device and enabling the outputs, CE1 and OE active LOW, CE2 active HIGH, while WE remains inactive or HIGH. Under these conditions, the contents of the location addressed by the information on address pins is present on the eight data input/output pins. The input/output pins remain in a high-impedance state unless the chip is selected, outputs are enabled, and write enable (WE) is HIGH. A die coat is used to ensure alpha immunity. Logic Block Diagram Pin Configuration SOIC Top View NC A4 A5 A6 A7 A8 A9 A10 A11 A12 I/O0 I/O1 I/O2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC WE CE2 A3 A2 A1 OE A0 CE1 I/O7 I/O6 I/O5 I/O4 I/O3 I/O0 INPUT BUFFER I/O1 A1 A2 A3 A4 A5 A6 A7 A8 ROW DECODER SENSE AMPS I/O2 I/O3 I/O4 I/O5 I/O6 8K x 8 ARRAY CE1 CE2 WE OE COLUMN DECODER POWER DOWN I/O7 A 10 A11 A0 A9 A12 Cypress Semiconductor Corporation Document #: 001-02367 Rev. *A • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 Revised August 8, 2006 [+] [+] Feedback CY6264 Selection Guide Range Maximum Access Time Maximum Operating Current Commercial Industrial Automotive-A Maximum CMOS Standby Current Commercial Industrial Automotive-A 15 30 -55 55 100 260 -70 70 100 200 200 15 30 30 Unit ns mA mA mA mA mA mA Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ................................. –65°C to +150°C Ambient Temperature with Power Applied............................................. –55°C to +125°C Supply Voltage to Ground Potential ............... –0.5V to +7.0V DC Voltage Applied to Outputs in High Z State[1] ............................................ –0.5V to +7.0V DC Input Voltage[1] ......................................... –0.5V to +7.0V Output Current into Outputs (LOW)............................. 20 mA Static Discharge Voltage........................................... >2001V (per MIL-STD-883, Method 3015) Latch-Up Current .................................................... >200 mA Operating Range Range Commercial Industrial Automotive-A Ambient Temperature 0°C to +70°C –40°C to +85°C –40°C to +85°C VCC 5V ± 10% Electrical Characteristics Over the Operating Range -55 Parameter VOH VOL VIH VIL IIX IOZ ICC Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage[1] Input Leakage Current VCC Operating Supply Current GND < VI < VCC VCC = Max.,IOUT = 0 mA Com’l Ind’l Auto-A ISB1 Automatic CE1 Power–Down Current Max. VCC, CE1 > VIH, Min. Duty Cycle=100% Com’l Ind’l Auto-A ISB2 Automatic CE1 Power–Down Current Max. VCC, CE1 > VCC – 0.3V, Com’l VIN > VCC – 0.3V or VIN < 0.3V Ind’l Auto-A 15 30 20 50 Output Leakage Current GND < VI < VCC, Output Disabled Test Conditions VCC = Min., IOH = –4.0 mA VCC = Min., IOL = 8.0 mA 2.2 –0.5 –5 –5 Min. 2.4 0.4 VCC 0.8 +5 +5 100 260 2.2 –0.5 –5 –5 Max. Min. 2.4 0.4 VCC 0.8 +5 +5 100 200 200 20 40 40 15 30 30 mA mA -70 Max. Unit V V V V µA µA mA Capacitance[2] Parameter CIN COUT Description Input Capacitance Output Capacitance Test Conditions TA = 25°C, f = 1 MHz, VCC = 5.0V Max. 7 7 Unit pF pF Notes: 1. Minimum voltage is equal to –3.0V for pulse durations less than 30 ns. 2. Tested initially and after any design or process changes that may affect these parameters. Document #: 001-02367 Rev. *A Page 2 of 9 [+] [+] Feedback CY6264 AC Test Loads and Waveforms 5V OUTPUT 30 pF INCLUDING JIG AND SCOPE R1 481Ω 5V OUTPUT R2 255Ω 5 pF INCLUDING JIG AND SCOPE R1 481Ω ALL INPUT PULSES 3.0V R2 255Ω GND 10% 90% 90% 10% < 5 ns < 5 ns (a) (b) Equivalent to: THEVENIN EQUIVALENT OUTPUT 167Ω 1.73V Switching Characteristics Over the Operating Range[3] -55 Parameter READ CYCLE tRC tAA tOHA tACE1 tACE2 tDOE tLZOE tHZOE tLZCE1 tLZCE2 tHZCE tPU tPD WRITE tWC tSCE1 tSCE2 tAW tHA tSA tPWE tSD tHD tHZWE tLZWE CYCLE[6] Write Cycle Time CE1 LOW to Write End CE2 HIGH to Write End Address Set-Up to Write End Address Hold from Write End Address Set-Up to Write Start WE Pulse Width Data Set-Up to Write End Data Hold from Write End WE LOW to High Z[4] WE HIGH to Low Z 5 50 40 30 40 0 0 25 25 0 20 5 70 60 50 55 0 0 40 35 0 30 ns ns ns ns ns ns ns ns ns ns ns Read Cycle Time Address to Data Valid Data Hold from Address Change CE1 LOW to Data Valid CE2 HIGH to Data Valid OE LOW to Data Valid OE LOW to Low Z OE HIGH to High CE1 LOW to Low Z[4] Z[5] Z[4, 6] 0 25 5 3 20 0 30 3 20 5 5 30 5 55 40 25 5 30 55 55 5 70 70 35 70 70 ns ns ns ns ns ns ns ns ns ns ns ns ns Description Min. Max. Min. -70 Max. Unit CE2 HIGH to Low Z CE1 HIGH to High CE2 LOW to High Z CE1 LOW to Power-Up CE1 HIGH to Power-Down Notes: 3. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified IOL/IOH and 30-pF load capacitance. 4. tHZOE, tHZCE, and tHZWE are specified with CL = 5 pF as in part (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage. 5. At any given temperature and voltage condition, tHZCE is less than tLZCE for any given device. 6. The internal write time of the memory is defined by the overlap of CE1 LOW, CE2 HIGH, and WE LOW. Both signals must be LOW to initiate a write and either signal can terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write. Document #: 001-02367 Rev. *A Page 3 of 9 [+] [+] Feedback CY6264 Switching Waveforms Read Cycle No. 1[7, 8] tRC ADDRESS tOHA DATA OUT PREVIOUS DATA VALID tAA DATA VALID Read Cycle No. 2[9, 10] CE1 tRC CE2 OE OE tACE tDOE tLZOE HIGH IMPEDANCE tLZCE VCC SUPPLY CURRENT tPU 50% tHZOE tHZCE DATA VALID tPD ICC 50% ISB HIGH IMPEDANCE DATA OUT Notes: 7. Device is continuously selected. OE, CE = VIL. CE2 = VIH. 8. Address valid prior to or coincident with CE transition LOW. 9. WE is HIGH for read cycle. 10. Data I/O is High Z if OE = VIH, CE1 = VIH, or WE = VIL. Document #: 001-02367 Rev. *A Page 4 of 9 [+] [+] Feedback CY6264 Switching Waveforms (continued) Write Cycle No. 1 (WE Controlled)[8, 10] tWC ADDRESS tSCE1 CE1 CE2 tSCE2 OE tAW WE tSA tPWE tHA tSD DATA IN DATA VALID IN tHZWE DATA I/O DATA UNDEFINED tHD tLZWE HIGH IMPEDANCE Write Cycle No. 2 (CE Controlled)[8, 10, 11] tWC ADDRESS CE1 tSA CE2 tSCE2 tAW tPWE WE tSD DATA IN DATA VALID IN tHZWE DATA I/O HIGH IMPEDANCE DATA UNDEFINED tHD tHA tSCE1 Note: 11. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state. Document #: 001-02367 Rev. *A Page 5 of 9 [+] [+] Feedback CY6264 Typical DC and AC Characteristics OUTPUT SOURCE CURRENT (mA) NORMALIZED SUPPLY CURRENT vs. SUPPLY VOLTAGE 1.4 NORMALIZED ICC, ISB NORMALIZED ICC, ISB 1.2 1.0 0.8 0.6 0.4 0.2 0.0 4.0 4.5 5.0 ISB 5.5 6.0 ICC 1.2 1.0 0.8 0.6 0.4 0.2 0.0 −55 ISB 25 125 VCC =5.0V VIN =5.0V NORMALIZED SUPPLY CURRENT vs. AMBIENT TEMPERATURE OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE 120 100 80 60 40 20 ICC VCC =5.0V TA =25°C 0 0.0 1.0 2.0 3.0 4.0 SUPPLY VOLTAGE (V) NORMALIZED ACCESS TIME vs. SUPPLY VOLTAGE 1.4 NORMALIZED t AA 1.3 1.2 1.1 TA =25°C 1.0 0.9 0.8 4.0 4.5 5.0 5.5 6.0 NORMALIZED tAA 1.6 1.4 1.2 1.0 AMBIENT TEMPERATURE (°C) NORMALIZED ACCESS TIME vs. AMBIENT TEMPERATURE OUTPUT VOLTAGE (V) OUTPUT SINK CURRENT vs.OUTPUT VOLTAGE 140 120 100 80 60 40 20 0 0.0 1.0 2.0 3.0 4.0 VCC =5.0V TA =25°C VCC =5.0V 0.8 0.6 −55 25 125 SUPPLY VOLTAGE (V) TYPICAL POWER-ON CURRENT vs. SUPPLY VOLTAGE 3.0 NORMALIZED I PO 2.5 DELTA tAA (ns) 2.0 1.5 1.0 0.5 0.0 0.0 1.0 2.0 3.0 4.0 5.0 30.0 AMBIENT TEMPERATURE (°C) TYPICAL ACCESS TIME CHANGE vs. OUTPUT LOADING 1.25 NORMALIZED I CC OUTPUT SINK CURRENT (mA) OUTPUT VOLTAGE (V) NORMALIZED ICC vs. CYCLE TIME VCC =5.0V TA =25°C VCC =0.5V 1.00 25.0 20.0 15.0 10.0 5.0 0.0 0 200 400 VCC =4.5V TA =25°C 0.75 600 800 1000 0.50 10 20 30 40 SUPPLY VOLTAGE(V) CAPACITANCE (pF) CYCLE FREQUENCY (MHz) Document #: 001-02367 Rev. *A Page 6 of 9 [+] [+] Feedback CY6264 Truth Table CE1 H X L L L CE2 X L H H H WE X X H L H OE X X L X H High Z High Z Data Out Data In High Z Input/Output Mode Deselect/Power-Down Deselect Read Write Deselect Address Designators Address Name A4 A5 A6 A7 A8 A9 A10 A11 A12 A0 A1 A2 A3 Address Function X3 X4 X5 X6 X7 Y1 Y4 Y3 Y0 Y2 X0 X1 X2 Pin Number 2 3 4 5 6 7 8 9 10 21 23 24 25 Document #: 001-02367 Rev. *A Page 7 of 9 [+] [+] Feedback CY6264 Ordering Information Speed (ns) 55 70 Ordering Code CY6264-55SNXC CY6264-55SNXI CY6264-70SNC CY6264-70SNXC CY6264-70SNI CY6264-70SNXI CY6264-70SNXA Package Diagram 51-85092 Package Type 28-lead (300-mil Narrow Body) SNC (Pb-Free) 28-lead (300-mil Narrow Body) SNC (Pb-Free) 28-lead (300-mil Narrow Body) SNC 28-lead (300-mil Narrow Body) SNC (Pb-Free) 28-lead (300-mil Narrow Body) SNC 28-lead (300-mil Narrow Body) SNC (Pb-Free) 28-lead (300-mil Narrow Body) SNC (Pb-Free) Automotive-A Industrial Operating Range Commercial Industrial Commercial Please contact your local Cypress sales representative for availability of these parts Package Diagram 28-lead (300 mil) SNC Package Outline (Narrow Body) (51-85092) PIN 1 ID DIMENSIONS IN INCHES OMEDATA CSPI MIN. MAX. 0.390 0.420 0.463 0.477 0.291 0.300 0.014 0.020 0.026 0.032 0.015 0.020 DETAIL "B" DETAIL "A" SEATING PLANE 0.702 0.710 0.094 0.110 A 0.390 0.420 B 0.004 0.002 0.014 0.020 0.042 0.050 TYP. 0.008 0.012 51-85092-*B All products and company names mentioned in this document may be the trademarks of their respective holders. Document #: 001-02367 Rev. *A Page 8 of 9 © Cypress Semiconductor Corporation, 2006. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. [+] [+] Feedback CY6264 Document History Page Document Title: CY6264 8K x 8 Static RAM Document Number: 001-02367 REV. ** *A ECN NO. Issue Date 384870 488954 See ECN See ECN Orig. of Change PCI VKN Description of Change Spec # change from 38-00425 to 001-02367 Added Automotive product Added 55 ns Industrial spec Removed SOIC package from the product offering Changed the description of IIX from Input Load Current to Input Leakage Current in DC Electrical Characteristics table Removed IOS parameter from DC Electrical Characteristics table Updated ordering Information table Document #: 001-02367 Rev. *A Page 9 of 9 [+] [+] Feedback