MAX16939ATERB/V+T

EVALUATION KIT AVAILABLE MAX16935/MAX16939 36V, 3.5A, 2.2MHz Step-Down Converters with 28µA Quiescent Current General Description The MAX16935/MAX16939 are 3.5A current-mode stepdown converters with integrated high-side and lowside MOSFETs designed to operate with an external Schottky diode for better efficiency. The low-side MOSFET enables fixed-frequency forced-PWM (FPWM) operation under light-load applications. The devices operate with input voltages from 3.5V to 36V, while using only 28FA quiescent current at no load. The switching frequency is resistor programmable from 220kHz to 2.2MHz and can be synchronized to an external clock. The devices’ output voltage is available as 3.3V/5V fixed or adjustable from 1V to 10V. The wide input voltage range along with its ability to operate at 98% duty cycle during undervoltage transients make the devices ideal for automotive and industrial applications. Under light-load applications, the FSYNC logic input allows the devices to either operate in skip mode for reduced current consumption or fixed-frequency FPWM mode to eliminate frequency variation to minimize EMI. Fixed-frequency FPWM mode is extremely useful for power supplies designed for RF transceivers where tight emission control is necessary. Protection features include cycle-by-cycle current limit and thermal shutdown with automatic recovery. Additional features include a power-good monitor to ease power-supply sequencing and a 180N out-of-phase clock output relative to the internal oscillator at SYNCOUT to create cascaded power supplies with multiple devices. The MAX16935/MAX16939 operate over the -40NC to +125NC automotive temperature range and are available in 16-pin (5mm x 5mm) TQFN-EP and 16-pin TSSOP-EP packages. Applications ●● Point-of-Load Applications ●● Distributed DC Power Systems ●● Navigation and Radio Head Units 19-6868; Rev 17; 1/18 Benefits and Features ●● Integration and High-Switching Frequency Saves Space • Integrated 3.5A High-Side Switch • Low-BOM-Count Current-Mode Control Architecture • Fixed Output Voltage with ±2% Accuracy or Externally Resistor Adjustable (1V to 10V) • 220kHz to 2.2MHz Switching Frequency with Three Operation Modes (Skip Mode, Forced Fixed-Frequency Operation, and External Frequency Synchronization) • Automatic LX Slew-Rate Adjustment for Optimum Efficiency Across Operating Frequency Range ●● 180° Out-of-Phase Clock Output at SYNCOUT Enables Cascaded Power Supplies for Increased Power Output ●● Spread-Spectrum Frequency Modulation Reduces EMI Emissions ●● Wide Input Voltage Range Supports Automotive Applications • 3.5V to 36V Input Voltage Range (42V Tolerant) • Enable Input Compatible from 3.3V Logic Level to 42V ●● Robust Performance Supports Wide Range of Automotive Applications • -40°C to +125°C Automotive Temperature Range • Thermal-Shutdown Protection • AEC-Q100 Qualified ●● Power-Good Output Allows Power-Supply Sequencing ●● Tight Overvoltage Protection Provides Smaller Overshoot Voltages (MAX16939) Ordering Information/Selector Guide and Typical Application Circuit appear at end of data sheet. MAX16935/MAX16939 36V, 3.5A, 2.2MHz Step-Down Converters with 28µA Quiescent Current Absolute Maximum Ratings SUP, SUPSW, EN to PGND....................................-0.3V to +42V LX (Note 1).............................................................-0.3V to +42V SUP to SUPSW......................................................-0.3V to +0.3V BIAS to AGND..........................................................-0.3V to +6V SYNCOUT, FOSC, COMP, FSYNC, PGOOD, FB to AGND......................... -0.3V to (VBIAS + 0.3V) OUT to PGND.........................................................-0.3V to +12V BST to LX (Note 1)...................................................-0.3V to +6V AGND to PGND....................................................-0.3V to + 0.3V LX Continuous RMS Current.................................................3.5A Output Short-Circuit Duration.....................................Continuous Continuous Power Dissipation (TA = +70NC)* TQFN (derate 28.6mW/NC above +70NC)...............2285.7mW TSSOP (derate 26.1mW/NC above +70NC).............2088.8mW Operating Temperature Range..................... -40NC to +125NC Junction Temperature......................................................+150NC Storage Temperature Range............................. -65NC to +150NC Lead Temperature (soldering, 10s).................................+300NC Soldering Temperature (reflow).......................................+260NC *As per JEDEC51 standard (multilayer board). Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Package Thermal Characteristics (Note 2) TQFN TSSOP Junction-to-Ambient Thermal Resistance (BJA)...........35NC/W Junction-to-Case Thermal Resistance (BJC)...............2.7NC/W Junction-to-Ambient Thermal Resistance (BJA)........38.3NC/W Junction-to-Case Thermal Resistance (BJC)..................3NC/W Note 1: Self-protected against transient voltages exceeding these limits for ≤ 50ns under normal operation and loads up to the maximum rated output current. Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. Electrical Characteristics (VSUP = VSUPSW = 14V, VEN = 14V, L1 = 2.2FH, CIN = 4.7FF, COUT = 22FF, CBIAS = 1FF, CBST = 0.1FF, RFOSC = 12kI, TA = TJ = -40NC to +125NC, unless otherwise noted. Typical values are at TA = +25NC.) PARAMETER Supply Voltage Load-Dump Event Supply Voltage Supply Current SYMBOL CONDITIONS VSUP, VSUPSW VSUP_LD ISUP_STANDBY MIN TYP 3.5 tLD < 1s MAX UNITS 36 V 42 V Standby mode, no load, VOUT = 5V, VFSYNC = 0V MAX16935/39 28 40 MAX16935C 32 45 Standby mode, no load, VOUT = 3.3V, VFSYNC = 0V MAX16935/39 22 35 MAX16935C 23 36 5 10 FA FA Shutdown Supply Current ISHDN VEN = 0V BIAS Regulator Voltage VBIAS VSUP = VSUPSW = 6V to 42V, IBIAS = 0 to 10mA 4.7 5 5.4 V VBIAS rising 2.95 3.15 3.40 V 450 650 mV BIAS Undervoltage Lockout BIAS Undervoltage-Lockout Hysteresis VUVBIAS Thermal-Shutdown Threshold +175 NC Thermal-Shutdown Threshold Hysteresis 15 NC www.maximintegrated.com Maxim Integrated │  2 MAX16935/MAX16939 36V, 3.5A, 2.2MHz Step-Down Converters with 28µA Quiescent Current Electrical Characteristics (continued) (VSUP = VSUPSW = 14V, VEN = 14V, L1 = 2.2FH, CIN = 4.7FF, COUT = 22FF, CBIAS = 1FF, CBST = 0.1FF, RFOSC = 12kI, TA = TJ = -40NC to +125NC, unless otherwise noted. Typical values are at TA = +25NC.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS OUTPUT VOLTAGE (OUT) FPWM Mode Output Voltage Skip Mode Output Voltage VOUT_5V VOUT_3.3V VOUT_SKIP_5V VOUT_SKIP_3.3V VFB = VBIAS, 6V < VSUPSW < 36V, fixed-frequency mode (Notes 3, 4) 4.9 5 5.1 3.234 3.3 3.366 No load, VFB = VBIAS, skip mode (Note 5) 4.9 5 5.15 3.234 3.3 3.4 V V Load Regulation VFB = VBIAS, 300mA < ILOAD < 3.5A 0.5 % Line Regulation VFB = VBIAS, 6V < VSUPSW < 36V (Note 4) 0.02 %/V BST Input Current LX Current Limit IBST_ON High-side MOSFET on, VBST - VLX = 5V IBST_OFF High-side MOSFET off, VBST - VLX = 5V, TA = +25°C ILX LX Rise Time Skip Mode Current Threshold ISKIP_TH TA = +25°C RON_H Low-Side Switch Leakage Current 5.2 2 mA 5 FA 6.2 A ns MAX16935 150 300 400 MAX16939 200 400 500 mA fOSC Q6% ILX = 1A, VBIAS = 5V High-side MOSFET off, VSUP = 36V, VLX = 0V, TA = +25NC RON_L 1.5 4 Spread spectrum enabled High-Side-Switch Leakage Current Low-Side Switch On-Resistance 4.2 RFOSC = 12kW Spread Spectrum High-Side-Switch On-Resistance Peak inductor current 1 ILX = 0.2A, VBIAS = 5V 100 220 mI 1 3 FA 1.5 3 I 1 FA 20 100 nA 1.0 1.015 V VLX = 36V, TA = +25NC TRANSCONDUCTANCE AMPLIFIER (COMP) FB Input Current IFB FB Regulation Voltage VFB FB Line Regulation DVLINE Transconductance (from FB to COMP) gm Minimum On-Time tON_MIN Maximum Duty Cycle DCMAX FB connected to an external resistor divider, 6V < VSUPSW < 36V (Note 6) 0.99 6V < VSUPSW < 36V 0.02 %/V VFB = 1V, VBIAS = 5V 700 FS (Note 5) 80 ns 98 % OSCILLATOR FREQUENCY Oscillator Frequency www.maximintegrated.com RFOSC = 73.2kI 340 400 460 kHz RFOSC = 12kI 2.0 2.2 2.4 MHz Maxim Integrated │  3 MAX16935/MAX16939 36V, 3.5A, 2.2MHz Step-Down Converters with 28µA Quiescent Current Electrical Characteristics (continued) (VSUP = VSUPSW = 14V, VEN = 14V, L1 = 2.2FH, CIN = 4.7FF, COUT = 22FF, CBIAS = 1FF, CBST = 0.1FF, RFOSC = 12kI, TA = TJ = -40NC to +125NC, unless otherwise noted. Typical values are at TA = +25NC.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS EXTERNAL CLOCK INPUT (FSYNC) External Input Clock Acquisition time tFSYNC External Input Clock Frequency 1 RFOSC = 12kI (Note 7) 1.8 1.4 External Input Clock High Threshold VFSYNC_HI VFSYNC rising External Input Clock Low Threshold VFSYNC_LO VFSYNC falling Soft-Start Time tSS 5.6 Enable Input High Threshold VEN_HI 2.4 Enable Input Low Threshold VEN_LO Enable Threshold Voltage Hysteresis VEN_HYS Cycles 2.6 MHz V 8 0.4 V 12 ms ENABLE INPUT (EN) Enable Input Current IEN V 0.6 0.2 TA = +25NC V 0.1 1 FA 95 97 %VFB POWER GOOD (PGOOD) VTH_RISING PGOOD Switching Level VTH_FALLING VFB rising, VPGOOD = high 93 VFB falling, VPGOOD = low (MAX16935C, VOUT = 5V) 4.5 VFB falling, VPGOOD = low VFB falling, VPGOOD = low (MAX16935C) PGOOD Debounce Time V 90 92 94 %VFB 90.5 92.5 94.5 %VFB 10 25 50 Fs 200 300 PGOOD Assertion Delay VOUT rising edge (MAX16935B) PGOOD Output Low Voltage ISINK = 5mA PGOOD Leakage Current VOUT in regulation, TA = +25NC SYNCOUT Low Voltage ISINK = 5mA SYNCOUT Leakage Current TA = +25NC 1 FA FSYNC Leakage Current TA = +25NC 1 FA Fs 0.4 V 1 FA 0.4 V OVERVOLTAGE PROTECTION Overvoltage-Protection Threshold Note Note Note Note Note VOUT rising (monitored at FB pin) MAX16935 107 MAX16939 105 VOUT falling (monitored at FB pin) MAX16935 105 MAX16939 102 % 3: Device not in dropout condition. 4: Filter circuit required, see the Typical Application Circuit. 5: Guaranteed by design; not production tested. 6: FB regulation voltage is 1%, 1.01V (max), for -40°C < TA < +105°C. 7: Contact the factory for SYNC frequency outside the specified range. www.maximintegrated.com Maxim Integrated │  4 MAX16935/MAX16939 36V, 3.5A, 2.2MHz Step-Down Converter with 28µA Quiescent Current Typical Operating Characteristics (VSUP = VSUPSW = 14V, VEN = 14V, VOUT = 5V, VFYSNC = 0V, RFOSC = 12kI, TA = +25NC, unless otherwise noted.) fSW = 2.2MHz, VIN = 14V SKIP MODE 5V 70 90 fSW = 400kHz, VIN = 14V 5.08 VOUT = 5V, VIN = 14V 80 SKIP MODE 5.06 SKIP MODE 5V 70 60 3.3V 50 3.3V 40 5V 30 20 50 3.3V 40 PWM MODE 0.0010 0.1000 VOUT LOAD REGULATION 0.0010 4.90 VOUT = 5V, VIN = 14V 2.28 5.06 PWM MODE 2.26 VOUT = 3.3V 2.14 4.92 0.5 1.0 1.5 ILOAD (A) 2.0 2.5 3.0 2.10 3.5 0.0 0.5 1.0 1.5 ILOAD (A) 2.0 2.5 3.0 2.12 2.08 2.04 -40 -25 -10 5 20 35 50 65 80 95 110 125 www.maximintegrated.com 0.0 0.5 1.0 1.5 2.0 ILOAD (A) 2.5 toc08 50 3.0 3.5 45 2.00 1.75 1.50 1.25 1.00 0.75 0.50 40 35 30 25 20 5V/2.2MHz SKIP MODE 15 0 2.00 VOUT = 3.3V SUPPLY CURRENT vs. SUPPLY VOLTAGE 0.25 TEMPERATURE (°C) 433 425 3.5 SUPPLY CURRENT (µA) 2.16 2.25 SWITCHING FREQUENCY (MHz) VOUT = 5V 2.20 VOUT = 5V 435 SWITCHING FREQUENCY vs. RFOSC 2.50 toc07 2.24 VIN = 14V, PWM MODE 427 fSW vs. TEMPERATURE VIN = 14V, PWM MODE toc06 429 2.12 0.0 3.5 431 2.16 2.2MHz 3.0 437 2.18 4.96 2.5 439 2.20 4.98 1.5 2.0 ILOAD (A) 441 fSW (kHz) 5.00 1.0 443 VOUT = 5V 2.22 0.5 445 VIN = 14V, PWM MODE 2.24 400kHz 5.02 0.0 fSW vs. LOAD CURRENT toc05 fSW (MHz) VOUT(V) 10.0000 2.30 5.08 5.04 fSW (MHz) 0.1000 fSW vs. LOAD CURRENT toc04 2.2MHz 4.92 LOAD CURRENT (A) 5.10 4.94 4.98 4.94 0 0.0000 10.0000 5.00 4.96 20 LOAD CURRENT (A) 2.28 5.02 3.3V 10 0 0.0000 4.90 5V 30 10 400kHz 5.04 60 PWM MODE toc03 5.10 VOUT (V) 80 EFFICIENCY (%) 100 EFFICIENCY (%) 90 toc02 toc09 toc01 100 VOUT LOAD REGULATION EFFICIENCY vs. LOAD CURRENT EFFICIENCY vs. LOAD CURRENT 12 42 72 RFOSC (kΩ) 102 132 10 6 16 26 36 SUPPLY VOLTAGE (V) Maxim Integrated │  5 MAX16935/MAX16939 36V, 3.5A, 2.2MHz Step-Down Converter with 28µA Quiescent Current Typical Operating Characteristics (continued) (VSUP = VSUPSW = 14V, VEN = 14V, VOUT = 5V, VFYSNC = 0V, RFOSC = 12kI, TA = +25NC, unless otherwise noted.) 8 5.04 4 3 2 5V/2.2MHz SKIP MODE 1 0 6 12 18 24 30 36 4.97 VOUT (V) 5 4.96 4.95 4.94 VOUT (V) 4.98 4.94 VIN = 14V, PWM MODE 4.92 4.90 -40 -25 -10 5 20 35 50 65 80 95 110 125 6 12 18 36 42 toc15 toc13 toc14 10V/div 0V 10V/div 0V VIN 5V/div 0V VOUT 5.01 30 SLOW VIN RAMP BEHAVIOR FULL-LOAD STARTUP BEHAVIOR 5V/400kHz PWM MODE ILOAD = 0A 24 VIN (V) TEMPERATURE (°C) VOUT vs. VIN 5.03 5.00 4.96 4.93 4.92 4.91 4.90 SUPPLY VOLTAGE (V) 5.05 toc12 5.02 4.98 6 5V/2.2MHz PWM MODE ILOAD = 0A 5.06 4.99 7 VBIAS (V) SUPPLY CURRENT (µA) ILOAD = 0A 5.01 5.00 5.08 toc11 5.02 toc10 9 VOUT vs. VIN VBIAS vs. TEMPERATURE SHDN CURRENT vs. SUPPLY VOLTAGE 10 1A/div 0V VIN 5V/div 0V VOUT 4.99 5V/div 0V 4.97 VPGOOD ILOAD 5V/div 0V VPGOOD 4.95 6 12 18 24 30 2A/div 0V ILOAD 36 VIN (V) SYNC FUNCTION DIPS AND DROPS TEST toc17 toc18 10V/div VIN VLX 5V/2.2MHz 5V/div 5V/div VOUT VFSYNC 2V/div 0V 0V 10V/div VLX 0V 5V/div VPGOOD 200ns www.maximintegrated.com 0V 10ms Maxim Integrated │  6 MAX16935/MAX16939 36V, 3.5A, 2.2MHz Step-Down Converter with 28µA Quiescent Current Typical Operating Characteristics (continued) (VSUP = VSUPSW = 14V, VEN = 14V, VOUT = 5V, VFYSNC = 0V, RFOSC = 12kI, TA = +25NC, unless otherwise noted.) COLD CRANK LOAD DUMP toc19 toc20 VIN VOUT 0V 2V/div VPGOOD 10V/div VIN 2V/div VOUT 5V/div 2V/div 0V 0V 400ms 100ms LOAD TRANSIENT (PWM MODE) SHORT CIRCUIT IN PWM MODE toc21 VOUT (AC_COUPLED) toc22 2V/div 200mV/ div VOUT 0V 2A/div INDUCTOR CURRENT LOAD CURRENT 2A/ div 0A 0A 5V/div VPGOOD 0V 10ms www.maximintegrated.com Maxim Integrated │  7 MAX16935/MAX16939 36V, 3.5A, 2.2MHz Step-Down Converters with 28µA Quiescent Current LX 13 PGND 14 MAX16935 MAX16939 PGOOD 15 16 15 14 13 12 11 10 8 BST 7 AGND 6 BIAS 5 COMP BST EN 9 SUPSW EN 10 SUP SUP 11 LX SUPSW 12 LX LX PGOOD TOP VIEW PGND Pin Configurations 9 MAX16935 MAX16939 EP 4 5 6 7 8 BIAS FB 3 AGND OUT 2 COMP FOSC TQFN 1 FB 4 OUT 3 FOSC 2 FSYNC 1 + SYNCOUT EP + FSYNC SYNCOUT 16 TSSOP Pin Descriptions PIN NAME FUNCTION TQFN TSSOP 16 1 SYNCOUT 1 2 FSYNC Synchronization Input. The device synchronizes to an external signal applied to FSYNC. Connect FSYNC to AGND to enable skip mode operation. Connect to BIAS or to an external clock to enable fixed-frequency forced PWM mode operation. 2 3 FOSC Resistor-Programmable Switching Frequency Setting Control Input. Connect a resistor from FOSC to AGND to set the switching frequency. 3 4 OUT Switching Regulator Output. OUT also provides power to the internal circuitry when the output voltage of the converter is set between 3V to 5V during standby mode. 4 5 FB Feedback Input. Connect an external resistive divider from OUT to FB and AGND to set the output voltage. Connect to BIAS to set the output voltage to 5V. 5 6 COMP 6 7 BIAS 7 8 AGND 8 9 BST High-Side Driver Supply. Connect a 0.1FF capacitor between LX and BST for proper operation. 9 10 EN SUP Voltage Compatible Enable Input. Drive EN low to disable the device. Drive EN high to enable the device. www.maximintegrated.com Open-Drain Clock Output. SYNCOUT outputs 180N out-of-phase signal relative to the internal oscillator. Connect to OUT with a resistor between 100I and 1kW for 2MHz operation. For low frequency operation, use a resistor between 1kW and 10kW. Error Amplifier Output. Connect an RC network from COMP to AGND for stable operation. See the Compensation Network section for more information. Linear Regulator Output. BIAS powers up the internal circuitry. Bypass with a 1FF capacitor to ground. Analog Ground Maxim Integrated │  8 MAX16935/MAX16939 36V, 3.5A, 2.2MHz Step-Down Converters with 28µA Quiescent Current Pin Descriptions (continued) PIN TQFN TSSOP NAME 10 11 SUP 11 12 SUPSW 12, 13 13, 14 LX 14 15 PGND 15 16 PGOOD — — EP FUNCTION Voltage Supply Input. SUP powers up the internal linear regulator. Bypass SUP to PGND with a 4.7FF ceramic capacitor. It is recommended to add a placeholder for an RC filter to reduce noise on the internal logic supply (see the Typical Application Circuit) Internal High-Side Switch Supply Input. SUPSW provides power to the internal switch. Bypass SUPSW to PGND with 0.1FF and 4.7FF ceramic capacitors. Inductor Switching Node. Connect a Schottky diode between LX and AGND. Power Ground Open-Drain, Active-Low Power-Good Output. PGOOD asserts when VOUT is above 95% regulation point. PGOOD goes low when VOUT is below 92% regulation point. Exposed Pad. Connect EP to a large-area contiguous copper ground plane for effective power dissipation. Do not use as the only IC ground connection. EP must be connected to PGND. Detailed Description The MAX16935/MAX16939 are 3.5A current-mode stepdown converters with integrated high-side and low-side MOSFETs designed to operate with an external Schottky diode for better efficiency. The low-side MOSFET enables fixed-frequency forced-PWM (FPWM) operation under light-load applications. The devices operate with input voltages from 3.5V to 36V, while using only 28FA quiescent current at no load. The switching frequency is resistor programmable from 220kHz to 2.2MHz and can be synchronized to an external clock. The output voltage is available as 3.3V/5V fixed or adjustable from 1V to 10V. The wide input voltage range along with its ability to operate at 98% duty cycle during undervoltage transients make the devices ideal for automotive and industrial applications. Under light-load applications, the FSYNC logic input allows the devices to either operate in skip mode for reduced current consumption or fixed-frequency FPWM mode to eliminate frequency variation to minimize EMI. Fixed frequency FPWM mode is extremely useful for power supplies designed for RF transceivers where tight emission control is necessary. Protection features include cycle-by-cycle current limit, overvoltage protection, and thermal shutdown with automatic recovery. Additional features include a powergood monitor to ease power-supply sequencing and a 180N out-of-phase clock output relative to the internal oscillator at SYNCOUT to create cascaded power supplies with multiple devices. www.maximintegrated.com Wide Input Voltage Range The devices include two separate supply inputs (SUP and SUPSW) specified for a wide 3.5V to 36V input voltage range. VSUP provides power to the device and VSUPSW provides power to the internal switch. When the device is operating with a 3.5V input supply, conditions such as cold crank can cause the voltage at SUP and SUPSW to drop below the programmed output voltage. Under such conditions, the device operate in a high duty-cycle mode to facilitate minimum dropout from input to output. In applications where the input voltage exceeds 25V, output is ≤ 5V, operating frequency is ≥ 1.8MHz and the IC is selected to be in FPWM mode by either forcing the FSYNC pin high, or using an external clock, pulse skipping is observed on the LX pin. This happens due to insufficient minimum on time. Under certain load conditions (typically < 1A), a filter circuit from LX to GND is required to maintain the output voltage within the expected data sheet limits. A typical filter value of RFILTER = 1I, CFILTER = 220pF (see the Typical Application Circuit) is sufficient to filter out the noise and maintain the output voltage within data sheet limits. This extra filter on the LX pin of the IC has no impact on efficiency. Linear Regulator Output (BIAS) The devices include a 5V linear regulator (BIAS) that provides power to the internal circuit blocks. Connect a 1FF ceramic capacitor from BIAS to AGND. Maxim Integrated │  9 MAX16935/MAX16939 36V, 3.5A, 2.2MHz Step-Down Converters with 28µA Quiescent Current OUT COMP FB FBSW PGOOD FBOK EN SUP AON HVLDO BIAS SWITCH OVER BST SUPSW EAMP LOGIC PWM HSD REF LX CS SOFT START BIAS LSD MAX16935 MAX16939 PGND SLOPE COMP SYNCOUT OSC FSYNC FOSC AGND Figure 1. Internal Block Diagram Power-Good Output (PGOOD) The devices feature an open-drain power-good output, PGOOD. PGOOD asserts when VOUT rises above 95% of its regulation voltage. PGOOD deasserts when VOUT drops below 92% of its regulation voltage. Connect PGOOD to BIAS with a 10kI resistor. reaching > 110% of the regulated voltage. If MAX16935C output reaches overvoltage-protection thresholds it turns on the active pulldown on the output (100Ω, typ) to prevent the output from rising above 110% of regulated voltage. This does not protect against a hard-short across the HSFET of the IC. Overvoltage Protection (OVP) Synchronization Input (FSYNC) If the output voltage reaches the OVP threshold, the high-side switch is forced off and the low-side switch is forced on until negative-current limit is reached. After negative-current limit is reached, both the high-side and low-side switches are turned off. The MAX16939 offers a lower voltage threshold for applications requiring tighter limits of protection. The MAX16935C offers overvoltage protection in all modes of operation and protects the output against www.maximintegrated.com FSYNC is a logic-level input useful for operating mode selection and frequency control. Connecting FSYNC to BIAS or to an external clock enables fixed-frequency FPWM operation. Connecting FSYNC to AGND enables skip mode operation. The external clock frequency at FSYNC can be higher or lower than the internal clock by 20%. Ensure the duty cycle of the external clock used has a minimum pulse width of 100ns. The devices synchronize to the external Maxim Integrated │  10 MAX16935/MAX16939 clock within one cycle. When the external clock signal at FSYNC is absent for more than two clock cycles, the devices revert back to the internal clock. System Enable (EN) An enable control input (EN) activates the device from its low-power shutdown mode. EN is compatible with inputs from automotive battery level down to 3.5V. The high voltage compatibility allows EN to be connected to SUP, KEY/KL30, or the inhibit pin (INH) of a CAN transceiver. 36V, 3.5A, 2.2MHz Step-Down Converters with 28µA Quiescent Current Internal Oscillator (FOSC) The switching frequency (fSW) is set by a resistor (RFOSC) connected from FOSC to AGND. See Figure 3 to select the correct RFOSC value for the desired switching frequency. For example, a 400kHz switching frequency is set with RFOSC = 73.2kI. Higher frequencies allow designs with lower inductor values and less output capacitance. Consequently, peak currents and I2R losses are lower at higher switching frequencies, but core losses, gate charge currents, and switching losses increase. EN turns on the internal regulator. Once VBIAS is above the internal lockout threshold, VUVL = 3.15V (typ), the controller activates and the output voltage ramps up within 8ms. Synchronizing Output (SYNCOUT) A logic-low at EN shuts down the device. During shutdown, the internal linear regulator and gate drivers turn off. Shutdown is the lowest power state and reduces the quiescent current to 5FA (typ). Drive EN high to bring the device out of shutdown. Overtemperature Protection Spread-Spectrum Option The devices have an internal spread-spectrum option to optimize EMI performance. This is factory set and the S-version of the device should be ordered. For spreadspectrum-enabled devices, the operating frequency is varied ±6% centered on the oscillator frequency (fOSC). The modulation signal is a triangular wave with a period of 110µs at 2.2MHz. Therefore, fOSC will ramp down 6% and back to 2.2MHz in 110µs and also ramp up 6% and back to 2.2MHz in 110µs. The cycle repeats. SYNCOUT is an open-drain output that outputs a 180N out-of-phase signal relative to the internal oscillator. Thermal-overload protection limits the total power dissipation in the device. When the junction temperature exceeds 175NC (typ), an internal thermal sensor shuts down the internal bias regulator and the step-down controller, allowing the device to cool. The thermal sensor turns on the device again after the junction temperature cools by 15NC. For operations at fOSC values other than 2.2MHz, the modulation signal scales proportionally (e.g., at 400kHz, the 110µs modulation period increases to 110µs x 2.2MHz/400kHz = 605µs). The internal spread spectrum is disabled if the device is synced to an external clock. However, the device does not filter the input clock and passes any modulation (including spread-spectrum) present on the driving external clock to the SYNCOUT pin. Automatic Slew-Rate Control on LX The devices have automatic slew-rate adjustment that optimizes the rise times on the internal HSFET gate drive to minimize EMI. The device detects the internal clock frequency and adjusts the slew rate accordingly. When the user selects the external frequency setting resistor RFOSC such that the frequency is > 1.1MHz, the HSFET is turned on in 4ns (typ). When the frequency is < 1.1MHz the HSFET is turned on in 8ns (typ). This slew-rate control optimizes the rise time on LX node externally to minimize EMI while maintaining good efficiency. VOUT MAX16935 MAX16939 RFB1 FB RFB2 Figure 2. Adjustable Output-Voltage Setting www.maximintegrated.com Maxim Integrated │  11 MAX16935/MAX16939 36V, 3.5A, 2.2MHz Step-Down Converters with 28µA Quiescent Current Applications Information Setting the Output Voltage Connect FB to BIAS for a fixed 5V output voltage. To set the output to other voltages between 1V and 10V, connect a resistive divider from output (OUT) to FB to AGND (Figure 2). Use the following formula to determine the RFB2 of the resistive divider network: RFB2 = RTOTAL x VFB/VOUT where VFB = 1V, RTOTAL = selected total resistance of RFB1, RFB2 in ω, and VOUT is the desired output in volts. Calculate RFB1 (OUT to FB resistor) with the following equation:  V   = R FB1 R FB2  OUT  − 1  VFB   where VFB = 1V (see the Electrical Characteristics table). FPWM/Skip Modes The devices offer a pin-selectable skip mode or fixedfrequency PWM mode option. They have an internal LS MOSFET that turns on when the FSYNC pin is connected to VBIAS or if there is a clock present on the FSYNC pin. This enables the fixed-frequency-forced PWM mode operation over the entire load range. This option allows the user to maintain fixed frequency over the entire load range in applications that require tight control on EMI. Even though the device has an internal LS MOSFET for fixedfrequency operation, an external Schottky diode is still required to support the entire load range. If the FSYNC pin is connected to GND, the skip mode is enabled on the device. In skip mode of operation, the converter’s switching frequency is load dependent. At higher load current, the switching frequency does not change and the operating mode is similar to the FPWM mode. Skip mode helps improve efficiency in light-load applications by allowing the converters to turn on the high-side switch only when the output voltage falls below a set threshold. As such, the converters do not switch MOSFETs on and off as often as is the case in the FPWM mode. Consequently, the gate charge and switching losses are much lower in skip mode. Inductor Selection Three key inductor parameters must be specified for operation with the devices: inductance value (L), inductor saturation current (ISAT), and DC resistance (RDCR). To select inductance value, the ratio of inductor peak-topeak AC current to DC average current (LIR) must be selected first. A good compromise between size and loss is a 30% peak-to-peak ripple current to average current ratio (LIR = 0.3). The switching frequency, input voltage, output voltage, and selected LIR then determine the inductor value as follows: V (V − VOUT ) L = OUT SUP VSUP fSW IOUT LIR where VSUP, VOUT, and IOUT are typical values (so that efficiency is optimum for typical conditions). The switching frequency is set by RFOSC (see Figure 3). Input Capacitor The input filter capacitor reduces peak currents drawn from the power source and reduces noise and voltage ripple on the input caused by the circuit’s switching. The input capacitor RMS current requirement (IRMS) is defined by the following equation: SWITCHING FREQUENCY vs. RFOSC 2.50 SWITCHING FREQUENCY (MHz) 2.25 IRMS = ILOAD(MAX) 2.00 1.75 VOUT (VSUP − VOUT ) VSUP IRMS has a maximum value when the input voltage equals twice the output voltage (VSUP = 2VOUT), so IRMS(MAX) = ILOAD(MAX) /2. 1.50 1.25 1.00 Choose an input capacitor that exhibits less than +10NC self-heating temperature rise at the RMS input current for optimal long-term reliability. 0.75 0.50 0.25 0 12 42 72 RFOSC (kΩ) Figure 3. Switching Frequency vs. RFOSC www.maximintegrated.com 102 132 The input voltage ripple is composed of DVQ (caused by the capacitor discharge) and DVESR (caused by the ESR of the capacitor). Use low-ESR ceramic capacitors with high ripple current capability at the input. Assume Maxim Integrated │  12 MAX16935/MAX16939 36V, 3.5A, 2.2MHz Step-Down Converters with 28µA Quiescent Current the contribution from the ESR and capacitor discharge equal to 50%. Calculate the input capacitance and ESR required for a specified input voltage ripple using the following equations: ESRIN = VOUT R1 ∆VESR IOUT + ∆IL 2 COMP gm R2 VREF where: RC CF CC − VOUT ) × VOUT (V ∆IL = SUP VSUP × fSW × L Figure 4. Compensation Network and: = CIN IOUT × D(1 − D) VOUT = and D ∆VQ × fSW VSUPSW where IOUT is the maximum output current and D is the duty cycle. Output Capacitor The output filter capacitor must have low enough ESR to meet output ripple and load transient requirements. The output capacitance must be high enough to absorb the inductor energy while transitioning from full-load to no-load conditions without tripping the overvoltage fault protection. When using high-capacitance, low-ESR capacitors, the filter capacitor’s ESR dominates the output voltage ripple. So the size of the output capacitor depends on the maximum ESR required to meet the output voltage ripple (VRIPPLE(P-P)) specifications: VRIPPLE (P −P ) = ESR × ILOAD (MAX ) × LIR The actual capacitance value required relates to the physical size needed to achieve low ESR, as well as to the chemistry of the capacitor technology. Thus, the capacitor is usually selected by ESR and voltage rating rather than by capacitance value. When using low-capacity filter capacitors, such as ceramic capacitors, size is usually determined by the capacity needed to prevent voltage droop and voltage rise from causing problems during load transients. Generally, once enough capacitance is added to meet the overshoot requirement, undershoot at the rising load edge is no longer a problem. However, low capacity filter capacitors typically have high ESR zeros that can affect the overall stability. Rectifier Selection The devices require an external Schottky diode rectifier as a freewheeling diode when they are configured for www.maximintegrated.com skip-mode operation. Connect this rectifier close to the device, using short leads and short PCB traces. In FPWM mode, the Schottky diode helps minimize efficiency losses by diverting the inductor current that would otherwise flow through the low-side MOSFET. Choose a rectifier with a voltage rating greater than the maximum expected input voltage, VSUPSW. Use a low forward-voltage-drop Schottky rectifier to limit the negative voltage at LX. Avoid higher than necessary reverse-voltage Schottky rectifiers that have higher forward-voltage drops. Compensation Network The devices use an internal transconductance error amplifier with its inverting input and its output available to the user for external frequency compensation. The output capacitor and compensation network determine the loop stability. The inductor and the output capacitor are chosen based on performance, size, and cost. Additionally, the compensation network optimizes the control-loop stability. The controller uses a current-mode control scheme that regulates the output voltage by forcing the required current through the external inductor. The device uses the voltage drop across the high-side MOSFET to sense inductor current. Current-mode control eliminates the double pole in the feedback loop caused by the inductor and output capacitor, resulting in a smaller phase shift and requiring less elaborate error-amplifier compensation than voltage-mode control. Only a simple single-series resistor (RC) and capacitor (CC) are required to have a stable, high-bandwidth loop in applications where ceramic capacitors are used for output filtering (Figure 4). For other types of capacitors, due to the higher capacitance and ESR, the frequency of the zero created by the capacitance and ESR is lower than the desired closed-loop crossover frequency. To stabilize a nonceramic output capacitor loop, add another compensation capacitor (CF) from COMP to GND to cancel this ESR zero. Maxim Integrated │  13 MAX16935/MAX16939 The basic regulator loop is modeled as a power modulator, output feedback divider, and an error amplifier. The power modulator has a DC gain set by gm  O RLOAD, with a pole and zero pair set by RLOAD, the output capacitor (COUT), and its ESR. The following equations allow to approximate the value for the gain of the power modulator (GAINMOD(dc)), neglecting the effect of the ramp stabilization. Ramp stabilization is necessary when the duty cycle is above 50% and is internally done for the device. GAINMOD ( dc = ) g m × R LOAD where RLOAD = VOUT /ILOUT(MAX) in I and gm = 3S. In a current-mode step-down converter, the output capacitor, its ESR, and the load resistance introduce a pole at the following frequency: fpMOD = 1 2 π × C OUT × R LOAD The output capacitor and its ESR also introduce a zero at: fzMOD = 1 2 π × ESR × C OUT When COUT is composed of “n” identical capacitors in parallel, the resulting COUT = n O COUT(EACH), and ESR = ESR(EACH)/n. Note that the capacitor zero for a parallel combination of alike capacitors is the same as for an individual capacitor. The feedback voltage-divider has a gain of GAINFB = VFB/ VOUT, where VFB is 1V (typ). The transconductance error amplifier has a DC gain of GAINEA(dc) = gm,EA O ROUT,EA, where gm,EA is the error amplifier transconductance, which is 700FS (typ), and ROUT,EA is the output resistance of the error amplifier 50MI. A dominant pole (fdpEA) is set by the compensation capacitor (CC) and the amplifier output resistance (ROUT,EA). A zero (fzEA) is set by the compensation resistor (RC) and the compensation capacitor (CC). There is an optional pole (fpEA) set by CF and RC to cancel the output capacitor ESR zero if it occurs near the crossover frequency (fC), where the loop gain equals 1 (0dB)). Thus: 36V, 3.5A, 2.2MHz Step-Down Converters with 28µA Quiescent Current 1 2 π × C C × (R OUT,EA + R C ) 1 fzEA = 2π × C C × R C fdpEA = fpEA = 1 2π × CF × R C The loop-gain crossover frequency (fC) should be set below 1/5th of the switching frequency and much higher than the power-modulator pole (fpMOD): f fpMOD