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AD6312

AD6312

  • 厂商:

    ETC

  • 封装:

  • 描述:

    AD6312 - 1/4- to 1/11 Duty VFD Controller/Driver - List of Unclassifed Manufacturers

  • 数据手册
  • 价格&库存
AD6312 数据手册
AD6312 1/4- to 1/11 Duty VFD Controller/Driver Features ˙4-pin serial interface ˙Key scanning (6× 4 matrices) ˙Programming display modes (11-segments & 11digits to 16-segments & 6-digits) ˙Programming dimming step ˙High-voltage output (VDD-35V max). ˙4 channels LED ports. ˙4-pin General-purpose input port ˙Built-in oscillator ˙No external resistor necessary for driver outputs General Description The AD6312 is a VFD (Vacuum Fluorescent Display) controller/driver that is driven on a 1/4- to 1/11 duty factor (include key scan). It consists of 5 segment output lines, 6 segment/key scan output lines, 6 grid output lines, 5 segment/grid output drive lines, a display memory, a control circuit, and a key scan circuit. Serial data is input to the AD6312 through a four-line serial interface. Pin Assignments Seg13 / Grid10 Seg12 / Grid11 Seg16 / Grid7 Seg15 / Grid8 Seg14 / Grid9 Seg11 Seg10 24 Grid5 Grid6 33 32 31 30 29 28 27 26 25 23 Seg9 VEE Grid4 Grid3 Grid2 Grid1 VDD LED4 LED3 LED2 LED1 VSS OSC 34 35 36 37 38 39 40 41 42 43 22 21 20 19 18 17 16 15 14 13 Seg8 Seg7 Seg6 / KS6 Seg5 / KS5 Seg4 / KS4 Seg3 / KS3 Seg2 / KS2 Seg1 / KS1 VDD Key4 Key3 10 Key1 Sw1 Sw2 Sw3 Sw4 VSS DIN DOUT Use all power pins. This datasheet contains new product information. Anachip Corp. reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sale of the product. Key2 CLK STB 11 44 1 2 3 4 5 6 7 8 9 12 Rev. A4 Dec 29, 2003 1/13 AD6312 1/4- to 1/11 Duty VFD Controller/Driver Pin Descriptions Symbol DIN DOUT Name Data input Data output No. 6 5 Description Input serial data at rising edge of shift clock, starting from the low order bit. Output serial data at the falling edge of the shift clock, starting from low order bit. This is N-ch open-drain output pin. Initializes serial interface at the rising or falling edge of the AD6312. It then waits for reception of a command. Data input after STB falling is processed as a command. While command data is processed, current processing is stopped, and the serial interface is initialized. While STB is high, CLK is ignored. Reads serial data at the rising edge, and outputs data at the falling edge. Connect resistor in between this pin and Vss to set up the oscillation frequency. Segment output pins Multi-function pins, Segment output pins (Dual function as key scan source) Grid output pins These pins are selectable for segment or grid driving. CMOS output Data input to these pins is latched at the end of the display cycle. Logic power supply Connect this pin to system GND. Driver power supply These pins constitute a 4-bit general-purpose input port. STB Strobe 9 CLK OSC Seg7 to Seg11 Seg1/KS1 to Seg6/KS6 Grid1 to Grid6 Seg12/Grid11 to Seg16/Grid7 LED1 to LED4 KEY1 to KEY4 VDD VSS VEE SW1 to SW4 Clock input Oscillator pin High-voltage output (Segment) High-voltage output High-voltage output (Grid) High-voltage output (Segment/grid) LED output Key data input Logic power Logic ground Pull-down level Switch input 8 44 21 to 25 15 to 20 32 to 37 26, 28 to 31 39to 42 10 to 13 14, 38 7, 43 27 1 to 4 Ordering Information AD6312 X X X Package Q: QFP-44L L: LQFP-44L Lead Blank: Normal F: Lead Free Packing Blank : Tray Anachip Corp. www.anachip.com.tw 2/13 Rev. A4 Dec 29, 2003 AD6312 1/4- to 1/11 Duty VFD Controller/Driver Block Diagram 6 Segment/ key scan Command decoder DIN DOUT CLK STB VDD Serial I/F Display memory 16 bits× 11 Words Dimming circuit Seg1/KS1 Seg6/KS6 Seg7 Seg11 Seg12/Grid11 16-bit output latch 16 11 Data selector 5 5 R OSC 5 Timing generator key scan Key data memory (4× 6) 11-bit shift register Segment/grid driver Grid driver Segment driver Seg16/Grid7 5 Grid1 11 6 KEY1 to KEy4 SW1 to SW4 4 4 4-bit latch 4-bit latch LED1 LED4 Grid6 Key data memory (4x6) VDD Vss VEE (+5V) (0V) (-30V) Anachip Corp. www.anachip.com.tw 3/13 Rev. A4 Dec 29, 2003 AD6312 1/4- to 1/11 Duty VFD Controller/Driver Absolute Maximum Ratings (TA=25oC,VSS=0V ) Parameter Logic Supply Voltage Driver Supply Voltage Logic Input Voltage VFD Driver Output Voltage LED Driver Output Current VFD Driver Output Current Operating Ambient Temperature Storage Temperature Symbol VDD VEE VI1 VO2 IO1 IO2 TOPT TSTG Rating -0.5 to +7.0 VDD +0.5 to VDD -40 -0.5 to VDD +0.5 VEE-0.5 to VDD +0.5 +15 -40 (grid) -15 (segment) -25 to +85 -50 to +125 Unit V V V V mA mA o o C C Operating Conditions (TA=0 to +70 oC,VSS=0V) Parameter Logic Supply Voltage High-Level Input Voltage Low-Level Input Voltage Driver Supply Voltage Symbol VDD VIH VIL VEE Conditions Min. 4.5 0.7·VDD 0 0 Typ. 5 Max. 5.5 VDD 0.3·VDD VDD-35 Unit V V V V DC Characteristics (TA=0 to 70 oC, VDD=4.5 to 5.5V, VSS=0V, VEE=VDD-35V) Parameter High-Level Output Voltage Low-Level Output Voltage Low-Level Output Voltage High-Level Output Current High-Level Output Current Driver Leakage Current Output Pull-Down Resistor High-Level Input Voltage Low-Level Input Voltage Symbol VOH1 VOL1 VOL2 IOH21 IOH22 IOLEAK RL VIH VIL Conditions LED1-LED4, IOH1=-1mA LED1-LED4, IOL1=12mA DOUT, IOL2=2mA VO=VDD-2V, Seg1 to Seg11 VO=VDD-2V, Grid 1 to Grid6 Seg12/Grid11 to Seg16/Grid7 VO=VDD-35V, driver off Driver output Min. 0.9VDD -3 -15 50 0.7VDD 100 -10 150 0.3VDD Typ. Max. 1 0.4 Unit V V V mA mA μA kΩ V V AC Characteristics (Ta=0 to +70 oC,VDD=4.5 to 5.5 V, VEE=-30V) Parameter Oscillation Frequency Maximum Clock Frequency Clock Pulse Width Strobe Pulse Width Data Setup Time Data Hold Time Clock-Strobe Time Wait Time Note : Refer to page 8. Anachip Corp. www.anachip.com.tw 4/13 Symbol fOSC fmax. PWCLK PWSTB tSETUP tHOLD tCLK-STB tWAIT Conditions R=51 kΩ Duty=50% Min. 350 500 1 100 100 1 1 Typ. 500 Max. 650 1 CLK↑→STB↑ CLK↑→CLK↓(Note) Unit KHZ MHZ ns µs ns ns µs µs Rev. A4 Dec 29, 2003 AD6312 1/4- to 1/11 Duty VFD Controller/Driver Function Descriptions 1.0 Commands Commands set the display mode and status of the VFD driver. The first 1 byte input to the AD6312 through the DIN pin after the STB pin has fallen is regarded as a command. If STB is set high while a commands/data are transmitted, serial communication is initialized, and the commands/data being transmitted are invalid (however, the commands/data previously transmitted remain valid). 1.1 Display mode setting commands These commands initialize the AD6312 and select the number of segments and the number of grids (4 grids & 16 segments to 11 grids & 11 segments to). When these commands are executed, the display is forcibly turned off, and key scanning is also stopped. To resume display, the display command “ON” must be executed. If the same mode is selected, however, nothing happens. MSB 0 0 b2 b1 b0 Display mode settings 000: 4 digits, 16 segments 001: 5 digits, 16 segments 010: 6 digits, 16 segments 011: 7 digits, 15 segments 100: 8 digits, 14 segments 101: 9 digits, 13 segments 110: 10 digits, 12 segments 111: 11 digits, 11 segments LSB Irrelevant On power application, the 11-digit, 11-segment mode is selected. 1.2 Data setting commands These commands set data write and data read modes. On power application, the normal operation and address increment modes are set. MSB 0 1 LSB b3 b2 b1 b0 Data write and read mode settings. 00: Write data to display memory. 01: Write data to LED port. 10: Read key data. 11: Read SW data. Address increment mode settings (display memory). 0: Incremenets address after data has been written. 1: Fixes address. Test mode settings 0: Normal operation 1: Test mode Irrelevant Anachip Corp. www.anachip.com.tw 5/13 Rev. A4 Dec 29, 2003 AD6312 1/4- to 1/11 Duty VFD Controller/Driver 1.3 Address setting commands These commands set an address of the display memory. If address 16H or higher is set, data is ignored, until a valid address is set. On power application, the address is set to 00H. MSB 1 1 LSB b4 b3 b2 b1 b0 Address (00H-15H) 1.4 Display control commands MSB 1 0 LSB b3 b2 b1 b0 Dimming quantity settings 000: Sets pulse width to 1/16. 001: Sets pulse width to 2/16. 010: Sets pulse width to 4/16. 011: Sets pulse width to 10/16. 100: Sets pulse width to 11/16. 101: Sets pulse width to 12/16. 110: Sets pulse width to 13/16. 111: Sets pulse width to 14/16. Irrelevant Tums on/off display. 0: Display off (key scan continues) 1: Display on On power application, the 1/16-pulse width is set, the display is turned off and key scanning is stopped. 2.0 Display RAM Address and Display Mode The display RAM stores the data transmitted from an external device to the AD6312 through the serial interface, and is assigned addresses as follows, in 8 bits unit: Seg1 Seg4 00 HL 02 HL 04 HL 06 HL 08 HL 0 AHL 0 CHL 0 EHL 10 HL 12 HL 14 HL b0 Seg8 00 HU 02 HU 04 HU 06 HU 08 HU 0 AHU 0 CHU 0 EHU 10 HU 12 HU 14 HU XXHU b7 Seg12 01 HL 03 HL 05 HL 07 HL 09 HL 0 BHL 0 DHL 0 FHL 11 HL 13 HL 15 HL Seg16 01 HU 03 HU 05 HU 07 HU 09 HU 0 BHU 0 DHU 0 FHU 11 HU 13 HU 15 HU DIG1 DIG2 DIG3 DIG4 DIG5 DIG6 DIG7 DIG8 DIG9 DIG10 DIG11 XX HL b3 b4 Lower 4 bits Higher 4 bits Anachip Corp. www.anachip.com.tw 6/13 Rev. A4 Dec 29, 2003 AD6312 1/4- to 1/11 Duty VFD Controller/Driver 3.0 LED Port Data is written to the LED port with the write command, starting from the least port’s least significant bit. When a bit of this port is 0, the corresponding LED lights; when the bit is 1, the LED turns off. The data of bits 5 through 8 are ignored. On power application, all LEDs are unlit. MSB LSB b3 b2 b1 b0 LED1 Don't care LED2 LED3 LED4 4.0 Key Matrix and Key-Input data Storage RAM The key matrix is made up of a 6× 4 matrix, as shown below. KEY1 KEY2 KEY3 KEY4 Seg1/KS1 Seg2/KS2 Seg3/KS3 Seg4/KS4 Seg5/KS5 The data of each key is stored as illustrated below, and is read with the read command, starting from the least significant bit. KEY1...KEY4 KEY1...KEY4 Seg1/KS1 Seg3/KS3 Seg5/KS5 b0--------b3 Seg2/KS2 Seg4/KS4 Seg6/KS6 b4--------b7 Reading sequence Anachip Corp. www.anachip.com.tw 7/13 Seg6/KS6 Rev. A4 Dec 29, 2003 AD6312 1/4- to 1/11 Duty VFD Controller/Driver 5.0 SW Data SW data is read with the read command, starting from the least significant bit. Bits 5 through 8 of the SW data are 0. MSB 0 0 0 0 LSB b3 b2 b1 b0 SW1 SW2 SW3 SW4 Timing Diagram (1) Serial Communication Format Reception (command/write data) If data continues STB DIN b0 b1 b2 b6 b7 CLK 1 2 3 7 8 Transmission (read data) STB DIN CLK DOUT A data read command is set. b0 1 b1 2 b2 3 b3 4 b4 5 b5 6 b6 7 b7 8 tWAIT (Note) 1 b0 2 b1 3 b2 4 b3 5 b4 6 b5 Data is read. Because the DOUT pin is an N-ch, open-drain output pin, be sure to connect an external pull-up resistor to this pin (1kΩ to 10 kΩ). Note : When data is read, a wait time tWAIT of 1 μs is necessary since the rising of the eighth clock that has set the command, until the falling of the first clock that has read the data. Anachip Corp. www.anachip.com.tw 8/13 Rev. A4 Dec 29, 2003 AD6312 1/4- to 1/11 Duty VFD Controller/Driver (2) Key Scanning and Display Timing On cycle of key scanning consists of one frame, and data in a 6× 4 matrix is stored in RAM. TDISP ≅ 500μs SEG Output DIG1 DIG2 DIG3 DIGn Key scan data 1 23456 DIG1 Grid1 Grid2 1/16 TDISP Grid3 Gridn 1 frame = TDISP× (n+1) Switching characteristic waveforms fosc OSC 50% PWSTB STB PWCLK CLK PWCLK tCLK-STB tSETUP DIN tHOLD tPZL DOUT tTHZ Sn/Gn 90% 10% tPLZ tTZH Anachip Corp. www.anachip.com.tw 9/13 Rev. A4 Dec 29, 2003 AD6312 1/4- to 1/11 Duty VFD Controller/Driver Applications Updating display memory by incrementing address STB CLK DIN Command 1 Command 2 Command 3 Data 1 Data n Command 4 Command 1: sets display mode Command 2: sets data(write data to display memory) Command 3: sets address Data 1 to n: transfers display data (22bytes max.) Command 4: controls display Updating specific display memory STB CLK DIN Command 1 Command 2 Data Command 2 Data Command 1: sets data Command 2: sets address Data: display data Anachip Corp. www.anachip.com.tw 10/13 Rev. A4 Dec 29, 2003 AD6312 1/4- to 1/11 Duty VFD Controller/Driver Package Information (1) Package Type: QFP-44L Dimension in millimeter (mm.) 13.2 ± 0.5 10.0 ± 0.5 2.7(MAX.) 33 23 34 22 10.0 13.2 ± 0.5 ± 0.5 44 12 1 11 0.15 TYP. 1.6 TYP. 0.3 TYP. 0.8 TYP. 0.88 TYP. Anachip Corp. www.anachip.com.tw 11/13 Rev. A4 Dec 29, 2003 AD6312 1/4- to 1/11 Duty VFD Controller/Driver (2) Package Type: LQFP-44L ( Top View ) PIN 1 INDENT E1 E e 12o(4X) C D1 D A A2 b R0.08 MIN. A1 y DETAIL A L L1 DETAIL A θ 0.25 GAGE PLANE Symbol A A1 A2 b C E E1 D D1 e L L1 θ y Dimensions In Millimeters Min. Nom. Max. 1.60 0.05 0.10 0.15 1.35 1.40 1.45 0.30 0.37 0.45 0.09 0.20 11.50 12.00 12.50 9.50 10.00 10.50 11.80 12.00 12.20 9.90 10.00 10.10 0.80 0.45 0.60 0.75 1.00 0˚ 3.5˚ 7˚ 0.00 0.08 Dimensions In Inches Min. Nom. Max. 0.063 0.002 0.004 0.006 0.053 0.055 0.057 0.012 0.015 0.018 0.004 0.008 0.453 0.472 0.492 0.374 0.394 0.413 0.465 0.472 0.480 0.390 0.394 0.398 0.031 0.018 0.024 0.030 0.039 0˚ 3.5˚ 7˚ 0.000 0.003 Anachip Corp. www.anachip.com.tw 12/13 Rev. A4 Dec 29, 2003 AD6312 1/4- to 1/11 Duty VFD Controller/Driver Marking Information Top view Part Number AC AD6312 X XX XX XXX Logo Blank: Normal F: Lead Free Package ID code: internal Nth week: 01~52 Year: "01" = 2001 "02" = 2002 QFP44/LQFP44 Anachip Corp. www.anachip.com.tw 13/13 Rev. A4 Dec 29, 2003
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