AD7312QF

AD7312 1/4 to 1/11 Duty VFD Controller/Driver & Standby Master/Slave Features ˙Serial interface (CLK, STB, DIN, DOUT) ˙Key scanning (6× 4 matrices) ˙Programming display modes (11-digit & 11-segment to 6-digit & 16-segment) ˙Programming dimming step ˙High-voltage output (VDD-35V max). ˙2 channels LED ports. ˙2-pin General-purpose input port ˙Built-in oscillator ˙No external resistor necessary for driver outputs (provides PMOS open-drain and pull-low resistor output) ˙Remote signal input port ˙Remote signal output port ˙3 STANDBY master output ports (controlled by remote STANDBY-KEY, STANDBY-KEY and STANDBY SCAN-KEY) ˙8 WAKE UP master output ports (controlled by 2 remote WAKE_UP-KEY, 3 WAKE_UP SCAN-KEY, remote STANDBY-KEY, STANDBY-KEY and STANDBY SCAN-KEY) ˙NEC 6121/6122 infrared protocol support (Preliminary) General Description The AD7312 is a VFD (Vacuum Fluorescent Display) controller/driver with STANDBY controller. It is driven on a 1/4 to 1/11 duty factor (include key scan). It consists of 5 segment output lines, 6 segment/key scan output lines, 6 grid output lines, 5 segment/grid output drive lines, 2 LED output ports, a display memory, a control circuit, and a key scan circuit. In addition, it includes 2 input ports, RMIN and SKEY, RMIN receives the signal form the STANDBY-KEY of remote sensor, SKEY can be controlled by an external switch. Both of them and STANBY SCAN-KEY can control the output level (High) of PSV port to realize the STANDBY function. To leave the standby mode, we can use the 2 remote WAKE_UP-KEY, 3 WAKE_UP SCAN-KEY, remote STANDBY-KEY, STANDBY-KEY and STANDBY SCAN-KEY to control the output level (Low) of PSV port to realize the Wake Up function. Serial data is input to the AD7312 through a four-line serial interface. This datasheet contains new product information. Anachip Corp. reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sale of the product. Rev. A2 Dec 29, 2003 1/12 AD7312 1/4 to 1/11 Duty VFD Controller/Driver & Standby Master/Slave Pin Assignments Seg13 / Grid10 Seg12 / Grid11 Seg16 / Grid7 Seg15 / Grid8 Seg14 / Grid9 (Preliminary) Seg11 Seg10 24 Grid5 Grid6 33 32 31 30 29 28 27 26 25 Grid 4 Grid 3 Grid 2 Grid 1 VDD LED 4 RMBUF PSV LED 1 VSS OSC 34 35 36 37 38 39 40 41 42 43 23 Seg9 VEE 22 21 20 19 18 17 16 15 14 13 Seg 8 Seg 7 Seg 6 / KS 6 Seg 5 / KS 5 Seg 4 / KS 4 Seg 3 / KS 3 Seg 2 / KS 2 Seg 1 / KS 1 VDD Key4 Key3 10 RMIN DOUT CLK Sw1 Sw4 VSS Key1 SKEY Use all power pins. Anachip Corp. www.anachip.com.tw 2/12 Key2 DIN STB 11 44 1 2 3 4 5 6 7 8 9 12 Rev. A2 Dec 29, 2003 AD7312 1/4 to 1/11 Duty VFD Controller/Driver & Standby Master/Slave Pin Descriptions Symbol DIN DOUT (Preliminary) Name Data input Data output No. 6 5 Description Input serial data at rising edge of shift clock, starting from the low order bit. Output serial data at the falling edge of the shift clock, starting from low order bit. This is N-ch open-drain output pin. Initializes serial interface at the rising or falling edge of the AD7312. It then waits for reception of a command. Data input after STB falling is processed as a command. While command data is processed, current processing is stopped, and the serial interface is initialized. While STB is high, CLK is ignored. Reads serial data at the rising edge, and outputs data at the falling edge. Connect resistor in between this pin and Vdd to set up the oscillation frequency. Segment output pins Multi-function pins, Segment output pins (Dual function as key scan source) Grid output pins These pins are selectable for segment or grid driving. CMOS output CMOS output CMOS output Data input to these pins is latched at the end of the display cycle. Logic power supply Connect this pin to system GND. Driver power supply These pins constitute a 2-bit general-purpose input port. Input pin Input pin STB Strobe 9 CLK OSC Seg7 to Seg11 Seg1/KS1 to Seg6/KS6 Grid1 to Grid6 Seg12/Grid11 to Seg16/Grid7 LED1 and LED4 RMBUF PSV KEY1 to KEY4 VDD VSS VEE SW1 and SW4 RMIN SKEY Clock input Oscillator pin High-voltage output (Segment) High-voltage output High-voltage output (Grid) High-voltage output (Segment/grid) LED output Remote Control Buffer Power Saving Output Key data input Logic power Logic ground Pull-down level Switch input Remote Control Input Standby Key Input 8 44 21 to 25 15 to 20 32 to 37 26, 28 to 31 39 and 42 40 41 10 to 13 14, 38 7, 43 27 1 and 4 2 3 Anachip Corp. www.anachip.com.tw 3/12 Rev. A2 Dec 29, 2003 AD7312 1/4 to 1/11 Duty VFD Controller/Driver & Standby Master/Slave Ordering Information AD7312 X X X (Preliminary) Package Q: QFP-44L L: LQFP-44L Lead Blank: Normal F: Lead Free Packing Blank : Tray Block Diagram DIN DOUT CLK STB VDD R 6 Segment/ key scan Segment driver 5 Segment/grid driver Grid driver Command decoder Serial I/F Display memory 16 bits× 11 Words Timing generator key scan Key data memory (4× 6) 2-bit latch Dimming circuit Seg1/KS1 Seg6/KS6 Seg7 Seg11 Seg12/Grid11 16-bit output latch 16 11 Data selector 5 5 OSC KEY1 to KEY4 SW1 SW4 CLK STB 2 4 2-bit latch 11-bit shift register Seg16/Grid7 5 Grid1 11 6 Remote Control decoder 2 REBUF PSV LED1,4 VDD VSS VEE (+5V) (0V) (-30V) Grid6 Anachip Corp. www.anachip.com.tw 4/12 Rev. A2 Dec 29, 2003 AD7312 1/4 to 1/11 Duty VFD Controller/Driver & Standby Master/Slave Absolute Maximum Ratings (TA=25oC,VSS=0V ) Parameter Logic Supply Voltage Driver Supply Voltage Logic Input Voltage VFD Driver Output Voltage LED Driver Output Current VFD Driver Output Current Operating Ambient Temperature Storage Temperature Symbol VDD VEE VI1 VO2 IO1 IO2 TOPT TSTG Rating -0.5 to +7.0 VDD +0.5 to VDD -40 -0.5 to VDD +0.5 VEE-0.5 to VDD +0.5 +15 -40 (grid) -15 (segment) -25 to +85 -50 to +125 Unit V V V V mA mA o o (Preliminary) C C Operating Conditions (TA=0 to +70 oC,VSS=0V) Parameter Logic Supply Voltage High-Level Input Voltage Low-Level Input Voltage Driver Supply Voltage Symbol VDD VIH VIL VEE Conditions Min. 4.5 0.7·VDD 0 0 Typ. 5 Max. 5.5 VDD 0.3·VDD VDD-35 Unit V V V V DC Characteristics (TA=0 to 70 oC, VDD=4.5 to 5.5V, VSS=0V, VEE=VDD-35V) Parameter High-Level Output Voltage Low-Level Output Voltage Low-Level Output Voltage High-Level Output Current High-Level Output Current Driver Leakage Current Output Pull-Down Resistor High-Level Input Voltage Low-Level Input Voltage Symbol VOH1 VOL1 VOL2 IOH21 IOH22 IOLEAK RL VIH VIL Conditions LED1/LED4, IOH1=-1mA LED1/LED4, IOL1=12mA DOUT, IOL2=2mA VO=VDD-2V, Seg1 to Seg11 VO=VDD-2V, Grid 1 to Grid6 Seg12/Grid11 to Seg16/Grid7 VO=VDD-35V, driver off Driver output Min. 0.9VDD -3 -15 50 0.7VDD 100 -10 150 0.3VDD Typ. Max. 1 0.4 Unit V V V mA mA μA kΩ V V AC Characteristics (Ta=0 to +70 oC,VDD=4.5 to 5.5 V, VEE=-30V) Parameter Oscillation Frequency Maximum Clock Frequency Clock Pulse Width Strobe Pulse Width Data Setup Time Data Hold Time Clock-Strobe Time Wait Time Propagation delay time Rise time Fall time Note : Refer to page 8. Anachip Corp. www.anachip.com.tw 5/12 Symbol fOSC fmax. PWCLK PWSTB tSETUP tHOLD tCLK-STB tWAIT tPHZ tPZL tTZH tTHZ Conditions R=51 kΩ Duty=50% Min. 350 500 1 100 100 1 1 Typ. 500 Max. 650 1 CLK↑→STB↑ CLK↑→CLK↓(Note) CLK→DOUT CL=15pF,RL=10 kΩ CL=300pF Segn,Gridn 300 100 2 160 Unit KHZ MHZ ns µs ns ns µs µs ns ns µs µs Rev. A2 Dec 29, 2003 AD7312 1/4 to 1/11 Duty VFD Controller/Driver & Standby Master/Slave Timing Diagram (1) Serial Communication Format Reception (command/write data) If data continues STB (Preliminary) DIN b0 b1 b2 b6 b7 CLK 1 2 3 7 8 Transmission (read data) STB DIN CLK DOUT A data read command is set. b0 1 b1 2 b2 3 b3 4 b4 5 b5 6 b6 7 b7 8 tWAIT (Note) 1 b0 2 b1 3 b2 4 b3 5 b4 6 b5 Data is read. Because the DOUT pin is an N-ch, open-drain output pin, be sure to connect an external pull-up resistor to this pin (1kΩ to 10 kΩ). Note : When data is read, a wait time tWAIT of 1 μs is necessary since the rising of the eighth clock that has set the command, until the falling of the first clock that has read the data. Anachip Corp. www.anachip.com.tw 6/12 Rev. A2 Dec 29, 2003 AD7312 1/4 to 1/11 Duty VFD Controller/Driver & Standby Master/Slave (Preliminary) (2) Key Scanning and Display Timing On cycle of key scanning consists of one frame, and data in a 6× 4 matrix is stored in RAM. TDISP ≅ 500μs SEG Output DIG1 DIG2 DIG3 DIGn Key scan data 1 23456 DIG1 Grid1 Grid2 1/16 TDISP Grid3 Gridn 1 frame = TDISP× (n+1) Switching characteristic waveforms fosc OSC 50% PWSTB STB PWCLK CLK PWCLK tCLK-STB tSETUP DIN tHOLD tPZL DOUT tTHZ Sn/Gn 90% 10% tPLZ tTZH Anachip Corp. www.anachip.com.tw 7/12 Rev. A2 Dec 29, 2003 AD7312 1/4 to 1/11 Duty VFD Controller/Driver & Standby Master/Slave Applications Updating display memory by incrementing address STB (Preliminary) CLK DIN Command 1 Command 2 Command 3 Data 1 Data n Command 4 Command 1: sets display mode Command 2: sets data(write data to display memory) Command 3: sets address Data 1 to n: transfers display data (22bytes max.) Command 4: controls display Updating specific display memory and write registers STB CLK DIN Command 1 Command 2 Data Command 2 Data Command 1: sets data Command 2: sets address Data: display data Anachip Corp. www.anachip.com.tw 8/12 Rev. A2 Dec 29, 2003 AD7312 1/4 to 1/11 Duty VFD Controller/Driver & Standby Master/Slave Reading specific registers (Preliminary) STB CLK DIN Command 1 Command 2 Data1 Command2 Address2 Data2 Commandn Addressn Anachip Corp. www.anachip.com.tw 9/12 Rev. A2 Dec 29, 2003 AD7312 1/4 to 1/11 Duty VFD Controller/Driver & Standby Master/Slave Package Information (1) Package Type: QFP-44L Dimension in millimeter (mm.) 13.2 ± 0.5 10.0 ± 0.5 2.7(MAX.) (Preliminary) 33 23 34 22 10.0 13.2 ± 0.5 ± 0.5 44 12 1 11 0.15 TYP. 1.6 TYP. 0.3 TYP. 0.8 TYP. 0.88 TYP. Anachip Corp. www.anachip.com.tw 10/12 Rev. A2 Dec 29, 2003 AD7312 1/4 to 1/11 Duty VFD Controller/Driver & Standby Master/Slave (2) Package Type: LQFP-44L ( Top View ) (Preliminary) PIN 1 INDENT E1 E e 12o(4X) C D1 D A A2 b R0.08 MIN. A1 y DETAIL A L L1 DETAIL A θ 0.25 GAGE PLANE Symbol A A1 A2 b C E E1 D D1 e L L1 θ y Dimensions In Millimeters Min. Nom. Max. 1.60 0.05 0.10 0.15 1.35 1.40 1.45 0.30 0.37 0.45 0.09 0.20 11.50 12.00 12.50 9.50 10.00 10.50 11.80 12.00 12.20 9.90 10.00 10.10 0.80 0.45 0.60 0.75 1.00 0˚ 3.5˚ 7˚ 0.00 0.08 Dimensions In Inches Min. Nom. Max. 0.063 0.002 0.004 0.006 0.053 0.055 0.057 0.012 0.015 0.018 0.004 0.008 0.453 0.472 0.492 0.374 0.394 0.413 0.465 0.472 0.480 0.390 0.394 0.398 0.031 0.018 0.024 0.030 0.039 0˚ 3.5˚ 7˚ 0.000 0.003 Anachip Corp. www.anachip.com.tw 11/12 Rev. A2 Dec 29, 2003 AD7312 1/4 to 1/11 Duty VFD Controller/Driver & Standby Master/Slave Marking Information (Preliminary) Top view Part Number AC AD7312 X XX XX XXX Logo Blank: Normal F: Lead Free Package ID code: internal Nth week: 01~52 Year: "01" = 2001 "02" = 2002 QFP44/LQFP44 Anachip Corp. www.anachip.com.tw 12/12 Rev. A2 Dec 29, 2003