PROFET™+ 24V
BTT6010-1ERA
Smart High-Side Power Switch Single Channel, 10 mΩ
1
Package
PG-TDSO-14
Marking
6010-1ERA
Overview
Application
•
Suitable for resistive, inductive and capacitive loads
•
Replaces electromechanical relays, fuses and discrete circuits
•
Most suitable for loads with high inrush current, such as lamps
•
Suitable for 12 V and 24 V truck and transportation system
VBAT
Voltage Regulator
OUT
T1
VS
GND
CVDD
CVS
DZ
ROL
VS
VDD
GPIO
RDEN
DEN
RIN
IN
Microcontroller
OUT
GPIO
COUT
RPD
ADC IN
Bulb
IS
RSENSE
GND
GND
CSENSE
RIS
RGND
D
Application_example_Single.emf
Application Diagram with BTT6010-1ERA
Datasheet
www.infineon.com
1
Rev. 1.00
2019-03-09
PROFET™+ 24V
BTT6010-1ERA
Overview
Basic Features
•
One channel device
•
Very low stand-by current
•
3.3 V and 5 V compatible logic inputs
•
Electrostatic discharge protection (ESD)
•
Optimized electromagnetic compatibility
•
Logic ground independent from load ground
•
Very low power DMOS leakage current in OFF state
•
Green product (RoHS compliant) & AEC qualified
Description
The BTT6010-1ERA is a 10 mΩ single channel Smart High-Side Power Switch, embedded in a PG-TDSO-14,
Exposed Pad package, providing protective functions and diagnosis. The power transistor is built by an
N-channel vertical power MOSFET with charge pump. The device is integrated in Smart6 technology. It is
specially designed to drive lamps up to 7 x P21W 24V or 2 x 75W 24V, as well as LEDs in the harsh automotive
environment.
Table 1
Product Summary
Parameter
Symbol
Value
Operating voltage range
VS(OP)
5 V ... 36 V
Maximum supply voltage
VS(LD)
66 V
Maximum ON state resistance at TJ = 150°C
RDS(ON)
22 mΩ
Nominal load current
IL(NOM)
9A
Typical current sense ratio
kILIS
3900
Minimum current limitation
IL5(SC)
90 A
Maximum standby current with load at TJ = 25°C
IS(OFF)
1.4 µA
Diagnostic Functions
•
Proportional load current sense
•
Open load in ON and OFF
•
Short circuit to battery and ground
•
Overtemperature
•
Stable diagnostic signal during short circuit
•
Enhanced kILIS dependency with temperature and load current
Protection Functions
•
Stable behavior during undervoltage
•
Reverse polarity protection with external components
•
Secure load turn-off during logic ground disconnect with external components
•
Overtemperature protection with latch
•
Overvoltage protection with external components
•
Voltage dependent current limitation
•
Enhanced short circuit operation
Datasheet
2
Rev. 1.00
2019-03-09
PROFET™+ 24V
BTT6010-1ERA
Block Diagram
2
Block Diagram
VS
voltage sen sor
int ern al
power
supply
driver
logic
IN
DEN
IS
over
temper atu re
gat e cont rol
&
charge p ump
ESD
prot ec tion
Datasheet
over cur rent
switch limit
load cu rrent sense and
open load detection
OUT
forwar d voltage drop detection
GND
Figure 1
T
clamp for
ind uctiv e load
Block diagram.emf
Block Diagram for the BTT6010-1ERA
3
Rev. 1.00
2019-03-09
PROFET™+ 24V
BTT6010-1ERA
Pin Configuration
3
Pin Configuration
3.1
Pin Assignment
NC
1
14
NC
NC
2
13
NC
GND
3
12
OUT
IN
4
11
OUT
DEN
5
10
OUT
IS
6
9
NC
NC
7
8
NC
Pinout single SO14.vsd
Figure 2
Pin Configuration
3.2
Pin Definitions and Functions
Table 2
Pin Definitions and Functions
Pin
Symbol
Function
Cooling Tab
VS
Voltage Supply; Battery voltage
1, 2, 7, 8, 9, 13, 14 NC
Not Connected; No internal connection to the chip
3
GND
GrouND; Ground connection
4
IN
INput channel; Input signal for channel activation
5
DEN
Diagnostic ENable; Digital signal to enable/disable the diagnosis of the
device
6
IS
Sense; Sense current of the selected channel
10, 11, 12
OUT
OUTput; Protected high side power output channel1)
1) All output pins must be connected together on the PCB. All pins of the output are internally connected together. PCB
traces have to be designed to withstand the maximum current which can flow.
Datasheet
4
Rev. 1.00
2019-03-09
PROFET™+ 24V
BTT6010-1ERA
Pin Configuration
3.3
Voltage and Current Definition
Figure 3 shows all terms used in this data sheet, with associated convention for positive values.
IVS
VS
IIN
IN
VIN
IDEN
VS
VDS
DEN
VDEN
IIS
IS
VIS
IOUT
OUT
GND
VOUT
IGND
voltage and current convention single.vsd
Figure 3
Datasheet
Voltage and Current Definition
5
Rev. 1.00
2019-03-09
PROFET™+ 24V
BTT6010-1ERA
General Product Characteristics
4
General Product Characteristics
4.1
Absolute Maximum Ratings
Table 3
Absolute Maximum Ratings1)
TJ = -40°C to +150°C; (unless otherwise specified)
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit
Note or
Test Condition
Number
Supply Voltages
Supply voltage
VS
-0.3
–
48
V
–
P_4.1.1
Reverse polarity voltage
-VS(REV)
0
–
28
V
t < 2 min
TA = 25°C
RL ≥ 4 Ω
P_4.1.2
Supply voltage for short
circuit protection
VBAT(SC)
0
–
36
V
2)
P_4.1.3
RECU = 20 mΩ
RCable= 16 mΩ/m
LCable= 1 µH/m,
l = 0 or 5 m
See Chapter 6
and Figure 29
Supply voltage for Load
dump protection
VS(LD)
–
–
66
V
3)
RI = 2 Ω
RL = 4 Ω
P_4.1.12
–
100
k cycles
2)
P_4.1.4
Short Circuit Capability
Permanent short circuit
IN pin toggles
nRSC1
Vsupply = 28 V
Input Pins
Voltage at INPUT pin
VIN
-0.3
–
–
6
7
V
–
t < 2 min
P_4.1.13
Current through INPUT pin
IIN
-2
–
2
mA
–
P_4.1.14
Voltage at DEN pin
VDEN
-0.3
–
–
6
7
V
–
t < 2 min
P_4.1.15
Current through DEN pin
IDEN
-2
–
2
mA
–
P_4.1.16
Voltage at IS pin
VIS
-0.3
–
VS
V
–
P_4.1.19
Current through IS pin
IIS
-25
–
50
mA
–
P_4.1.20
Load current
| IL |
–
–
IL(LIM)
A
–
P_4.1.21
Power dissipation (DC)
PTOT
–
–
1.6
W
TA = 85°C
TJ < 150°C
P_4.1.22
Maximum energy
dissipation Single pulse
EAS
–
–
219
mJ
IL(0) = 9 A
TJ(0) = 150°C
VS = 28 V
P_4.1.23
Sense Pin
Power Stage
Datasheet
6
Rev. 1.00
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PROFET™+ 24V
BTT6010-1ERA
General Product Characteristics
Table 3
Absolute Maximum Ratings1)
TJ = -40°C to +150°C; (unless otherwise specified)
Parameter
Voltage at power transistor
Symbol
VDS
Values
Unit
Note or
Test Condition
Number
Min.
Typ.
Max.
–
–
66
V
–
P_4.1.26
-20
-200
–
20
20
mA
–
t < 2 min
P_4.1.27
Currents
Current through ground pin I GND
Temperatures
Junction temperature
TJ
-40
–
150
°C
–
P_4.1.28
Storage temperature
TSTG
-55
–
150
°C
–
P_4.1.30
VESD
-2
–
2
kV
4)
HBM
P_4.1.31
HBM
P_4.1.32
ESD Susceptibility
ESD susceptibility (all pins)
ESD susceptibility OUT Pin
vs. GND and VS connected
VESD
-4
–
4
kV
4)
ESD susceptibility
VESD
-500
–
500
V
5)
CDM
P_4.1.33
V
5)
CDM
P_4.1.34
ESD susceptibility pin
(corner pins)
VESD
-750
–
750
1) Not subject to production test. Specified by design
2) Threshold limit for short circuit failures : 100 ppm. Please refer to the legal disclaimer for short circuit capability on
the Back Cover of this document
3) VS(LD) is setup without the DUT connected to the generator per ISO 7637-1
4) ESD susceptibility, Human Body Model “HBM” according to AEC Q100-002
5) ESD susceptibility, Charged Device Model “CDM” according to AEC Q100-011
Notes
1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
Datasheet
7
Rev. 1.00
2019-03-09
PROFET™+ 24V
BTT6010-1ERA
General Product Characteristics
4.2
Functional Range
Table 4
Functional Range TJ = -40°C to +150°C; (unless otherwise specified)
Parameter
Nominal operating voltage
Symbol
VNOM
Values
Unit
Min.
Typ.
Max.
8
28
36
Note or
Test Condition
Number
V
–
P_4.2.1
2)
Extended operating voltage
VS(OP)
5
–
48
V
VIN = 4.5 V
RL = 4 Ω
VDS < 0.5 V
P_4.2.2
Minimum functional supply
voltage
VS(OP)_MIN
3.8
4.3
5
V
1)
VIN = 4.5 V
RL = 4 Ω
From IOUT = 0 A
to
VDS < 0.5 V;
See Figure 15
P_4.2.3
Undervoltage shutdown
VS(UV)
3
3.5
4.1
V
1)
VIN = 4.5 V
VDEN = 0 V
RL = 4 Ω
From VDS < 1 V;
to IOUT = 0 A
See Figure 15
See Chapter 9
P_4.2.4
Undervoltage shutdown
hysteresis
VS(UV)_HYS
–
850
–
mV
2)
P_4.2.13
Operating current channel
active
IGND_1
–
4.8
9
mA
VIN = 5.5 V
VDEN = 5.5 V
Device in RDS(ON)
VS = 36 V
See Chapter 9
P_4.2.5
Standby current for whole
device with load (ambient)
IS(OFF)
–
0.1
0.5
µA
1)
VS = 36 V
VOUT = 0 V
VIN floating
VDEN floating
TJ ≤ 85°C
See Chapter 9
P_4.2.7
Maximum standby current for
whole device with load
IS(OFF)_150
–
8
15
µA
VS = 36 V
VOUT = 0 V
VIN floating
VDEN floating
TJ = 150°C
See Chapter 9
P_4.2.10
Standby current for whole
device with load, diagnostic
active
IS(OFF_DEN)
–
0.6
–
mA
2)
P_4.2.8
Datasheet
8
–
VS = 36 V
VOUT = 0 V
VIN floating
VDEN = 5.5 V
Rev. 1.00
2019-03-09
PROFET™+ 24V
BTT6010-1ERA
General Product Characteristics
1) Test at TJ = -40°C only
2) Not subject to production test. Specified by design.
Note:
Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics
table.
4.3
Thermal Resistance
Table 5
Thermal Resistance
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit
Note or
Test Condition
Number
Junction to case
RthJC
–
1
–
K/W
1)
P_4.3.1
Junction to ambient
RthJA
–
25
–
K/W
1) 2)
P_4.3.2
1) Not subject to production test. Specified by design.
2) Specified RthJA value is according to JEDEC JESD51-2,-5,-7 at natural convection on FR4 2s2p board with 1 W total
power dissipation at TA = 105°C; The product (chip + package) was simulated on a 76.4 x 114.3 x 1.5 mm board with 2
inner copper layers (2 x 70 µm Cu, 2 x 35 µm Cu). Where applicable, a thermal via array under the exposed pad
contacts the first inner copper layer. Please refer to Figure 4.
4.3.1
PCB Set-Up
70µm
1.5mm
35µm
0.3mm
Figure 4
PCB 2 s2p .vsd
2s2p PCB Cross Section
PCB bottom view
PCB top view
1
14
2
13
3
4
12
COOLING
TAB
11
VS
5
10
6
9
7
8
thermique SO14.vsd
Figure 5
Datasheet
PC Board Top and Bottom View for Thermal Simulation with 600 mm2 Cooling Area
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BTT6010-1ERA
General Product Characteristics
4.3.2
Thermal Impedance
BTT6010-1ERx
100
ZthJA (K/W)
TAMBIENT = 105°C
10
1
2s2p
1s0p - 600 mm²
1s0p - 300 mm²
1s0p - footprint
0,1
1,00E-04
Figure 6
1,00E-03
1,00E-02
1,00E-01
1,00E+00
Time (s)
1,00E+01
1,00E+02
1,00E+03
Typical Thermal Impedance. 2s2p PCB set-up according Figure 4
BTT6010-1ERx
100
1s0p - Tambient = 105°C
90
RthJA (K/W)
80
70
60
50
40
30
0
Figure 7
Datasheet
100
200
300
Cooling area (mm²)
400
500
600
Typical Thermal Resistance. PCB set-up 1s0p
10
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BTT6010-1ERA
Power Stage
5
Power Stage
The power stage is built using an N-channel vertical power MOSFET (DMOS) with charge pump.
5.1
Output ON-State Resistance
The ON-state resistance RDS(ON) depends on the supply voltage as well as the junction temperature TJ. Figure 8
shows the dependencies in terms of temperature and supply voltage for the typical ON-state resistance. The
behavior in reverse polarity is described in Chapter 6.4.
20
17
18
16
15
16
RDS(ON) [mΩ ]
RDS(ON) [mΩ ]
14
14
12
13
12
11
10
10
9
8
8
7
6
-40
Figure 8
-20
0
20
40
60
80
100
Junction Temperature TJ [°C]
120
140
160
0
5
10
15
20
Supply Voltage V S [V]
25
30
35
Typical ON-State Resistance
A high signal (see Chapter 8) at the input pin causes the power DMOS to switch ON with a dedicated slope,
which is optimized in terms of EMC emission.
5.2
Turn ON/OFF Characteristics with Resistive Load
Figure 9 shows the typical timing when switching a resistive load.
IN
V IN_H
VIN_L
t
VOUT
90% VS
dV/dt
dV/dt
ON
OFF
tON
tOFF_DELAY
70% VS
30% VS
tON_DELAY
tOFF
10% VS
t
Switching times .vsd
Figure 9
Datasheet
Switching a Resistive Load Timing
11
Rev. 1.00
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PROFET™+ 24V
BTT6010-1ERA
Power Stage
5.3
Inductive Load
5.3.1
Output Clamping
When switching OFF inductive loads with high-side switches, the voltage VOUT drops below ground potential,
because the inductance intends to continue driving the current. To prevent the destruction of the device by
avalanche due to high voltages, there is a voltage clamp mechanism ZDS(AZ) implemented that limits negative
output voltage to a certain level (VS - VDS(AZ)). Please refer to Figure 10 and Figure 11 for details. Nevertheless,
the maximum allowed load inductance is limited.
VS
ZDS(AZ)
IN
VDS
LOGIC
IL
VBAT
GND
VIN
OUT
VOUT
L, RL
ZGND
Output_clamp.vsd
Figure 10
Output Clamp
IN
t
VOUT
VS
t
V S-VDS(AZ)
IL
t
Switching an inductance.vsd
Figure 11
Datasheet
Switching an Inductive Load Timing
12
Rev. 1.00
2019-03-09
PROFET™+ 24V
BTT6010-1ERA
Power Stage
5.3.2
Maximum Load Inductance
During demagnetization of inductive loads, energy has to be dissipated in the BTT6010-1ERA. This energy can
be calculated with following equation:
RL ⋅ IL
L V S – V DS ( AZ-)
E = V DS ( AZ ) ⋅ ------ ⋅ -----------------------------⋅ ln ⎛ 1 – -------------------------------⎞ + I L
⎝
V S – V DS ( AZ )⎠
RL
RL
(5.1)
Following equation simplifies under the assumption of RL = 0 Ω.
VS
2
1
-⎞
E = --- ⋅ L ⋅ I ⋅ ⎛⎝ 1 – -----------------------------2
V S – V DS ( AZ )⎠
(5.2)
The energy, which is converted into heat, is limited by the thermal design of the component. See Figure 12 for
the maximum allowed energy dissipation as a function of the load current.
EAS (mJ)
1000
100
10
0.5
1.5
2.5
3.5
4.5
5.5
6.5
7.5
8.5
9.5
IL(A)
Figure 12
Datasheet
Maximum Energy Dissipation Single Pulse, TJ_START = 150°C; VS= 28 V
13
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BTT6010-1ERA
Power Stage
5.4
Inverse Current Capability
In case of inverse current, meaning a voltage VINV at the OUTput higher than the supply voltage VS, a current
IINV will flow from output to VS pin via the body diode of the power transistor (please refer to Figure 13). The
output stage follows the state of the IN pin, except if the IN pin goes from OFF to ON during inverse. In that
particular case, the output stage is kept OFF until the inverse current disappears. Nevertheless, the current IINV
should not be higher than IL(INV). If the channel is OFF, the diagnostic will detect an open load at OFF. If the
affected channel is ON, the diagnostic will detect open load at ON (the overtemperature signal is inhibited). At
the appearance of VINV, a parasitic diagnostic can be observed. After, the diagnosis is valid and reflects the
output state. At VINV vanishing, the diagnosis is valid and reflects the output state. During inverse current, no
protection functions are available.
VBAT
VS
Gate
driver
Device
logic
INV
Comp.
IL(INV)
VINV
OUT
GND
ZGND
inverse current.vsd
Figure 13
Datasheet
Inverse Current Circuitry
14
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PROFET™+ 24V
BTT6010-1ERA
Power Stage
5.5
Electrical Characteristics Power Stage
Table 6
Electrical Characteristics: Power Stage
VS = 8 V to 36 V, TJ = -40°C to +150°C (unless otherwise specified).
Typical values are given at VS = 28 V, TJ = 25°C
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit
Note or
Number
Test Condition
ON-state resistance per channel
RDS(ON)_150
15
20
22
mΩ
IL = IL4 = 10 A
VIN = 4.5 V
TJ = 150°C
See Figure 8
P_5.5.1
ON-state resistance per channel
RDS(ON)_25
–
10
–
mΩ
1)
P_5.5.21
Nominal load current
IL(NOM)
–
9
–
A
1)
TA = 85°C
TJ < 150°C
P_5.5.2
Output voltage drop limitation at VDS(NL)
small load currents
–
10
22
mV
IL = IL0 = 50 mA
See Chapter 9
P_5.5.4
Drain to source clamping voltage VDS(AZ)
VDS(AZ) = [VS - VOUT]
66
70
75
V
IDS = 20 mA
See Figure 11
See Chapter 9
P_5.5.5
Output leakage current
TJ ≤ 85°C
IL(OFF)
–
0.05
0.5
µA
2)
VIN floating
VOUT = 0 V
TJ ≤ 85°C
P_5.5.6
Output leakage current
TJ = 150°C
IL(OFF)_150
–
8
15
µA
VIN floating
VOUT = 0 V
TJ = 150°C
P_5.5.8
Slew rate
30% to 70% VS
dV/dtON
0.3
0.65
1.4
V/µs
P_5.5.11
Slew rate
70% to 30% VS
-dV/dtOFF
0.3
0.65
1.4
V/µs
RL = 4 Ω
VS = 28 V
See Figure 9
See Chapter 9
Slew rate matching
dV/dtON - dV/dtOFF
∆dV/dt
-0.15
0
0.15
V/µs
P_5.5.13
Turn-ON time to
VOUT = 90% VS
tON
20
70
150
µs
P_5.5.14
Turn-OFF time to
VOUT = 10% VS
tOFF
20
70
150
µs
P_5.5.15
Turn-ON / OFF matching
tOFF - tON
∆tSW
-50
0
50
µs
P_5.5.16
Turn-ON time to
VOUT = 10% VS
tON_delay
–
35
70
µs
P_5.5.17
Turn-OFF time to
VOUT = 90% VS
tOFF_delay
–
35
70
µs
P_5.5.18
Datasheet
15
TJ = 25°C
P_5.5.12
Rev. 1.00
2019-03-09
PROFET™+ 24V
BTT6010-1ERA
Power Stage
Table 6
Electrical Characteristics: Power Stage (cont’d)
VS = 8 V to 36 V, TJ = -40°C to +150°C (unless otherwise specified).
Typical values are given at VS = 28 V, TJ = 25°C
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit
Note or
Number
Test Condition
Switch ON energy
EON
–
2.1
–
mJ
1)
RL = 4 Ω
VOUT = 90% VS
VS = 36 V
See Chapter 9
P_5.5.19
Switch OFF energy
EOFF
–
2.3
–
mJ
1)
P_5.5.20
RL = 4 Ω
VOUT = 10% VS
VS = 36 V
See Chapter 9
1) Not subject to production test, specified by design.
2) Test at TJ = -40°C only
Datasheet
16
Rev. 1.00
2019-03-09
PROFET™+ 24V
BTT6010-1ERA
Protection Functions
6
Protection Functions
The device provides integrated protection functions. These functions are designed to prevent the destruction
of the IC from fault conditions described in the data sheet. Fault conditions are considered as “outside”
normal operating range. Protection functions are designed for neither continuous nor repetitive operation.
6.1
Loss of Ground Protection
In case of loss of the module ground and the load remains connected to ground, the device protects itself by
automatically turning OFF (when it was previously ON) or remains OFF, regardless of the voltage applied on IN
pin.
In case of loss of device ground, it’s recommended to use input resistors between the microcontroller and the
BTT6010-1ERA to ensure switching OFF of the channel.
In case of loss of module or device ground, a current (IOUT(GND)) can flow out of the DMOS. Figure 14 sketches
the situation.
VS
ZIS(AZ)
ZD(AZ)
IS
RSENSE
VBAT
ZDS(AZ)
DEN
RDEN
IN
RIN
IOUT(GND)
LOGIC
OUT
L, RL
ZDESD
GND
RIS
ZGND
Loss of ground protection single.vsd
Figure 14
Loss of Ground Protection with External Components
6.2
Undervoltage Protection
Between VS(UV) and VS(OP), the undervoltage mechanism is triggered. VS(OP) represents the minimum voltage
where the switching ON and OFF can takes place. VS(UV) represents the minimum voltage the switch can hold
ON. If the supply voltage is below the undervoltage mechanism VS(UV), the device is OFF (turns OFF). As soon as
the supply voltage is above the undervoltage mechanism VS(OP), then the device can be switched ON. When the
switch is ON, protection functions are operational. Nevertheless, the diagnosis is not guaranteed until VS is in
the VNOM range. Figure 15 sketches the undervoltage mechanism.
Datasheet
17
Rev. 1.00
2019-03-09
PROFET™+ 24V
BTT6010-1ERA
Protection Functions
VOUT
VS(UV)
VS
VS(OP)
Un d e rvo ltag e b eh a vio.e
r mf
Figure 15
Undervoltage Behavior
6.3
Overvoltage Protection
There is an integrated clamp mechanism for overvoltage protection (ZD(AZ)). To guarantee this mechanism
operates properly in the application, the current in the Zener diode has to be limited by a ground resistor.
Figure 16 shows a typical application to withstand overvoltage issues. In case of supply voltage higher than
VS(AZ), the power transistor switches ON and in addition the voltage across the logic section is clamped. As a
result, the internal ground potential rises to VS - VS(AZ). Due to the ESD Zener diodes, the potential at pin IN and
DEN rises almost to that potential, depending on the impedance of the connected circuitry. In the case the
device was ON, prior to overvoltage, the BTT6010-1ERA remains ON. In the case the BTT6010-1ERA was OFF,
prior to overvoltage, the power transistor can be activated. In the case the supply voltage is in above VBAT(SC)
and below VDS(AZ), the output transistor is still operational and follows the input. If the channel is in the ON
state, parameters are no longer guaranteed and lifetime is reduced compared to the nominal supply voltage
range. This especially impacts the short circuit robustness, as well as the maximum energy EAS capability.
ISOV
ZIS(AZ)
VS
IN1
ZD(AZ)
IS
RSENSE
VBAT
ZDS(AZ)
DEN
RDEN
IN
RIN
LOGIC
IN0
OUT
ZDESD
GND
RIS
ZGND
L, RL
Overvoltage protection single.vsd
Figure 16
Datasheet
Overvoltage Protection with External Components
18
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Protection Functions
6.4
Reverse Polarity Protection
In case of reverse polarity, the intrinsic body diode of the power DMOS causes power dissipation. The current
in this intrinsic body diode is limited by the load itself. Additionally, the current into the ground path and the
logic pins has to be limited to the maximum current described in Chapter 4.1 with an external resistor.
Figure 17 shows a typical application. RGND resistor is used to limit the current in the Zener protection of the
device. Resistors RDEN and RIN are used to limit the current in the logic of the device and in the ESD protection
stage. RSENSE is used to limit the current in the sense transistor which behaves as a diode. The recommended
value for RDEN = RIN = RSENSE = 10 kΩ.
During reverse polarity, no protection functions are available.
VS
ZIS(AZ)
Microcontroller
protection diodes
ZD(AZ)
IS
RSENSE
DEN
IN
RDEN
RIN
ZDS(AZ)
VDS(REV)
LOGIC
-VS(REV)
IN0
OUT
ZDESD
RIS
GND
L, RL
ZGND
Reverse Polarity single.vsd
Figure 17
Datasheet
Reverse Polarity Protection with External Components
19
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Protection Functions
6.5
Overload Protection
In case of overload, such as high inrush of cold lamp filament, or short circuit to ground, the BTT6010-1ERA
offers several protection mechanisms.
6.5.1
Current Limitation
At first step, the instantaneous power in the switch is maintained at a safe value by limiting the current to the
maximum current allowed in the switch IL(SC). During this time, the DMOS temperature is increasing, which
affects the current flowing in the DMOS. The current limitation value is VDS dependent. Figure 18 shows the
behavior of the current limitation as a function of the drain to source voltage.
120
110
100
Current Limit IL(SC) (A)
90
80
70
60
50
40
30
3
8
13
18
23
28
33
38
43
48
Drain Source Voltage VDS (V)
Figure 18
Datasheet
Current Limitation (typical behavior)
20
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Protection Functions
6.5.2
Temperature Limitation in the Power DMOS
The channel incorporates both an absolute (TJ(SC)) and a dynamic (TJ(SW)) temperature sensor. Activation of
either sensor will cause an overheated channel to switch OFF to prevent destruction. Any protective switch
OFF latches the output until the temperature has reached an acceptable value. Figure 19 gives a sketch of the
situation.
No retry strategy is implemented such that when the DMOS temperature has cooled down enough, the switch
is switched ON again. Only the IN pin signal toggling can re-activate the power stage (latch behavior).
IN
t
IL
LOAD CURRENT LIMITATION PHASE
IL(x)SC
LOAD CURRENT BELOW
LIMITATION PHASE
IL(NOM)
t
TDMOS
TJ(SC)
Temperature
protection phase
ΔTJ(SW)
TA
tsIS(FAULT)
t
tsIS(OC_blank)
IIS
IIS(FAULT)
IL(NOM) / kILIS
0A
VDEN
t
tsIS(OF F)
0V
t
Hard start.vsd
Figure 19
Overload Protection
Note:
For better understanding, the time scale is not linear. The real timing of this drawing is application
dependant and cannot be described.
Datasheet
21
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BTT6010-1ERA
Protection Functions
6.6
Electrical Characteristics for the Protection Functions
Table 7
Electrical Characteristics: Protection
VS = 8 V to 36 V, TJ = -40°C to +150°C (unless otherwise specified).
Typical values are given at VS = 28 V, TJ = 25°C
Parameter
Symbol
Values
Unit
Note or
Test Condition
Number
Min.
Typ.
Max.
IOUT(GND)
–
0.1
–
mA
1) 2)
VS = 48 V
See Figure 14
P_6.6.1
VDS(REV)
420
650
700
mV
IL = - 4 A
TJ = 150°C
See Figure 17
P_6.6.2
VS(AZ)
66
70
75
V
ISOV = 5 mA
See Figure 16
P_6.6.3
Load current limitation
IL5(SC)
90
115
140
A
3)
VDS = 7 V
See Chapter 9
P_6.6.4
Load current limitation
IL28(SC)
–
57.5
–
A
2)
VDS = 42 V
See Figure 19
P_6.6.7
Dynamic temperature increase ∆TJ(SW)
while switching
–
80
–
K
4)
See Figure 19
P_6.6.8
Thermal shutdown
temperature
TJ(SC)
150
170 4)
200 4)
°C
5)
See Figure 19
P_6.6.10
Thermal shutdown hysteresis
∆TJ(SC)
–
30
–
K
5) 4)
Loss of Ground
Output leakage current while
GND disconnected
Reverse Polarity
Drain source diode voltage
during reverse polarity
Overvoltage
Overvoltage protection
Overload Condition
1)
2)
3)
4)
5)
See Figure 19
P_6.6.11
All pins are disconnected except VS and OUT.
Not Subject to production test, specified by design
Test at TJ = -40°C only
Functional test only
Test at TJ = +150°C only
Datasheet
22
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BTT6010-1ERA
Diagnostic Functions
7
Diagnostic Functions
For diagnosis purpose, the BTT6010-1ERA provides a combination of digital and analog signals at pin IS. These
signals are called SENSE. In case the diagnostic is disabled via DEN, pin IS becomes high impedance. In case
DEN is activated, the sense current of the channel is enabled.
7.1
IS Pin
The BTT6010-1ERA provides a sense signal called IIS at pin IS. As long as no “hard” failure mode occurs (short
circuit to GND / current limitation / overtemperature / excessive dynamic temperature increase or open load
at OFF) a proportional signal to the load current (ratio kILIS = IL / IIS) is provided. The complete IS pin and
diagnostic mechanism is described in Figure 20. The accuracy of the sense current depends on temperature
and load current. Due to the ESD protection, in connection to VS, it is not recommended to share the IS pin with
other devices if these devices are using another battery feed. The consequence is that the unsupplied device
would be fed via the IS pin of the supplied device.
VS
FAULT
IIS(FAULT)
IIS = IL / kILIS
ZIS(AZ)
1
1
IS
0
0
DEN
Sense schematic single.vsd
Figure 20
Datasheet
Diagnostic Block Diagram
23
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Diagnostic Functions
7.2
SENSE Signal in Different Operating Modes
Table 8 gives a quick reference for the state of the IS pin during device operation.
Table 8
Sense Signal, Function of Operation Mode
Operation Mode
Input level Channel X
DEN
Output Level Diagnostic Output
Normal operation
OFF
H
Z
Z
Short circuit to GND
~ GND
Z
Overtemperature
Z
Z
Short circuit to VS
VS
IIS(FAULT)
Open Load
< VOL(OFF)
> VOL(OFF)1)
Z
IIS(FAULT)
Inverse current
~ VINV
IIS(FAULT)
~ VS
IIS = IL / kILIS
Current limitation
< VS
IIS(FAULT)
Short circuit to GND
~ GND
IIS(FAULT)
Overtemperature TJ(SW)
event
Z
IIS(FAULT)
Short circuit to VS
VS
Normal operation
ON
IIS < IL / kILIS
2)
Open Load
~ VS
Inverse current
~ VINV
IIS < IIS(OL)3)
Underload
~ VS4)
IIS(OL) < IIS < IL / kILIS
Don’t care
Z
Don’t care
1)
2)
3)
4)
Don’t care
L
IIS < IIS(OL)
With additional pull-up resistor.
The output current has to be smaller than IL(OL).
After maximum tINV.
The output current has to be higher than IL(OL).
Datasheet
24
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Diagnostic Functions
7.3
SENSE Signal in the Nominal Current Range
Figure 21 and Figure 22 show the current sense as a function of the load current in the power DMOS. Usually,
a pull-down resistor RIS is connected to the current sense IS pin. This resistor has to be higher than 560 Ω to
limit the power losses in the sense circuitry. A typical value is 1.2 kΩ. The blue curve represents the ideal sense
current, assuming an ideal kILIS factor value. The red curves shows the accuracy the device provide across full
temperature range, at a defined current.
3
2.5
IIS [mA]
2
1.5
1
0.5
min/max Sense Current
typical Sense Current
0
0
1
2
3
4
5
IL [A]
6
7
8
9
10
BTT6010-1EKA
BTT6010-1ERA
Figure 21
Current Sense for Nominal Load
7.3.1
SENSE Signal Variation as a Function of Temperature and Load Current
In some applications a better accuracy is required around half the nominal current IL(NOM). To achieve this
accuracy requirement, a calibration on the application is possible. To avoid multiple calibration points at
different load and temperature conditions, the BTT6010-1ERA allows limited derating of the kILIS value, at a
given point (IL3; TJ = +25°C). This derating is described by the parameter ∆kILIS. Figure 22 shows the behavior
of the sense current, assuming one calibration point at nominal load at +25°C.
The blue line indicates the ideal kILIS ratio.
The green lines indicate the derating on the parameter across temperature and voltage, assuming one
calibration point at nominal temperature and nominal battery voltage.
The red lines indicate the kILIS accuracy without calibration.
Datasheet
25
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BTT6010-1ERA
Diagnostic Functions
7000
calibrated k ILIS
min/max k ILIS
6500
typical k ILIS
6000
5500
k ILIS
5000
4500
4000
3500
3000
2500
2000
0
1
2
3
4
5
IL [A]
6
7
8
9
10
BTT6010-1EKA
BTT6010-1ERA
Figure 22
Improved Current Sense Accuracy with One Calibration Point at 2 A
7.3.2
SENSE Signal Timing
Figure 23 shows the timing during settling and disabling of the sense.
V IN
t
IL
tON
tOFF
tON
90% of
IL static
t
VDEN
IIS
tsIS(ON)
90% of
IIS static
t
tsIS(LC)
tsIS(OFF)
tsIS(ON_DEN)
t
current sense settling disabling time .vsd
Figure 23
Datasheet
Current Sense Settling / Disabling Timing
26
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Diagnostic Functions
7.3.3
SENSE Signal in Open Load
7.3.3.1
Open Load in ON Diagnostic
If the channel is ON, a leakage current can still flow through an open load, for example due to humidity. The
parameter IL(OL) gives the threshold of recognition for this leakage current. If the current IL flowing out the
power DMOS is below this value, the device recognizes a failure, if the DEN is selected. In that case, the SENSE
current is below IIS(OL). Otherwise, the minimum SENSE current is given above parameter IIS(OL). Figure 24
shows the SENSE current behavior in this area. The red curve shows a typical product curve. The blue curve
shows the ideal current sense.
I IS
IIS(OL)
IL
IL(OL)
Sense for OL .vsd
Figure 24
Current Sense Ratio for Low Currents
7.3.3.2
Open Load in OFF Diagnostic
For open load diagnosis in OFF-state, an external output pull-up resistor (ROL) is recommended. For the
calculation of pull-up resistor value, the leakage currents and the open load threshold voltage VOL(OFF) have to
be taken into account. Figure 25 gives a sketch of the situation. Ileakage defines the leakage current in the
complete system, including IL(OFF) (see Chapter 5.5) and external leakages, e.g, due to humidity, corrosion,
etc.... in the application.
To reduce the stand-by current of the system, an open load resistor switch SOL is recommended. If the channel
is OFF, the output is no longer pulled down by the load and VOUT voltage rises to nearly VS. This is recognized
by the device as an open load. The voltage threshold is given by VOL(OFF). In that case, the SENSE signal is
switched to the IIS(FAULT).
An additional RPD resistor can be used to pull VOUT to 0 V. Otherwise, the OUT pin is floating. This resistor can
be used as well for short circuit to battery detection, see Chapter 7.3.4.
Datasheet
27
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BTT6010-1ERA
Diagnostic Functions
Vbat
SOL
VS
IIS(FAULT)
ROL
OL
comp.
OUT
IS
ILOFF
Ileakage
GND
ZGND
RIS
VOL(OFF)
RPD
Rleakage
Open Load in OFF.vsd
Figure 25
Open Load Detection in OFF Electrical Equivalent Circuit
7.3.3.3
Open Load Diagnostic Timing
Figure 26 shows the timing during either Open load in ON or OFF condition when the DEN pin is HIGH. Please
note that a delay tsIS(FAULT_OL_OFF) has to be respected after the falling edge of the input and rising edge of the
DEN, when applying an open load in OFF diagnosis request, otherwise the voltage VOUT cannot be guaranteed
and the diagnosis can be wrong.
Load is present
Open load
VIN
VOUT
t
VS-VOL(OFF)
RDS(ON) x IL
shutdown with load
t
IOUT
IIS
tsIS(FAULT_OL_ON_OFF)
Error Settling Disabling Time.vsd
Figure 26
Datasheet
t
tsIS(LC)
t
SENSE Signal in Open Load Timing
28
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Diagnostic Functions
7.3.4
SENSE Signal with OUT in Short Circuit to VS
In case of a short circuit between the OUTput-pin and the VS pin, all or portion (depending on the short circuit
impedance) of the load current will flow through the short circuit. As a result, a lower current compared to the
normal operation will flow through the DMOS of the BTT6010-1ERA, which can be recognized at the current
sense signal. The open load at OFF detection circuitry can also be used to distinguish a short circuit to VS. In
that case, an external resistor to ground RSC_VS is required. Figure 27 gives a sketch of the situation.
Vbat
VS
IIS(FAULT)
VBAT
OL
comp.
IS
OUT
GND
RIS
ZGND
RSC_VS
VOL(OFF)
Short circuit to Vs.vsd
Figure 27
Short Circuit to Battery Detection in OFF Electrical Equivalent Circuit
7.3.5
SENSE Signal in Case of Overload
An overload condition is defined by a current flowing out of the DMOS reaching the current limitation and / or
the absolute dynamic temperature swing TJ(SW) is reached, and / or the junction temperature reaches the
thermal shutdown temperature TJ(SC). Please refer to Chapter 6.5 for details.
In that case, the SENSE signal given is by IIS(FAULT) when the diagnostic is selected.
The device has a thermal latch behavior, such that when the overtemperature or the exceed dynamic
temperature condition has disappeared, the DMOS is reactivated only when the IN is toggled LOW to HIGH. If
the DEN pin is activated the SENSE follows the output stage. If no reset of the latch occurs, the device remains
in the latching phase and IIS(FAULT) at the IS pin, eventhough the DMOS is OFF.
7.3.6
SENSE Signal in Case of Inverse Current
In the case of inverse current, the sense signal will indicate open load in OFF state and indicate open load in
ON state.
Datasheet
29
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BTT6010-1ERA
Diagnostic Functions
7.4
Electrical Characteristics Diagnostic Function
Table 9
Electrical Characteristics: Diagnostics
VS = 8 V to 36 V, TJ = -40°C to +150°C (unless otherwise specified).
Typical values are given at VS = 28 V, TJ = 25°C
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit Note or
Test Condition
Number
Load Condition Threshold for Diagnostic
Open load detection
threshold in OFF state
VS - VOL(OFF)
4
–
6
V
VIN = 0 V
VDEN = 4.5 V
P_7.5.1
Open load detection
threshold in ON state
IL(OL)
10
–
50
mA
VIN = VDEN = 4.5 V
IIS(OL) = 6.5 μA
See Figure 24
See Chapter 9
P_7.5.2
IS pin leakage current when IIS_(DIS)
sense is disabled
–
–
1
µA
VIN = 4.5 V
VDEN = 0 V
IL = IL4 = 10 A
P_7.5.4
Sense signal saturation
voltage
1
–
3.5
V
VIN = 0 V
VOUT = VS > 10 V
VDEN = 4.5 V
IIS = 6 mA
See Chapter 9
P_7.5.6
6
20
40
mA
VIS = VIN = 0 V
VOUT = VS > 10 V
VDEN = 4.5 V
See Figure 20
See Chapter 9
P_7.5.7
66
70
75
V
IIS B= 5 mA
See Figure 20
P_7.5.3
Sense Pin
Sense signal maximum
current in fault condition
VS - VIS
(RANGE)
IIS(FAULT)
Sense pin maximum voltage VIS(AZ)
Current Sense Ratio Signal in the Nominal Area, Stable Load Current Condition
Current sense ratio
IL0 = 50 mA
kILIS0
-50%
4500
+50%
Current sense ratio
IL1 = 0.5 A
kILIS1
-40%
3900
+40%
Current sense ratio
IL2 = 2 A
kILIS2
-18%
3900
+18%
P_7.5.10
Current sense ratio
IL3 = 4 A
kILIS3
-10%
3900
+10%
P_7.5.11
Current sense ratio
IL4 = 10 A
kILIS4
-9%
3900
+9%
P_7.5.12
kILIS derating with current
and temperature
∆kILIS
-8
0
+8
Datasheet
30
VIN = 4.5 V
VDEN = 4.5 V
See Figure 21
TJ = -40°C; 150°C
%
1)
kILIS3 versus kILIS2
See Figure 22
P_7.5.8
P_7.5.9
P_7.5.17
Rev. 1.00
2019-03-09
PROFET™+ 24V
BTT6010-1ERA
Diagnostic Functions
Table 9
Electrical Characteristics: Diagnostics (cont’d)
VS = 8 V to 36 V, TJ = -40°C to +150°C (unless otherwise specified).
Typical values are given at VS = 28 V, TJ = 25°C
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit Note or
Test Condition
Number
Current sense settling time tsIS(ON)
to kILIS function stable after
positive input slope on both
INput and DEN
–
–
150
µs
VDEN = VIN = 0 to 4.5 V; P_7.5.18
VS =28 V
RIS = 1.2 kΩ
CSENSE < 100 pF
IL = IL3 = 4 A
See Figure 23
Current sense settling time tsIS(ON_DEN)
with load current stable and
transition of the DEN
–
–
10
µs
VIN = 4.5 V
VDEN = 0 to 4.5 V
RIS = 1.2 kΩ
CSENSE < 100 pF
IL = IL3 = 4 A
See Figure 23
Current sense settling time
to IIS stable after positive
input slope on current load
–
–
20
µs
VIN = 4.5 V
P_7.5.20
VDEN = 4.5 V
RIS = 1.2 kΩ
CSENSE < 100 pF
IL = IL2 = 2 A to IL3 = 4 A;
See Figure 23
–
100
µs
VIN = 0 V
VDEN = 0 to 4.5 V
RIS = 1.2 kΩ
CSENSE < 100 pF
VOUT = VS = 28 V
See Figure 26
P_7.5.22
200
–
µs
1)
VIN = 4.5 to 0 V
VDEN = 4.5 V
RIS = 1.2 kΩ
CSENSE < 100 pF
VOUT = VS = 28 V
See Figure 26
P_7.5.23
–
150
µs
1)
Diagnostic Timing in Normal Condition
tsIS(LC)
1)
P_7.5.19
Diagnostic Timing in Open Load Condition
Current sense settling time
to IIS stable for open load
detection in OFF state
Current sense settling time
for open load detection in
ON-OFF transition
tsIS(FAULT_OL_ –
OFF)
tsIS(FAULT_OL_ ON_OFF)
Diagnostic Timing in Overload Condition
Current sense settling time
to IIS stable for overload
detection
Datasheet
tsIS(FAULT)
0
31
VIN = VDEN = 0 to 4.5 V P_7.5.24
RIS = 1.2 kΩ
CSENSE < 100 pF
VDS = 24 V
See Figure 19
Rev. 1.00
2019-03-09
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BTT6010-1ERA
Diagnostic Functions
Table 9
Electrical Characteristics: Diagnostics (cont’d)
VS = 8 V to 36 V, TJ = -40°C to +150°C (unless otherwise specified).
Typical values are given at VS = 28 V, TJ = 25°C
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit Note or
Test Condition
Number
Current sense over current
blanking time
tsIS(OC_blank)
–
350
–
µs
1)
VIN =VDEN = 4.5 V
RIS = 1.2 kΩ
CSENSE < 100 pF
VDS = 5 V to 0 V
See Figure 19
P_7.5.32
Diagnostic disable time
DEN transition to
IIS < 50% IL /kILIS
tsIS(OFF)
0
–
20
µs
VIN = 4.5 V
VDEN = 4.5 V to 0 V
RIS = 1.2 kΩ
CSENSE < 100 pF
IL = IL3 = 4 A
P_7.5.25
1) Not subject to production test, specified by design
Datasheet
32
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BTT6010-1ERA
Input Pins
8
Input Pins
8.1
Input Circuitry
The input circuitry is compatible with 3.3 and 5 V microcontrollers. The concept of the input pin is to react to
voltage thresholds. An implemented Schmitt trigger avoids any undefined state if the voltage on the input pin
is slowly increasing or decreasing. The output is either OFF or ON but cannot be in a linear or undefined state.
The input circuitry is compatible with PWM applications. Figure 28 shows the electrical equivalent input
circuitry. In case the pin is not needed, it must be left opened, or must be connected to device ground (and not
module ground) via an input resistor.
IN
GND
Figure 28
Input Pin Circuitry
8.2
DEN Pin
Input circuitry.vsd
The DEN pin enables and disables the diagnostic functionality of the device. The pin has the same structure as
the INput pin, please refer to Figure 28.
8.3
Input Pin Voltage
The IN and DEN use a comparator with hysteresis. The switching ON / OFF takes place in a defined region, set
by the thresholds VIN(L) Max. and VIN(H) Min. The exact value where the ON and OFF take place are unknown and
depends on the process, as well as the temperature. To avoid cross talk and parasitic turn ON and OFF, a
hysteresis is implemented. This ensures a certain immunity to noise.
Datasheet
33
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Input Pins
8.4
Electrical Characteristics
Table 10
Electrical Characteristics: Input Pins
VS = 8 V to 36 V, TJ = -40°C to +150°C (unless otherwise specified).
Typical values are given at VS = 28 V, TJ = 25°C
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit
Note or
Test Condition
Number
See Chapter 9
P_8.4.1
P_8.4.2
INput Pins Characteristics
Low level input voltage range
VIN(L)
-0.3
–
0.8
V
High level input voltage range
VIN(H)
2
–
6
V
See Chapter 9
Input voltage hysteresis
VIN(HYS)
–
250
–
mV
1)
Low level input current
IIN(L)
1
10
25
µA
VIN = 0.8 V
P_8.4.4
High level input current
IIN(H)
2
10
25
µA
VIN = 5.5 V
See Chapter 9
P_8.4.5
Low level input voltage range
VDEN(L)
-0.3
–
0.8
V
–
P_8.4.6
High level input voltage range
VDEN(H)
2
–
6
V
–
P_8.4.7
P_8.4.8
See Chapter 9 P_8.4.3
DEN Pin
Input voltage hysteresis
VDEN(HYS)
–
250
–
mV
1)
Low level input current
IDEN(L)
1
10
25
µA
VDEN = 0.8 V
P_8.4.9
High level input current
IDEN(H)
2
10
25
µA
VDEN = 5.5 V
P_8.4.10
1) Not subject to production test, specified by design
Datasheet
34
Rev. 1.00
2019-03-09
PROFET™+ 24V
BTT6010-1ERA
Characterization Results
9
Characterization Results
The characterization has been performed on 3 lots, with 3 devices each. Characterization has been performed
at 8 V, 28 V and 36 V over temperature range.
9.1
General Product Characteristics
P_4.2.4
5
4
4.8
3.9
4.6
3.8
4.4
3.7
4.2
3.6
[V]
[V]
P_4.2.3
4
3.8
3.5
3.4
3.6
3.3
3.4
3.2
8V
8V
28V
28V
3.2
3.1
36V
3
36V
3
-50
-25
0
25
50
75
100
125
150
-50
Temperature [°C]
-25
0
25
50
75
100
125
150
Temperature [°C]
Minimum Functional Supply Voltage
VS(OP)_MIN = f(TJ)
Undervoltage Threshold
VS(UV) = f(TJ)
P_4.2.7
12
8V
28V
10
36V
[µA]
8
6
4
2
0
-50
-25
0
25
50
75
100
125
150
Temperature [°C]
Standby Current for Whole Device with Load
IS(OFF)= f(TJ;VS)
Datasheet
35
Rev. 1.00
2019-03-09
PROFET™+ 24V
BTT6010-1ERA
Characterization Results
9.2
Power Stage
P_5.5.4
P_5.5.5
14
69.4
69.2
12
69
68.8
10
68.6
8
[V]
[mV]
68.4
68.2
6
68
4
67.8
8V
2
28V
36V
67.4
0
-50
-25
0
25
50
75
100
125
8V
67.6
28V
36V
67.2
150
-50
Temperature [°C]
-25
0
25
50
75
Output Voltage Drop Limitation at
Low Load Current VDS(NL) = f(TJ; VS)
Drain to Source Clamp Voltage
VDS(AZ) = f(TJ)
P_5.5.11
P_5.5.12
1
1
0.9
0.9
0.8
0.8
0.7
0.7
0.6
0.6
[V/µs]
[V/µs]
100
125
150
Temperature [°C]
0.5
0.5
0.4
0.4
0.3
0.3
0.2
0.2
8V
8V
28V
0.1
28V
0.1
36V
36V
0
0
-50
-25
0
25
50
75
100
125
-50
150
-25
0
25
50
75
100
125
150
Temperature [°C]
Temperature [°C]
Slew Rate at Turn ON
dV/dtON = f(TJ;VS), RL = 4 Ω
Slew Rate at Turn OFF
-dV/dtOFF = f(TJ;VS), RL = 4 Ω
P_5.5.14
P_5.5.15
80
80
70
70
60
60
50
50
[µs]
90
[µs]
90
40
40
30
30
20
20
8V
28V
10
8V
28V
10
36V
0
36V
0
-50
-25
0
25
50
75
100
125
-50
150
Temperature [°C]
Turn ON tON = f(TJ;VS), RL = 4 Ω
Datasheet
-25
0
25
50
75
100
125
150
Temperature [°C]
Turn OFF tOFF = f(TJ;VS), RL = 4 Ω
36
Rev. 1.00
2019-03-09
PROFET™+ 24V
BTT6010-1ERA
Characterization Results
P_5.5.20
6000
6000
5000
5000
4000
4000
[µJ]
[µJ]
P_5.5.19
3000
3000
25°C
25°C
2000
2000
-40°C
-40°C
150°C
1000
150°C
1000
0
0
0
10
20
30
40
50
0
60
10
20
Supply Voltage [V]
Switch ON Energy
EON = f(TJ;VS), RL = 4 Ω
9.3
30
40
50
60
Supply Voltage [V]
Switch OFF Energy
EOFF = f(TJ;VS), RL = 4 Ω
Protection Functions
P_6.6.4
P_6.6.7
56
115
55
54
110
53
[A]
[A]
105
52
51
100
50
95
49
90
48
-50
-25
0
25
50
75
100
125
150
-50
Temperature [°C]
Overload Condition in the
Low Voltage Area IL5(SC) = f(TJ)
Datasheet
-25
0
25
50
75
100
125
150
Temperature [°C]
Overload Condition in the
High Voltage Area IL28(SC) = f(TJ)
37
Rev. 1.00
2019-03-09
PROFET™+ 24V
BTT6010-1ERA
Characterization Results
9.4
Diagnostic Mechanism
P_7.5.2
2.5
29
27
2
25
[µA]
[mA]
1.5
23
21
1
19
0.5
8V
8V
28V
17
28V
36V
36V
0
15
-50
-25
0
25
50
75
100
125
-50
150
-25
0
25
Temperature [°C]
50
75
100
125
150
Temperature [°C]
Current Sense at no Load
IIS = f(TJ;VS), IL = 0
Open Load Detection ON-State
Threshold IL(OL)= f(TJ;VS)
P_7.5.6
P_7.5.7
2.4
30
2.35
25
2.3
2.25
20
[V]
[mA]
2.2
15
2.15
2.1
10
2.05
8V
8V
5
28V
2
28V
36V
36V
1.95
0
-50
-25
0
25
50
75
100
125
150
-50
Temperature [°C]
Sense Signal Maximum Voltage
VS - VIS (RANGE) = f(TJ)
Datasheet
-25
0
25
50
75
100
125
150
Temperature [°C]
Sense Signal Maximum Current in
Fault Condition IIS(FAULT)= f(TJ;VS)
38
Rev. 1.00
2019-03-09
PROFET™+ 24V
BTT6010-1ERA
Characterization Results
9.5
Input Pins
P_8.4.2
1.9
1.9
1.7
1.7
1.5
1.5
1.3
1.3
[V]
[V]
P_8.4.1
1.1
1.1
8V
8V
28V
28V
36V
0.9
36V
0.9
0.7
0.7
0.5
0.5
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
Temperature [°C]
50
75
100
125
150
Temperature [°C]
Input Voltage Threshold
VIN(L)= f(TJ;VS)
Input Voltage Threshold
VIN(H)= f(TJ;VS)
P_8.4.3
P_8.4.5
450
16
400
14
350
12
300
10
[µA]
[mV]
250
8
200
8V
8V
6
28V
150
28V
36V
36V
4
100
2
50
0
0
-50
-25
0
25
50
75
100
125
150
-50
Temperature [°C]
Input Voltage Hysteresis
VIN(HYS)= f(TJ;VS)
Datasheet
-25
0
25
50
75
100
125
150
Temperature [°C]
Input Current High Level
IIN(H)= f(TJ)
39
Rev. 1.00
2019-03-09
PROFET™+ 24V
BTT6010-1ERA
Application Information
10
Application Information
Note:
The following information is given as a hint for the implementation of the device only and shall not
be regarded as a description or warranty of a certain functionality, condition or quality of the device.
VBAT
Voltage Regulator
OUT
T1
VS
GND
CVDD
CVS
DZ
ROL
VS
VDD
GPIO
RDEN
DEN
RIN
IN
Microcontroller
OUT
GPIO
COUT
RPD
ADC IN
Bulb
IS
RSENSE
GND
GND
CSENSE
RIS
RGND
D
Application_example_Single.emf
Figure 29
Application Diagram with BTT6010-1ERA
Note:
This is a very simplified example of an application circuit. The function must be verified in the real
application.
Table 11
Bill of Material
Reference Value
Purpose
RIN
10 kΩ
Protection of the microcontroller during overvoltage, reverse polarity
Guarantee BTT6010-1ERA channels OFF during loss of ground
RDEN
10 kΩ
Protection of the microcontroller during overvoltage, reverse polarity
Guarantee BTT6010-1ERA channels OFF during loss of ground
RPD
47 kΩ
Polarization of the output
Improve BTT6010-1ERA immunity to electromagnetic noise
RIS
1.2 kΩ
Sense resistor
RSENSE
10 kΩ
Overvoltage, reverse polarity, loss of ground. Value to be tuned with
microcontroller specification.
Datasheet
40
Rev. 1.00
2019-03-09
PROFET™+ 24V
BTT6010-1ERA
Application Information
Table 11
Bill of Material (cont’d)
Reference Value
Purpose
ROL
1.5 kΩ
Ensure polarization of the BTT6010-1ERA output during open load in OFF
diagnostic
D
BAS21
Protection of the BTT6010-1ERA during reverse polarity
RGND
27 Ω
To limit the GND current at a safe value during ISO pulse
Z
58 V Zener diode
Protection of the device during overvoltage
T1
Dual NPN/PNP
Switch the battery voltage for open load in OFF diagnostic
CSENSE
100 pF
Sense signal filtering
CVS
100 nF
Filtering of the voltage spikes on the battery line
COUT
10 nF
Protection of the BTT6010-1ERA during ESD and BCI
10.1
Further Application Information
•
Please contact us to get the pin FMEA
•
Existing App. Notes
•
For further information you may visit www.infineon.com
Datasheet
41
Rev. 1.00
2019-03-09
PROFET™+ 24V
BTT6010-1ERA
Package Outlines
Package Outlines
0.25
GAUGE
PLANE
1.15 MAX.
1)
8.65±0.1
14x
COPLANARITY
0°
SEATING
PLANE
...
8
°
0.05±0.05
STANDOFF
1)
3.9±0.1
(0.2)
(0.95)
11
0.67±0.25
6±0.2
2)
14x
14
INDEX
MARKING
1
BOTTOM VIEW
8
7
8
14
7
1
2.65±0.1
0.4±0.05
6.4±0.1
1.27
All dimensions are in units mm
The drawing is in compliance with ISO 128-30, Projection Method 1[
]
1)
Does not Include plastic or metal protrusion of 0.15 max. per side
2)
Dambar protrusion shall be maximum 0.1mm total in excess of width lead width
Figure 30
PG-TDSO-141) (Plastic Dual Small Outline Package) (RoHS-Compliant)
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant
with government regulations the device is available as a green product. Green products are RoHS-Compliant
(i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
Legal Disclaimer for Short-Circuit Capability
Infineon disclaims any warranties and liablilities, whether expressed or implied, for any short-circuit failures
below the threshold limit.
Further information on packages
https://www.infineon.com/packages
1) Dimensions in mm
Datasheet
42
Rev. 1.00
2019-03-09
PROFET™+ 24V
BTT6010-1ERA
Revision History
12
Revision History
Version
Date
Changes
1.00
2019-03-09
Creation of datasheet
Datasheet
43
Rev. 1.00
2019-03-09
PROFET™+ 24V
BTT6010-1ERA
Table of Contents
1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
3
3.1
3.2
3.3
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage and Current Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4
4.1
4.2
4.3
4.3.1
4.3.2
General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
PCB Set-Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5
5.1
5.2
5.3
5.3.1
5.3.2
5.4
5.5
Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output ON-State Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Turn ON/OFF Characteristics with Resistive Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Inductive Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Load Inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Inverse Current Capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11
11
11
12
12
13
14
15
6
6.1
6.2
6.3
6.4
6.5
6.5.1
6.5.2
6.6
Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Loss of Ground Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Undervoltage Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Overvoltage Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reverse Polarity Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Overload Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current Limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Temperature Limitation in the Power DMOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics for the Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
17
17
17
18
19
20
20
21
22
7
7.1
7.2
7.3
7.3.1
7.3.2
7.3.3
7.3.3.1
7.3.3.2
7.3.3.3
7.3.4
7.3.5
7.3.6
7.4
Diagnostic Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IS Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SENSE Signal in Different Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SENSE Signal in the Nominal Current Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SENSE Signal Variation as a Function of Temperature and Load Current . . . . . . . . . . . . . . . . . .
SENSE Signal Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SENSE Signal in Open Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Open Load in ON Diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Open Load in OFF Diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Open Load Diagnostic Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SENSE Signal with OUT in Short Circuit to VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SENSE Signal in Case of Overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SENSE Signal in Case of Inverse Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics Diagnostic Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
23
23
24
25
25
26
27
27
27
28
29
29
29
30
8
8.1
8.2
8.3
8.4
Input Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DEN Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Pin Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
33
33
33
33
34
Datasheet
44
4
4
4
5
Rev. 1.00
2019-03-09
PROFET™+ 24V
BTT6010-1ERA
9
9.1
9.2
9.3
9.4
9.5
Characterization Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Diagnostic Mechanism . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
35
35
36
37
38
39
10
10.1
Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Further Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
11
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
12
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Datasheet
45
Rev. 1.00
2019-03-09
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Edition 2019-03-09
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2019 Infineon Technologies AG.
All Rights Reserved.
Do you have a question about any
aspect of this document?
Email: erratum@infineon.com
Document reference
BTT6010-1ERA
IMPORTANT NOTICE
The information given in this document shall in no
event be regarded as a guarantee of conditions or
characteristics ("Beschaffenheitsgarantie").
With respect to any examples, hints or any typical
values stated herein and/or any information regarding
the application of the product, Infineon Technologies
hereby disclaims any and all warranties and liabilities
of any kind, including without limitation warranties of
non-infringement of intellectual property rights of any
third party.
In addition, any information given in this document is
subject to customer's compliance with its obligations
stated in this document and any applicable legal
requirements, norms and standards concerning
customer's products and any use of the product of
Infineon Technologies in customer's applications.
The data contained in this document is exclusively
intended for technically trained staff. It is the
responsibility of customer's technical departments to
evaluate the suitability of the product for the intended
application and the completeness of the product
information given in this document with respect to
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For further information on technology, delivery terms
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WARNINGS
Due to technical requirements products may contain
dangerous substances. For information on the types
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