TLE49462LHALA1

TLE4946-2L High Precision Hall Effect Latch About this document Overview The TLE4946-2L is a high precision Hall effect latch with highly accurate switching thresholds for operating temperatures up to 150°C. Features • • • • • • • • • 2.7 V to 18 V supply voltage operation. Operation from unregulated power supply. High sensitivity and high stability of the magnetic switching points. High resistance to mechanical stress by active error compensation Reverse battery protection (VS = -18 V) Superior temperature stability Low jitter (typically 1 µs) High ESD performance (± 4 kV HBM) Digital output signal Target applications The TLE4946-2L is an integrated circuit Hall-effect sensor with low switching thresholds and low hysteresis. It is specially designed for high sensitivity applications and is ideally suited to detect the rotor position in a BLDC motor. Also for index counting with small pole wheels and large air gaps the sensor provides a reliable switching information. Product name Product type Ordering code Package Hall Effect Latch TLE4946-2L SP000398352 PG-SSO-3-2 Datasheet www.infineon.com Please read the Important Notice and Warnings at the end of this document Rev. 1.1 2020-08 TLE4946-2L High Precision Hall Effect Latch Table of contents Table of contents About this document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1 1.1 1.2 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.3 1.4 1.5 1.6 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 Operating modes and states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional block description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 2.1 2.2 2.3 2.4 Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Operating range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 3.1 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Datasheet 2 Rev. 1.1 2020-08 TLE4946-2L High Precision Hall Effect Latch 1 Functional description 1 Functional description 1.1 General Precise magnetic switching thresholds and high temperature stability are achieved by active compensation circuits and chopper techniques on chip. Offset voltages, generated by temperature induced stress or overmolding are canceled and high accuracy is achieved. The IC has an open collector output stage with 20 mA current sink capability. A wide operating voltage range form 2.7 V to 18 V with reverse polarity protection up to -18V makes the device suitable for a wide range of applications. A magnetic south pole with field strength above Bop turns the output on and a magnetic north pole exceeding Brp turns it off. 1.2 Pin configuration Center of Sensitive Area 2.08 ± 0.1 1.35 ± 0.1 1 2 3 PG-SSO-3-2 Figure 1 Pin configuration and sensitive area (Top View, Figure not to Scale) 1.3 Pin description Table 1 Pin description Pin or Ball No. Name Pin Type Function 1 Vs I Supply voltage 2 GND O Ground 3 Q O Output Datasheet 3 Comments Rev. 1.1 2020-08 TLE4946-2L High Precision Hall Effect Latch 1 Functional description 1.4 Block diagram VS Voltage Regulator reverse polarity protected Bias and Compensation Circuits Oscillator and Sequencer Q Ref Amplifier Chopped Hall Probe Low Pass Filter GND Comparator with Hysteresis Figure 2 TLE4946-2L Block diagram 1.5 Operating modes and states Field Direction Definition: Positive magnetic fields are related with the south pole of the magnet to the branded side of package. BOP Applied Magnetic Field BRP td VQ td tf tr 90% 10% Figure 3 Datasheet Timing diagram 4 Rev. 1.1 2020-08 TLE4946-2L High Precision Hall Effect Latch 1 Functional description VQ B Brp 0 Bop Figure 4 Output signal 1.6 Functional block description The chopped Hall IC switch comprises a Hall probe, bias generator, compensation circuits, oscillator and output transistor. The bias generator provides currents for the Hall probe and the active circuits. Compensation circuits stabilize the temperature behavior and reduce technology variations. The Active Error Compensation rejects offsets in signal stages and the influence of mechanical stress to the Hall probe caused by molding and soldering processes and other thermal stresses in the package. This chopper technique together with the threshold generator and the comparator ensure high accurate magnetic switching points. Datasheet 5 Rev. 1.1 2020-08 TLE4946-2L High Precision Hall Effect Latch 2.1 Application circuit Figure 5 Q VS 4.7nF GND Q 1.2kΩ Specification TLE4946-2L 2 4.7nF 2 Specification GND 200Ω VS Application circuit It is recommended to use a serial resistor of 200 Ω in the supply line for current limitation in the case of a overvoltage pulse. Two capacitors of 4.7 nF enhance the EMC performance. The pull-up resistor of 1.2 kΩ limits the current through the output transistor. 2.2 Absolute maximum ratings Table 2 Absolute maximum ratings Parameter Symbol Values Min. Max. junction temperature Supply voltage TJ VDD Unit Typ. Max. -40 – 150 °C – – 155 for 2000 h (not additive) – – 165 for 1000 h (not additive) – – 175 for 168 h (not additive) – – 195 for 3 x 1 h (additive) -18 – 18 -18 – 24 for 1h, RS ≥ 200 Ω -18 – 26 for 5min, RS ≥ 200 Ω V Supply current through protection device IS -50 – 50 mA Output voltage VQ -0.7 – 18 V -0.7 – 26 -40 – 150 – unlimited mT Storage temperature TS Magnetic flux density B ESD robustness HBM: 1.5 kΩ, 100 pF VESD,HBM Note/Test Condition 4 for 5min @ 1.2 kΩ pull up °C kV According to EIA/JESD22A114-B Attention: Stresses above the max. values listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Maximum ratings are absolute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit. Datasheet 6 Rev. 1.1 2020-08 TLE4946-2L High Precision Hall Effect Latch 2 Specification 2.3 Operating range The following operating conditions must not be exceeded in order to ensure correct operation of the TLE4946-2L. All parameters specified in the following sections refer to these operating conditions unless otherwise mentioned. Table 3 Operating range Parameter Symbol Values Min. Unit Typ. Max. Supply voltage VS 2.7 – 18 V Output voltage VQ -0.7 – 18 V Junction temperature Tj -40 – 150 °C Output current IQ 0 – 20 mA 2.4 Note/Test Condition Characteristics Product characteristics involve the spread of values guaranteed within the specified voltage and ambient temperature range. Typical characteristics are the median of the production (at VS = 12 V and TA = 25°C). Table 4 Electrical Characteristics Parameter Symbol Values Min. Typ. Unit Note/Test Condition Max. Supply current IS 2 4 6 mA VS = 2.7 V ... 18 V Reverse current ISR 0 0.2 1 mA VS = –18 V Output saturation voltage VQSAT – 0.3 0.6 V IQ = 20 mA Output leakage current IQLEAK – 0.05 10 µA for VQ = 18 V Output fall time tf – 0.02 1 µs Output rise time tr – 0.4 1 µs RL = 1.2 kΩ; CL = 50 pF Chopper frequency fOSC – 320 – kHz Switching frequency fSW 0 – 15(1) kHz Delay time(2) td – 13 – µs Output jitter (3) tQJ – 1 – µsRMS Typ. value for square wave signal 1 kHz Power-on time (4) tPON – 13 – µs VS ≥ 2.7 V Thermal resistance(5) RthJA – 190 K/W PG-SSO-3-2 (1) (2) (3) (4) (5) To operate the sensor at the max. switching frequency, the value of the magnetic signal amplitude must be 1.4 times higher than for static fields. This is due to the -3 dB corner frequency of the low pass filter in the signal path. Systematic delay between magnetic threshold reached and output switching Jitter is the unpredictable deviation of the output switching delay Time from applying VS ≥ 2.7 V to the sensor until the output state is valid Thermal resistance from junction to ambient Datasheet 7 Rev. 1.1 2020-08 TLE4946-2L High Precision Hall Effect Latch 2 Specification Table 5 Magnetic characteristics Parameter Symbol Values Min. Typ. Unit Max. Operate point BOP 0.5 2.0 3.5 mT Release point BRP -3.5 -2.0 -0.5 mT Hysteresis BHYS 1.0 4 6.0 mT Magnetic Offset(1) BOFF -1.5 0 1.5 mT Temperature compensation of magn. thresholds TC -350 ppm/°C Repeatability of magnetic thresholds(2) BREP 20 µTRMS (1) (2) Note/Test Condition Boff = (Bop + Brp) / 2 BREP is equivalent to the noise constant Datasheet 8 Rev. 1.1 2020-08 TLE4946-2L High Precision Hall Effect Latch 3 Package information 3 Package information 3.1 Package outline 46 2 yww S d optional: data matrix code Branded Side Year (y) = 0...9 Calendar Week (ww) = 01...52 Hall-Probe d : Distance chip to upper side of IC PG-SSO-3-2 : 0.57 ±0.08 mm AEA03644 Figure 6 Datasheet Marking of TLE4946-2L and Distance of chip to upper side of IC 9 Rev. 1.1 2020-08 TLE4946-2L High Precision Hall Effect Latch 3 Package information 0.8 ±0.1 x 45° 0.2 2 A 1.52 ±0.05 1 MAX.1) 7° 3 ±0.06 1.9 MAX. 0.35 ±0.1 x 45° 4.06 ±0.08 3.29 ±0.08 4.16 ±0.05 (0.25) 0.15 MAX. 7° (0.79) 0.6 MAX. 0.2 +0.1 0.4 ±0.05 1.27±0.25 1 2 3 1.27±0.25 18 ±0.5 6 ±0.5 1-1 38 MAX. 9 +0.75 -0.5 23.8 ±0.5 12.7 ±1 A + Adhesive Tape Tape 6.35 ±0.4 1) No solder function area Figure 7 Datasheet 4 ±0.3 12.7 ±0.3 Total tolerance at 10 pitches ±1 0.25 -0.15 0.39 ±0.1 GPO05358 Package outline 10 Rev. 1.1 2020-08 TLE4946-2L High Precision Hall Effect Latch 4 Revision history 4 Revision history Revision History Page Subjects (major changes since last revision) Revision History: 2020-08, Rev 1.1 Previous Revisions: 1.0 10 Datasheet Edited figure 6 (optional: data matrix code) 11 Rev. 1.1 2020-08 Trademarks All referenced product or service names and trademarks are the property of their respective owners. Edition 2020-08 Published by Infineon Technologies AG 81726 Munich, Germany © 2020 Infineon Technologies AG All Rights Reserved. Do you have a question about any aspect of this document? Email: erratum@infineon.com Document reference IFX-enm1597660844002 IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”) . With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. 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