OPTIREG™ linear TLF4277EL
Low drop out linear voltage regulator
Features
•
Integrated current monitor
•
Adjustable current limitation
•
Adjustable output voltage
•
Overvoltage detection
•
Output current up to 200 mA
•
Very low current consumption
•
Very low dropout voltage
•
Wide input voltage range up to 40 V
•
Reverse polarity protection
•
Short circuit protected
•
Overtemperature shutdown
•
Automotive temperature range -40°C ≤ Tj ≤ 150°C
•
Green Product (RoHS and WEEE compliant)
Potential applications
General automotive applications.
Product validation
Qualified for automotive applications. Product validation according to AEC-Q100/101.
Description
The OPTIREG™ linear TLF4277EL is the ideal companion IC to supply active antennas for car infotainment
applications. The adjustable output voltage makes the TLF4277EL capable of supplying the majority of
standard active antennas such as:
•
FM/AM
•
DAB
•
XM
•
SIRIUS
The TLF4277EL is a monolithic integrated low drop out voltage regulator capable of supplying loads up to
200 mA. For an input voltage up to 40 V the TLF4277EL provides an adjustable output voltage in a range from
Datasheet
www.infineon.com/OPTIREG-linear
1
Rev. 1.1
2022-03-08
OPTIREG™ linear TLF4277EL
Low drop out linear voltage regulator
5 V up to 12 V. The integrated current monitor function is a unique feature that provides diagnosis and system
protection functionality. Fault conditions such as overtemperature and output overvoltage are monitored
and indicated at the current sense output. The maximum output current limit of the device is adjustable to
provide additional protection to the connected load.
Via the enable function the IC can be disabled to lower the power consumption. The PG-SSOP14 EP package
provides an enhanced thermal performance within a SO8 body size.
Type
Package
Marking
TLF4277EL
PG-SSOP14 EP
TLF4277
Datasheet
2
Rev. 1.1
2022-03-08
OPTIREG™ linear TLF4277EL
Low drop out linear voltage regulator
Table of contents
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Potential applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Product validation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2
2.1
2.2
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
3.1
3.2
3.3
General product characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4
4.1
4.2
4.3
4.4
Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Description voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Electrical characteristics voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Application information for the setting the variable output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Typical performance characteristics voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5
5.1
5.2
Current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Electrical characteristics current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Typical performance graphs current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
6
6.1
6.1.1
6.1.2
6.1.3
6.1.4
6.2
Current and protection monitor functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional description current and protection monitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Linear current monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Adjustable output current limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Overvoltage detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal shutdown detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical characteristics current and protection monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7
7.1
7.2
Enable function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Description enable function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Electrical characteristics enable function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
8
8.1
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Measurement circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
9
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
10
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Datasheet
3
7
7
8
8
15
15
16
17
17
17
18
Rev. 1.1
2022-03-08
OPTIREG™ linear TLF4277EL
Low drop out linear voltage regulator
Block diagram
1
Block diagram
R SHUNT
VBAT
RCS 1
CS2
CS1
I
TLF4277
Internal
Supply
CI
Bandgap
Reference
ADJ
Current
Monitor
EN
Regulated
Output Voltage
Q
CQ
Protection circuits
BlockDiagram .vsd
CSO
Figure 1
Datasheet
Load
E.g.
Antenna
Amplifier
GND
CSO
R SO
Block and simplified application diagram TLF4277EL (Package PG-SSOP14 EP)
4
Rev. 1.1
2022-03-08
OPTIREG™ linear TLF4277EL
Low drop out linear voltage regulator
Pin configuration
2
Pin configuration
2.1
Pin assignment
CS2
NC
1
14
2
13
Q
NC
CS1
3
12
ADJ
NC
4
11
NC
I
5
10
GND
NC
6
9
NC
CSO
7
8
EN
TLF4277_PINCONFIG_SSOP-14.VSD
Figure 2
Pin configuration (top view)
2.2
Pin definitions and functions
Table 1
Pin definitions and functions
Pin no.
Symbol
Function
1
CS2
Current sense in 2
Current monitor and power stage input.
3
CS1
Current sense in 1
Current monitor input.
5
I
IC supply
Place a capacitor from I (pin 5) to GND close to the IC for compensating line
influences.
7
CSO
Current sense out
Current monitor and status output.
8
EN
Enable
High signal enables the regulator;
Low signal disables the regulator;
Connect to I, if the enable function is not needed.
10
GND
Ground
Connect pin to PCB and heat sink area.
12
ADJ
Voltage adjust
Connect an external voltage divider to configure the output voltage.
14
Q
Regulator output
Connect a capacitor between Q (pin 8) and GND close to the IC pins, respecting the
values given for its capacitance CQ and ESR in Table 3.
Datasheet
5
Rev. 1.1
2022-03-08
OPTIREG™ linear TLF4277EL
Low drop out linear voltage regulator
Pin configuration
Table 1
Pin definitions and functions (cont’d)
Pin no.
Symbol
Function
–
PAD
Heat sink
Connect to PCB heat sink area and GND.
2, 4, 6,
9, 11, 13
NC
Not connected
Internally not connected;
Connect to PCB GND.
Datasheet
6
Rev. 1.1
2022-03-08
OPTIREG™ linear TLF4277EL
Low drop out linear voltage regulator
General product characteristics
3
General product characteristics
3.1
Absolute maximum ratings
Table 2
Absolute maximum ratings
Tj = -40°C to 150°C; all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Parameter
Symbol
Values
Unit Note or Test Condition
Number
Min. Typ. Max.
Voltage ratings
IC supply I
Enable input EN
VI
VEN
-42
-42
–
45
–
45
V
1)
P_4.1.1
V
1)
P_4.1.2
P_4.1.3
Voltage adjust input ADJ
VADJ
-0.3
–
10
V
1)
Regulator output Q
VQ
-1
–
40
V
1)
P_4.1.4
V
1)
P_4.1.5
P_4.1.6
Current monitor input CS1
VCS1
-42
–
45
Current monitor input CS2
VCS2
-42
–
45
V
1)
Current monitor out CSO
VCSO
-0.3
–
5
V
1)
P_4.1.7
Tj
-40
–
150
°C
1)
P_4.1.8
P_4.1.9
Temperatures
Junction temperature
Storage temperature
Tstg
-55
–
150
°C
1)
VESD
-2
–
2
kV
HBM 1)2)
P_4.1.10
kV
1)3)
P_4.1.11
ESD susceptibility
ESD resistivity to GND
ESD resistivity
VESD
-1
–
1
CDM
1) Not subject to production test, specified by design.
2) ESD susceptibility, HBM according to AEC-Q-100-002-JESD22-A114.
3) ESD susceptibility, Charged Device Model “CDM” ESDA STM5.3.1.
Notes
1. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
datasheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not
designed for continuous repetitive operation.
2. Stresses above the ones listed her may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Datasheet
7
Rev. 1.1
2022-03-08
OPTIREG™ linear TLF4277EL
Low drop out linear voltage regulator
General product characteristics
3.2
Functional range
Table 3
Functional range
Parameter
Symbol
Values
Unit Note or Test Condition Number
Min.
Typ. Max.
Input voltage
VI
5
–
40
V
–
P_4.2.1
Input voltage power stage
VCS2
VQ + 0.5 –
40
V
VQ = VCS2 - VDr
P_4.2.2
Differential input voltage
VSHUNT
0
–
0.5
V
VSHUNT = VBAT - VCS2
P_4.2.3
Output voltage range
VQ
5
–
12
V
–
P_4.2.4
Reference Resistor
RCS1
100
–
1000 Ω
–
P_4.2.5
Current sense output resistor
RCSO
1
–
5
kΩ
–
P_4.2.6
Current sense output capacitor
CCSO
1
–
4.7
µF
–
P_4.2.7
Junction temperature
Tj
-40
–
150
°C
–
P_4.2.8
µF
1)
P_4.2.9
Ω
2)
P_4.2.10
Output capacitor requirements
CQ
ESRCQ
10
–
–
–
–
3
1) The minimum output capacitance requirement is applicable for a worst case capacitance tolerance of 30%.
2) Relevant ESR value at f = 10 kHz.
Note:
Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics
table.
3.3
Thermal resistance
Table 4
Thermal resistance
Parameter
Symbol
Values
Unit Note or Test Condition
Number
Min. Typ. Max.
Junction to case
RthJC
–
–
10
K/W
Measured to the exposed pad 1)
P_4.3.1
Junction to ambient
RthJA
–
150
–
K/W
Footprint only 1)2)
P_4.3.2
2
–
64
–
K/W
300 mm PCB
heat sink area 2)
P_4.3.3
–
55
–
K/W
600 mm2 PCB
heat sink area 2)
P_4.3.4
–
50
–
K/W
2s2p PCB 3)
P_4.3.5
1) Not subject to production test, specified by design.
2) Specified RthJA value is according to Jedec JESD 51-3 at natural convection on FR4 1s0p board; The Product
(Chip+Package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 1 copper layer (1 × 70 µm Cu).
3) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product
(Chip+Package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 2 inner copper layers (2 × 70 µm Cu,
2 × 35 µm Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.
Datasheet
8
Rev. 1.1
2022-03-08
OPTIREG™ linear TLF4277EL
Low drop out linear voltage regulator
Voltage regulator
4
Voltage regulator
4.1
Description voltage regulator
The output voltage VQ is controlled by comparing the feedback voltage (VADJ) to an internal reference voltage
and driving a PNP pass transistor accordingly. The control loop stability depends on the output capacitor CQ,
the output capacitor ESR, the load current and the chip temperature. To ensure stable operation, the output
capacitor’s capacitance and its equivalent series resistor ESR requirements given in the Table 3.2 have to be
maintained. For stability details please refer to the typical performance graph Output capacitor series
resistivity ESRCQ vs. output current IQ. In addition the output capacitor may need to be sized larger to
buffer load transients.
An input capacitor CI is not needed for the control loop stability, but recommended to buffer line influences.
Connect the capacitors close to the IC terminals. In general a buffered supply voltage is recommended for the
device. For details see Chapter 8.1.
Protection circuitry prevents the IC as well as the application from destruction in case of catastrophic events.
The integrated safeguards consist of output current limitation, reverse polarity protection as well as thermal
shutdown in case of overtemperature.
In order to avoid excessive power dissipation that could never be handled by the pass element and the
package, an integrated safe operation monitor lowers the maximum output current input voltages above
VBAT = 22 V.
The thermal shutdown circuit prevents the IC from immediate destruction under fault conditions (e.g. output
continuously short-circuited) by switching off the power stage. After the chip has cooled down, the regulator
restarts. This leads to an oscillatory behavior of the output voltage until the fault is removed. However,
junction temperatures above 150°C are outside the maximum ratings and therefore significantly reduce the
IC lifetime.
The TLF4277EL allows a negative supply voltage. However, several small currents are flowing into the
IC increasing its junction temperature. This reverse current has to be considered for the thermal design,
respecting that the thermal protection circuit is not operating during reverse polarity condition.
ICS2
CS2
Q
Regulated
Output Voltage
IQ
R1
Saturation Control
Current Limitation
ADJ
CQ
LOAD
Temperature
Shutdown
BlockDiagram_VoltageRegulator.vsd
Bandgap
Reference
R2
GND
Figure 3
Block diagram voltage regulator circuit
Datasheet
9
Rev. 1.1
2022-03-08
OPTIREG™ linear TLF4277EL
Low drop out linear voltage regulator
Voltage regulator
4.2
Table 5
Electrical characteristics voltage regulator
Electrical characteristics: voltage regulator
VBAT = 13.5 V, Tj = -40°C to 150°C, all voltages with respect to ground, direction of currents as shown in Figure 7
(unless otherwise specified)
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit
Note or
Test Condition
Number
Reference voltage
VREF,int
–
1.22
–
V
1)
P_5.2.1
Output voltage tolerance
VQ
-2
–
2
%
1 mA ≤ IQ ≤ 200 mA;
9 V ≤ VBAT ≤ 16 V 2)
P_5.2.2
-2
–
2
%
1 mA ≤ IQ ≤ 150 mA;
6 V ≤ VBAT ≤ 16 V 2)
P_5.2.3
-2
–
2
%
1 mA ≤ IQ ≤ 100 mA;
16 V ≤ VBAT ≤ 32 V 2)3)
P_5.2.4
-2
–
2
%
1 mA ≤ IQ ≤ 10 mA;
32 V ≤ VBAT ≤ 45 V 2)3)
P_5.2.5
Load regulation
steady-state
∆VQ,load
-30
-5
–
mV
IQ = 1 mA to 150 mA;
VBAT = 6 V
VQ = 5 V
P_5.2.6
Line regulation
steady-state
∆VQ,line
–
5
20
mV
VBAT = 6 V to 32 V;
IQ = 5 mA
VQ = 5 V
P_5.2.7
Power supply ripple
rejection
PSRR
60
65
–
dB
fripple = 100 Hz;
Vripple = 1 Vpp
P_5.2.8
Dropout voltage
VDr = VCS2 - VQ
VDr
–
120
250
mV
IQ = 50 mA 4)
P_5.2.9
–
250
500
mV
IQ = 150 mA 4)
P_5.2.10
Output current limitation
IQ,max
300
–
600
mA
0 V ≤ VQ ≤ 0.95 × VQ,nom;
CSO pin connected to
GND
P_5.2.11
Reverse current
IQ
-2
-1
–
mA
VBAT = VCS2 = 0 V;
VQ = 5 V
P_5.2.12
Reverse current
at negative input voltage
IBAT
-10
-6
–
mA
VBAT = -16 V;
VQ = 0 V
P_5.2.13
Overtemperature shutdown Tj,sd
threshold
151
–
200
°C
Tj increasing 1)
P_5.2.14
Overtemperature shutdown Tj,hy
threshold hysteresis
–
25
–
K
Tj decreasing 1)
P_5.2.15
1)
2)
3)
4)
Parameter not subject to production test; specified by design.
Referring to the device tolerance only, the tolerance of the resistor divider can cause additional deviation.
See typical performance graph for details.
Measured when the output voltage VQ has dropped 100 mV from its nominal value.
Datasheet
10
Rev. 1.1
2022-03-08
OPTIREG™ linear TLF4277EL
Low drop out linear voltage regulator
Voltage regulator
4.3
Application information for the setting the variable output voltage
The output voltage of the TLF4277EL can be adjusted between 5 V and 12 V by an external output voltage
divider, closing the control loop to the voltage adjust pin ADJ.
The voltage at pin ADJ is compared to the internal reference of typical 1.22 V in an error amplifier. It controls
the output voltage.
Q
IQ
R1
Saturation Control
Current Limitation
ADJ
CQ
Bandgap
Reference
GND
BD_VoltageRegulator _Adjust.vsd
Figure 4
R2
Application detail external components at output for variable voltage regulator
The output voltage is calculated according to Equation (4.1):
VQ = (R1 + R2)/R2 × VREF,int, neglecting IADJ
(4.1)
VREF,int is typically 1.22 V.
To avoid errors caused by leakage current IADJ, we recommend to choose the resistor value for R2 < 27 kΩ.
The accuracy of the resistors for the external voltage divider can lead to a higher tolerance of the output
voltage.To achieve a reasonable accuracy resistors with a tolerance of 1% or lower are recommended for the
feedback divider.
Datasheet
11
Rev. 1.1
2022-03-08
OPTIREG™ linear TLF4277EL
Low drop out linear voltage regulator
Voltage regulator
4.4
Typical performance characteristics voltage regulator
Reference voltage VREF,int vs.
junction temperature Tj
Output capacitor series resistivity ESRCQ vs.
output current IQ
V ref_Tj. v s d
1.23
E S R-IQ .v s d
100
ESR(C Q)[Ω]
Vref,int [V]
Unstable
Region
10
1.22
Stable
Region
1
1.21
C Q = 10 µF
0,1
T j = -40 ..150 °C
V I = 6..28 V
1.20
-40
0 ,01
0
40
80
150
120
TJ [°C]
Dropout voltage VDr vs.
output current IQ
50
100
150
200
IQ [mA]
Power supply ripple rejection PSRR
P S RR. v s d
100
V dr-Tj .v s d
300
Vdr [mV ]
0
T j = -40 °C
PSRR [dB]
I Q = 150 mA
T j = 25 °C
T j = 150 °C
70
200
I Q= 50 mA
50
150
100
30
I Q = 10 mA
C Q = 10 µF
ceramic
50
V I = 13. 5 V
10
-40
0
40
80
120
150
0,01
T J [°C]
Datasheet
V ripple = 0.5 Vpp
0,1
1
10
100
f [kHz]
12
Rev. 1.1
2022-03-08
OPTIREG™ linear TLF4277EL
Low drop out linear voltage regulator
Current consumption
5
Current consumption
5.1
Electrical characteristics current consumption
Table 6
Electrical characteristics: current consumption
VBAT = 13.5 V, Tj = -40°C to 150°C, all voltages with respect to ground; direction of currents as shown in Figure 7
(unless otherwise specified)
Parameter
Current consumption
Current consumption
Datasheet
Symbol
Iq,on
Iq,off
Values
Unit
Note or Test Condition
Number
Min.
Typ.
Max.
–
150
200
µA
IQ ≤ 200 µA; Tj ≤ 25°C;
VEN = 5 V;
Iq = II + ICS2 - IQ
P_6.1.1
–
175
250
µA
IQ ≤ 200 µA; Tj ≤ 85°C;
VEN = 5 V;
Iq = II + ICS2 - IQ
P_6.1.2
–
1.2
2.6
mA
IQ = 50 mA;
VEN = 5 V;
Iq = II + ICS2 - IQ
P_6.1.3
–
3.5
6
mA
IQ = 100 mA;
VEN = 5 V;
Iq = II + ICS2 - IQ
P_6.1.4
–
5
10
mA
IQ = 150 mA;
VEN = 5 V;
Iq = II + ICS2 - IQ
P_6.1.5
–
–
3
µA
Tj ≤ 25°C;
VEN = 0.8 V;
Iq = II + ICS2 - IQ
P_6.1.6
–
–
5
µA
Tj ≤ 85°C;
VEN = 0.8 V;
Iq = II + ICS2 - IQ
P_6.1.7
13
Rev. 1.1
2022-03-08
OPTIREG™ linear TLF4277EL
Low drop out linear voltage regulator
Current consumption
5.2
Typical performance graphs current consumption
Current consumption Iq,off vs.
junction temperature Tj
Current consumption Iq,on vs.
junction temperature Tj
Iq,off-Tj.vsd
3,0
Iq [µA ]
2,0
250
1,5
150
1,0
100
0,5
50
-20
0
20
40
60
80
VBAT = 13 .5 V
VEN = 5 V
IQ = 200 µA
Iq [µA ]
VBAT = 13.5 V
VEN = 0 .8 V
- 40
Iq-Tj(IQ200µA ).vsd
300
100
- 40
T J [°C]
0
40
80
120
150
T J [°C]
Current consumption Iq,on vs.
output current IQ
Iq-IQ.vsd
4,5
Iq [mA ]
T= 85°C
VBAT = 13.5 V
VEN = 5 V
3,0
2,5
T= 25°C
2,0
1,5
1,0
0,5
0
40
80
120
160
IQ [mA]
Datasheet
14
Rev. 1.1
2022-03-08
OPTIREG™ linear TLF4277EL
Low drop out linear voltage regulator
Current and protection monitor functions
6
Current and protection monitor functions
6.1
Functional description current and protection monitors
The TLF4277EL provides a set of advanced monitor functionality. The current flowing into the power stage can
be monitored at the CSO output. In addition the current limitation can be adjusted via external resistors.
Events of the implemented protection functions are reported through dedicated voltage levels at the
CSO output. This information can be processed by an external µC for system analysis and failure
identification. The monitored events are over-current, overvoltage, and temperature shutdown.
RSHUNT
V BAT
R CS1
ICS 1
I CS2
C S1
C S2
to pow er stage
C urrent
M onitor
M onitor C ircuits
OC -D etection
OV- D etection
Buffer
T SD -D etection
Current _ Monitor .vsd
GN D
C SO
I CSO
C CSO
Figure 5
R CSO
Block diagram current and protection monitor
To reduce possible effects from the supply voltage VBAT additional filtering in of the supply voltage is
recommended. A combination of a 100 nF capacitor and an additional buffer capacitor of 10 µF or higher
should be placed as close a possible to the IC terminal, which are connected to VBAT.
Figure 6 shows the output level at the CSO pin versus the operation or fault condition. The graph is valid for
the following set up of external components:
RSHUNT = 1 Ω
RCS1 = 100 Ω
CCSO = 2.2 µF
RCSO = 1.5 kΩ
Datasheet
15
Rev. 1.1
2022-03-08
OPTIREG™ linear TLF4277EL
Low drop out linear voltage regulator
Current and protection monitor functions
VCSO
[V]
3,2
Short Circuit to V BAT
3.1 V typical
3,0
2,95
Thermal Shut Down
2.80 V typical
2,65
Current limitation and SC to GND
2.55 V typical
2,45
Linear Current Sense Band
up to 2.45 V
0
Figure 6
6.1.1
163 170
ICS2
[mA]
Output levels and functionality of the CSO output1)
Linear current monitor
Inside the linear current monitor area the current driven out of the CSO pin is proportional to the voltage
which is measured between pin CS1 and CS2.
The level of the current ICSO can be adjusted according to Equation (6.1):
Adjustment ICSO
(6.1)
V BAT – V CS2
R SHUNT
I CSO = -------------------------------- = I CS2 × -------------------R CS1
R CS1
Adjustment of the voltage level for VCSO
(6.2)
R CSO
( V BAT – V CS2 ) × R CSO
V CSO = --------------------------------------------------------- = V SHUNT × ------------R CS1
R CS1
1) The graph is just an example and only valid for an certain configuration of the external components.
Datasheet
16
Rev. 1.1
2022-03-08
OPTIREG™ linear TLF4277EL
Low drop out linear voltage regulator
Current and protection monitor functions
6.1.2
Adjustable output current limitation
The TLF4277EL has an adjustable current limitation for the current flowing into the power stage (pin CS2). If
the level of the voltage drop across the sense resistor RSHUNT is higher than the desired linear monitor range the
output current of the TLF4277EL will be limited.
Setting of the adjustable current limitation
(6.3)
2.55V × R CS1
I CS2,lim = --------------------------------------R SHUNT × R CSO
A voltage level as defined in VCSO,cur_lim will be applied at the CSO pin.
To achieve a current limitation of 170 mA the following configuration can be used:
(6.4)
2.55V × 100Ω
I CS2,lim = ----------------------------------- = 170mA
1Ω × 1.5kΩ
RSHUNT = 1 Ω
RCS1 = 100 Ω
RCSO = 1.5 kΩ
6.1.3
Overvoltage detection
To detect a possible short circuit of the output to a higher supply rail the TLF4277EL has an overvoltage
detection implemented. An overvoltage will be detected, if the voltage level at the ADJ pin is 20% higher than
the internal reference voltage VREF,int defined in Table 5.
Under this condition the CSO pin will be driven through an internal voltage buffer with a voltage level as
defined in VCSO,OV.
6.1.4
Thermal shutdown detection
If the junction temperature will exceed the limits defined in the Table 5 the TLF4277EL will disable the output
voltage. In this case a voltage level as defined in VCSO,TSD will be applied at the CSO pin.
Datasheet
17
Rev. 1.1
2022-03-08
OPTIREG™ linear TLF4277EL
Low drop out linear voltage regulator
Current and protection monitor functions
6.2
Table 7
Electrical characteristics current and protection monitor
Electrical characteristics: current monitor function
VBAT = 13.5 V, Tj = -40°C to 150°C, all voltages with respect to ground, direction of currents as shown in Figure 7
(unless otherwise specified)
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit Note or
Test Condition
0.08
0.1
0.12
mA
(VSHUNT = 50 mV)
0.47
0.5
0.53
mA
(VSHUNT = 100 mV)
0.97
1
1.03
mA
(VSHUNT = 150 mV)
1.45
1.5
1.55
mA
Number
P_7.2.1
Linear Current Monitor
Current sense output current ICSO
(VSHUNT = 10 mV)
ICSO
Tj =25°C
RSHUNT = 1 Ω
RCS1 = 100 Ω
RCSO = 1.5 kΩ 1)
P_7.2.2
P_7.2.3
P_7.2.4
Adjustable current limitation
Adjustable current limit
ICS2,lim
162
170
187
mA
RSHUNT = 1 Ω
RCS1 = 100 Ω
RCSO = 1.5 kΩ
VQ < 0,95 × VQ,nom1)
P_7.2.5
CSO voltage level
Current limitation
VCSO,cur_lim 2.45
2.55
2.65
V
RSHUNT = 1 Ω
RCS1 = 100 Ω
RCSO = 1.5 kΩ
VQ < 0,95 × VQ,nom1)
P_7.2.6
3.0
3.1
3.2
V
VADJ > 1.2 × VREF,nom1) P_7.2.7
2.65
2.8
2.95
V
150°C < Tj < 180°C 2)
Output level overvoltage detected
CSO voltage level
Overvoltage detected
VCSO,OV
Output level overtemperature detected
CSO voltage level
Overtemperature detected
VCSO,TSD
P_7.2.8
1) Referring to the device tolerance only, the tolerance of the external components can cause additional deviation.
2) Specified by design; not subject to production test.
Datasheet
18
Rev. 1.1
2022-03-08
OPTIREG™ linear TLF4277EL
Low drop out linear voltage regulator
Enable function
7
Enable function
7.1
Description enable function
The TLF4277EL can be turned on or turned off via the EN Input. With voltage levels higher than VEN,high applied
to the EN input the device will be completely turned on. A voltage level lower than VEN,low sets the device to low
quiescent current mode. In this condition the device is turned off and is not functional. The enable input has
an build in hysteresis to avoid toggling between ON/OFF state, if signals with slow slope are applied to the
input.
7.2
Electrical characteristics enable function
Table 8
Electrical characteristics: enable function
VBAT = 13.5 V, Tj = -40°C to 150°C, all voltages with respect to ground, direction of currents as shown in Figure 7
(unless otherwise specified)
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit
Note or
Test Condition
Number
Enable
Low signal valid
VEN,low
–
–
0.8
V
–
P_8.2.1
Enable
High signal valid
VEN,high
2
–
–
V
VQ settled
P_8.2.2
Enable
Threshold hysteresis
VEN,hyst
50
–
–
mV
–
P_8.2.3
Enable
Input current
IEN
–
–
2
µA
VEN = 5 V
P_8.2.4
Enable
Internal pull-down resistor
REN
3
4.5
6
MΩ
–
P_8.2.5
Datasheet
19
Rev. 1.1
2022-03-08
OPTIREG™ linear TLF4277EL
Low drop out linear voltage regulator
Application information
8
Application information
8.1
Measurement circuit
I BAT
RSHUNT
R CS1
II
VBAT
I
I CS1
I CS2
CS1
CS2
TLF4277
Q
IQ
Internal
Supply
CI
I EN
VSHUNT
R1
ADJ
Current
Monitor
EN
CQ
Monitor
Circuits
VEN
Measuring _Circuit. vsd
I ADJ
R2
VQ
RL
VAdj
GND
CSO
I CSO
CSO
Figure 7
R SO
V CSO
Measuring circuit
Measurement set up:
RSHUNT = 1 Ω
RCS1 = 100 Ω
CCSO = 2.2 µF
RCSO = 1.5 kΩ
R1 = 38 kΩ
R2 = 12 kΩ
CQ = 10 µF
Datasheet
20
Rev. 1.1
2022-03-08
OPTIREG™ linear TLF4277EL
Low drop out linear voltage regulator
Package information
9
Package information
0.15 M C A-B D 14x
0.64 ±0.25
1
8
1
7
0.2
M
D 8x
Bottom View
3 ±0.2
A
14
6 ±0.2
D
Exposed
Diepad
B
0.1 C A-B 2x
14
7
8
2.65 ±0.2
0.25 ±0.05 2)
0.08 C
8˚ MAX.
C
0.65
0.1 C D
0.19 +0.06
1.7 MAX.
Stand Off
(1.45)
0 ... 0.1
0.35 x 45˚
3.9 ±0.11)
4.9 ±0.11)
Index Marking
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Does not include dambar protrusion
PG-SSOP-14-1,-2,-3-PO V02
Figure 8
PG-SSOP14 EP1)
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant
with government regulations the device is available as a green product. Green products are RoHS-Compliant
(i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
Further information on packages
https://www.infineon.com/packages
1) Dimensions in mm
Datasheet
21
Rev. 1.1
2022-03-08
OPTIREG™ linear TLF4277EL
Low drop out linear voltage regulator
Revision history
10
Revision history
Revision
Date
Changes
1.1
2022-03-08
Updated layout and structure.
Editorial changes.
1.02
2011-07-04
Updated cover page.
Fixed linear current monitor formulas (2,3) on Page 16.
1.01
2011-05-07
Template update.
1.0
2009-05-07
Initial release.
Datasheet
22
Rev. 1.1
2022-03-08
Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
Edition 2022-03-08
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2022 Infineon Technologies AG.
All Rights Reserved.
Do you have a question about any
aspect of this document?
Email: erratum@infineon.com
Document reference
Z8F50375402
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