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FIN1027_09

FIN1027_09

  • 厂商:

    FAIRCHILD(仙童半导体)

  • 封装:

  • 描述:

    FIN1027_09 - 3.3V LVDS, 2-Bit, High-Speed, Differential Driver - Fairchild Semiconductor

  • 数据手册
  • 价格&库存
FIN1027_09 数据手册
FIN1027 / FIN1027A — 3.3V LVDS, 2-Bit, High-Speed, Differential Driver April 2009 FIN1027 / FIN1027A — 3.3V LVDS, 2-Bit, High-Speed, Differential Driver Description Features Greater than 600Mbs Data Rate 3V Power Supply Operation 5ns Maximum Differential Pulse Skew 1.5ns Maximum Propagation Delay Low Power Dissipation Power-Off Protection Meets or Exceeds the TIA/EIA-644 LVDS Standard Flow-through Pinout Simplifies PCB Layout This dual driver is designed for high-speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350mV, which provides low EMI at ultra-low power dissipation, even at high frequencies. This device is ideal for high-speed transfer of clock or data. The FIN1027 or FIN1027A can be paired with its companion receiver, the FIN1028, or with any other LVDS receiver. Ordering Information Part Number FIN1027M FIN1027MX FIN1027K8X FIN1027AMX Operating Temperature Range -40 to +85°C -40 to +85°C -40 to +85°C -40 to +85°C Eco Status Green Green RoHS Green Package 8-Lead Small Outline Package (SOIC) JEDEC MS-012, 0.150 inch Narrow 8-Lead Small Outline Package (SOIC) JEDEC MS-012, 0.150 inch Narrow 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide 8-Lead Small Outline Package (SOIC) JEDEC MS-012, 0.150 inch Narrow Packing Method Trays Tape and Reel Tape and Reel Tape and Reel For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. © 2001 Fairchild Semiconductor Corporation FIN1027 / FIN1027 • Rev. 1.0.3 www.fairchildsemi.com FIN1027 / FIN1027A — 3.3V LVDS, 2-Bit, High-Speed, Differential Driver Pin Configuration Figure 1. FIN1027 SOIC Pin Assignment (Top View) Figure 2. FIN1027A SOIC Pin Assignment (Top View) Figure 3. FIN1027 US8 Pin Assignment (Top View) Pin Definitions Name VCC DIN1 DIN2 GND DOUT2DOUT2+ DOUT1+ DOUT1- Pin # FIN1027 SOIC 1 2 3 4 5 6 7 8 Pin # FIN1027A SOIC 1 2 3 4 5 6 8 7 Pin # FIN1027 US8 8 7 6 5 4 3 2 1 Description Power Supply LVTTL Data Input LVTTL Data Input Ground Inverting Driver Output Non-Inverting Driver Output Non-Inverting Driver Output Inverting Driver Output Function Table Input DIN LOW HIGH OPEN DOUT+ LOW HIGH LOW Outputs DOUTHIGH LOW HIGH © 2001 Fairchild Semiconductor Corporation FIN1027 / FIN1027A • Rev. 1.0.3 www.fairchildsemi.com 2 FIN1027 / FIN1027A — 3.3V LVDS, 2-Bit, High-Speed, Differential Driver Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VCC DIN DOUT IOSD TSTG TJ TL ESD Parameter Supply Voltage DC Input Voltage DC Output Voltage Driver Short-Circuit Current Storage Temperature Range Maximum Junction Temperature Lead Temperature, Soldering, 10 Seconds Human Body Model, JESD22-A114 Machine Model, JESD22-A115 Min. -0.5 -0.5 -0.5 Continuous -65 Max. 4.6 6.0 4.7 +150 +150 +260 ≥6500 ≥400 Unit V V V mA °C °C °C V Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol VCC VIN TA Input Voltage Parameter Supply Voltage Operating Temperature Min. 3.0 0 -40 Max. 3.6 VCC +85 Unit V V °C © 2001 Fairchild Semiconductor Corporation FIN1027 / FIN1027A • Rev. 1.0.3 www.fairchildsemi.com 3 FIN1027 / FIN1027A — 3.3V LVDS, 2-Bit, High-Speed, Differential Driver DC Electrical Characteristics All typical values are at TA = 25°C and VCC = 3.3V. Over-supply voltage and operating temperature ranges, unless otherwise noted. Symbol VOD ΔVOD VOS ΔVOS IOFF IOS VIH VIL IIN II(OFF) VIK ICC CIN COUT Parameter Output Differential Voltage VOD Magnitude Change from Differential LOW-to-HIGH Offset Voltage Offset Magnitude Change from Differential LOW-to-HIGH Power-Off Output current Short-Circuit Output Current Input HIGH Voltage Input LOW Voltage Input Current Power-Off Input Current Input Clamp Voltage Power Supply Current Input Capacitance Output Capacitance Conditions Min. 250 Typ. 350 Max. 450 25 Units mV mV V mV µA mA V V µA µA V mA mA pF pF RL = 100Ω, Figure 4 1.125 1.250 1.375 25 VCC = 0V, VOUT = 0V or 3.6V VOUT = 0V VOD = 0V 2.0 GND VIN = 0V or VCC VCC = 0V, VIN = 0V or 3.6V IIK = -18mA No Load, VIN = 0V or VCC RL = 100Ω, VIN = 0V or VCC 4 6 -1.5 ±20 -8 ±8 VCC 0.8 ±20 ±20 12.5 17.0 AC Electrical Characteristics All typical values are at TA = 25°C and VCC = 3.3V. Over-supply voltage and operating temperature ranges, unless otherwise noted. Symbol tPLHD tPHLD tTLHD tTHLD tSK(P) tSK(LH), tSK(HL) tSK(PP) Parameter Differential Propagation Delay, LOW-to-HIGH Differential Propagation Delay, HIGH-to-LOW Differential Output Rise Time (20% to 80%) Differential Output Fall Time (80% to 20%) Pulse Skew ⏐tPLH - tPHL⏐ Channel-to-Channel Skew Part-to-Part Skew (2) (1) Conditions Min. 0.5 0.5 Typ. Max. 1.5 1.5 1.0 1.0 0.5 0.3 1.0 Units ns ns ns ns ns ns ns RL = 100Ω, CL = 10pF, Figure 5, Figure 6 0.4 0.4 Notes: 1. tSK(LH), tSK(HL) is the skew between specified outputs of a single device when the outputs have identical loads and are switching in the same direction. 2. tSK(PP) is the magnitude of the difference in propagation delay times between any specified terminals of two devices switching in the same direction (either LOW-to-HIGH or HIGH-to-LOW) when both devices operate with the same supply voltage, same temperature, and have identical test circuits. © 2001 Fairchild Semiconductor Corporation FIN1027 / FIN1027A • Rev. 1.0.3 www.fairchildsemi.com 4 FIN1027 / FIN1027A —3.3V LVDS, 2-Bit, High-Speed, Differential Driver Test Diagrams Figure 4. Differential Driver DC Test Circuit Note A: All input pulses have frequency = 10MHz, tR or tF =2ns. Note B: CL includes all probe and fixture capacitances. Figure 5. Differential Driver Propagation Delay and Transition Time Test Circuit Figure 6. AC Waveforms © 2001 Fairchild Semiconductor Corporation FIN1027 / FIN1027A • Rev. 1.0.3 www.fairchildsemi.com 5 FIN1027 / FIN1027A —3.3V LVDS, 2-Bit, High-Speed, Differential Driver Typical Performance Characteristics Figure 7. Output High Voltage vs. Power Supply Voltage Figure 8. Output Low Voltage vs. Power Supply Voltage Figure 9. Output Short Circuit Current vs. Power Supply Voltage Figure 10. Differential Output Voltage vs. Power Supply Voltage Figure 11. Differential Output Voltage vs. Load Resistor Figure 12. Offset Voltage vs. Power Supply Voltage © 2001 Fairchild Semiconductor Corporation FIN1027 / FIN1027A • Rev. 1.0.3 www.fairchildsemi.com 6 FIN1027 / FIN1027A —3.3V LVDS, 2-Bit, High-Speed, Differential Driver Typical Performance Characteristics (Continued) Figure 13. Power Supply Current vs. Frequency Figure 14. Power Supply Current vs. Power Supply Voltage Figure 15. Power Supply Current vs. Ambient Temperature Figure 16. Differential Propagation Delay vs. Power Supply Figure 17. Differential Propagation Delay vs. Ambient Temperature Figure 18. Differential Skew (tPLH-tPHL) vs. Power Supply © 2001 Fairchild Semiconductor Corporation FIN1027 / FIN1027A • Rev. 1.0.3 www.fairchildsemi.com 7 FIN1027 / FIN1027A —3.3V LVDS, 2-Bit, High-Speed, Differential Driver Typical Performance Characteristics (Continued) Figure 19. Differential Pulse Skew (tPLH-tPHL) Figure 20. Transition Time vs. Power Supply Voltage Figure 21. Transition Time vs. Ambient Temperature © 2001 Fairchild Semiconductor Corporation FIN1027 / FIN1027A • Rev. 1.0.3 www.fairchildsemi.com 8 FIN1027 / FIN1027A —3.3V LVDS, 2-Bit, High-Speed, Differential Driver Physical Dimensions 5.00 4.80 3.81 8 5 A 0.65 B 6.20 5.80 4.00 3.80 1.75 5.60 PIN ONE INDICATOR 1 4 1.27 0.25 M (0.33) CBA 1.27 LAND PATTERN RECOMMENDATION 0.25 0.10 1.75 MAX C 0.10 0.51 0.33 0.50 x 45° 0.25 C SEE DETAIL A 0.25 0.19 OPTION A - BEVEL EDGE R0.10 R0.10 GAGE PLANE 0.36 OPTION B - NO BEVEL EDGE NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE CONFORMS TO JEDEC MS-012, VARIATION AA, ISSUE C, B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) LANDPATTERN STANDARD: SOIC127P600X175-8M. E) DRAWING FILENAME: M08AREV13 8° 0° 0.90 0.406 SEATING PLANE (1.04) DETAIL A SCALE: 2:1 Figure 22. 8-Lead, Small Outline Package (SOIC), JEDEC MS-012, 0.150-inch, Narrow Body Click here for tape and reel specifications, available at: http://www.fairchildsemi.com/products/discrete/pdf/soic8_tr.pdf Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2001 Fairchild Semiconductor Corporation FIN1027 / FIN1027A • Rev. 1.0.3 www.fairchildsemi.com 9 FIN1027 / FIN1027A —3.3V LVDS, 2-Bit, High-Speed, Differential Driver Physical Dimensions 0.15 8 5 -A- 1.80 2.70 DETAIL A 3.1±.1 1.55 2.3±0.1 1.00 0.30 TYP 1 4 PIN #1 IDENT. 0.2 C B A ALL LEAD TIPS 0.5 TYP 0.90 MAX ALL LEAD TIPS 0.1 C 0.70±0.10 0.10-0.18 -C0.10 0.00 0.17-0.27 0.50TYP 0.13 AB C 0.4 TYP 3.40 GAGE PLANE -B- 0.70 0°-8° 0.12 A. CONFORMS TO JEDEC REGISTRATION MO-187 B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS. D. DIMENSIONS AND TOLERANCES PER ANSI Y14.5M, 1982. SEATING PLANE DETAIL A MAB08AREVC Figure 23. 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2001 Fairchild Semiconductor Corporation FIN1027 / FIN1027A • Rev. 1.0.3 www.fairchildsemi.com 10 FIN1027 / FIN1027A —3.3V LVDS, 2-Bit, High-Speed, Differential Driver © 2001 Fairchild Semiconductor Corporation FIN1027 / FIN1027A • Rev. 1.0.3 www.fairchildsemi.com 11
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