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291GI-XXLF

291GI-XXLF

  • 厂商:

    IDT

  • 封装:

  • 描述:

    291GI-XXLF - TRIPLE PLL FIELD PROG. SPREAD SPECTRUM CLOCK SYNTHESIZER - Integrated Device Technology

  • 数据手册
  • 价格&库存
291GI-XXLF 数据手册
DATASHEET TRIPLE PLL FIELD PROG. SPREAD SPECTRUM CLOCK SYNTHESIZER ICS291 Description The ICS291 field programmable spread spectrum clock synthesizer generates up to six high-quality, high-frequency clock outputs including multiple reference clocks from a low-frequency crystal input. It is designed to replace crystals, crystal oscillators and stand alone spread spectrum devices in most electronic systems. Using IDT’s VersaClockTM software to configure PLLs and outputs, the ICS291 contains a One-Time Programmable (OTP) ROM for field programmability. Programming features include input/output frequencies, spread spectrum amount, eight selectable configuration registers and up to two sets of three low-skew outputs. Each of the two output groups are powered by a separate VDDO voltage. VDDO may vary from 1.8 V to VDD. Using Phase-Locked Loop (PLL) techniques, the device runs from a standard fundamental mode, inexpensive crystal, or clock. It can replace multiple crystals and oscillators, saving board space and cost. The ICS291 is also available in factory programmed custom versions for high-volume applications. Features • • • • • • • • • • • • • Packaged as 20-pin TSSOP – Pb-free, RoHS compliant Eight addressable registers Replaces multiple crystals and oscillators Output frequencies up to 200 MHz at 3.3 V Configurable Spread Spectrum Modulation Input crystal frequency of 5 to 27 MHz Clock input frequency of 3 to 166 MHz Up to six reference outputs Separate 1.8 to 3.3 V VDDO output level controls for each bank of 3 outputs Up to two sets of three low-skew outputs Operating voltages of 3.3 V Controllable output drive levels Advanced, low-power CMOS process Block Diagram VDD PLL1 with Spread Spectrum Divide Logic and Output Enable Control 3 VDDO1 S2:S0 3 OTP ROM with PLL Values CLK1 CLK2 CLK3 PLL2 CLK4 CLK5 CLK6 PLL3 X1/ICLK Crystal or Clock Input Crystal Oscillator X2 External capacitors are required with a crystal input. 3 GND PDTS VDDO2 IDT™ / ICS™ TRIPLE PLL FIELD PROG. SPREAD SPECTRUM CLOCK SYNTHESIZER 1 ICS291 REV F 051310 ICS291 TRIPLE PLL FIELD PROG. SPREAD SPECTRUM CLOCK SYNTHESIZER EPROM CLOCK SYNTHESIZER Pin Assignment 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 GND S0 S1 VDD VDDO1 CLK1 CLK2 CLK3 GND X1/ICLK S2 VDD PDTS GND CLK6 CLK5 CLK4 VDDO2 VDD X2 20 pin (173 mil) TSSOP Pin Descriptions Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Pin Name GND S0 S1 VDD VDDO1 CLK1 CLK2 CLK3 GND X1/ICLK X2 VDD VDDO2 CLK4 CLK5 CLK6 GND PDTS VDD S2 Pin Type Power Input Input Power Power Output Output Output Power XI XO Power Power Output Output Output Power Input Power Input Connect to ground. Pin Description Select pin 0. Internal pull-up resistor. Select pin 1. Internal pull-up resistor. Connect to +3.3 V. Power supply for outputs CLK1-CLK3. Output clock 1. Weak internal pull-down when tri-state. Output clock 2. Weak internal pull-down when tri-state. Output clock 3. Weak internal pull-down when tri-state. Connect to ground. Crystal input. Connect this pin to a crystal or external input clock. Crystal Output. Connect this pin to a crystal. Float for clock input. Connect to +3.3 V. Power supply for outputs CLK4-CLK6. Output clock 4. Weak internal pull-down when tri-state. Output clock 5. Weak internal pull-down when tri-state. Output clock 6. Weak internal pull-down when tri-state. Connect to ground. Power-down tri-state. Powers down entire chip and tri-states clock outputs when low. Internal pull-up resistor. Connect to +3.3 V. Select pin 2. Internal pull-up resistor. IDT™ / ICS™ TRIPLE PLL FIELD PROG. SPREAD SPECTRUM CLOCK SYNTHESIZER 2 ICS291 REV F 051310 ICS291 TRIPLE PLL FIELD PROG. SPREAD SPECTRUM CLOCK SYNTHESIZER EPROM CLOCK SYNTHESIZER External Components The ICS291 requires a minimum number of external components for proper operation. The ICS291 also provides separate output divide values, from 2 through 63, to allow the two output clock banks to support widely differing frequency values from the same PLL. Each output frequency can be represented as: O utputFreq Series Termination Resistor Clock output traces over one inch should use series termination. To series terminate a 50Ω trace (a commonly used trace impedance), place a 33Ω resistor in series with the clock line, as close to the clock output pin as possible. The nominal impedance of the clock output is 20Ω . = REFFreq ⋅ M ---N Output Drive Control The ICS291 has two output drive settings. For VDDO=VDD, low drive should be selected when outputs are less than 100 MHz. High drive should be selected when outputs are greater than 100 MHz. For VDDO
291GI-XXLF 价格&库存

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