MP4021A
Primary Side Control
Offline LED Controller with Active PFC
The Future of Analog IC Technology
The MP4021A is a primary-side–control offline
LED lighting controller that achieves high power
factor and accurate LED current for isolated
single-power-stage lighting applications in a
single SOIC8 package. The proprietary realcurrent control method accurately controls LED
current from primary-side information. Eliminating
the secondary-side feedback components and
the optocoupler significantly simplifies the LED
lighting system design.
The MP4021A integrates power factor correction
and works in boundary conduction mode to
reduce the MOSFET switching losses.
The extremely low start-up current and quiescent
current reduces the total power consumption and
provides a high-efficiency solution for lighting
applications.
R
EC
The multi-protection features of MP4021A greatly
enhance system reliability and safety. The
MP4021A features over-voltage protection, shortcircuit protection, cycle-by-cycle current limiting,
VCC UVLO, and auto-restart over-temperature
protection.
T
FEATURES
ER N
EW OM
TO
M
D
M E EN
P4 SI D
02 GN ED
6
S F
&
O
R
M
P4
02
7
DESCRIPTION
•
•
•
•
•
•
•
•
•
•
•
•
•
Real current control without secondaryfeedback circuit
Typical ±1.5% load regulation
Unique architecture for superior line
regulation
High power factor≥0.9 over universal input
voltage
Boundary conduction mode improves
efficiency
Ultra-low (20µA) start-up current
Low (1mA) quiescent current
Input UVLO
Cycle-by-cycle current limit
Over-voltage protection
Short-circuit protection
Over-temperature protection
Available in an SOIC8 package
APPLICATIONS
•
•
•
Solid-state lighting
Industrial and commercial lighting
Residential lighting
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Products, Quality Assurance page.
“MPS” and “The Future of Analog IC Technology” are registered trademarks of
Monolithic Power Systems, Inc.
The MP4021A is under patent pending.
R
EF
N
O
TYPICAL APPLICATION
MP4021A Rev.1.05
www.MonolithicPower.com
1/21/2014
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
1
MP4021A—PRIMARY SIDE CONTROL OFFLINE LED CONTROLLER WITH ACTIVE PFC
ORDERING INFORMATION
Part Number*
Package
SOIC8
MP4021GS-A
Top Marking
MP4021-A
ER N
EW OM
TO
M
D
M E EN
P4 SI D
02 GN ED
6
S F
&
O
R
M
P4
02
7
* For Tape & Reel, add suffix –Z (e.g. MP4021GS-A–Z);
PACKAGE REFERENCE
TOP VIEW
MULT
1
8
COMP
ZCD
2
7
FB
VCC
3
6
GND
GATE
4
5
CS
SOIC8
(4)
Thermal Resistance
Input Voltage VCC ......................... -0.3V to +30V
ZCD Pin ............................................ -7V to +7V
Other Analog Inputs and Outputs..... -0.3V to 7V
Max. Gate Current ....................................±1.2A
Continuous Power Dissipation
(TA = +25°C) (2)
SOIC8........................................................1.3W
Junction Temperature.............................. 150°C
Lead Temperature ................................... 260°C
Storage Temperature............... -65°C to +150°C
SOIC8 ...................................96 ...... 45 ...°C/W
R
EC
ABSOLUTE MAXIMUM RATINGS (1)
T
Recommended Operating Conditions
(3)
θJC
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD(MAX)=(TJ(MAX)TA)/ θJA. Exceeding the maximum allowable power dissipation
will cause excessive die temperature, and the regulator will go
into thermal shutdown. Internal thermal shutdown circuitry
protects the device from permanent damage.
3) The device is not guaranteed to function outside of its
operation conditions.
4) Measured on JESD51-7 4-layer board.
R
EF
N
O
Supply Voltage VCC ....................... 10.3V to 23V
Operating Junction Temp. (TJ). -40°C to +125°C
θJA
MP4021A Rev.1.05
www.MonolithicPower.com
1/21/2014
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
2
MP4021A—PRIMARY SIDE CONTROL OFFLINE LED CONTROLLER WITH ACTIVE PFC
ELECTRICAL CHARACTERISTICS
VCC = 14V, TA = +25°C, unless otherwise noted.
Symbol
Operating Range
Turn-on Threshold
Turn-off Threshold
Hysteretic Voltage
Supply Current
Start-up Current
Quiescent Current
Operating Current
Multiplier
Operation Range
Gain
Error Amplifier
Feedback Voltage
Transconductance
(6)
Condition
Min
Typ
Max
VCC
VCC_ON
VCC_OFF
VCC_HYS
After turn on
VCC rising edge
VCC falling edge
ISTARTUP
IQ
ICC
VCC=11V
No switching
Fs =70kHz
10.3
12.6
8.4
13.6
9.0
4.5
20
0.75
2
VMULT
(5)
K
0
VFB
0.403
23
14.6
9.6
V
V
V
V
30
1
3
µA
mA
mA
3
V
1/V
0.425
V
1
GEA
0.414
222
µA/V
Upper Clamp Voltage
VCOMP_H
5.3
5.65
6
Lower Clamp Voltage
VCOMP_L
1.3
1.5
1.7
Max Source Current
Units
ER N
EW OM
TO
M
D
M E EN
P4 SI D
02 GN ED
6
S F
&
O
R
M
P4
02
7
Parameter
Supply Voltage
(6)
V
V
ICOMP
75
µA
ICOMP
-400
µA
Leading Edge Blanking Time
tLEB
280
ns
Current Sense Clamp Voltage
VCS_CLAMP
Max Sink Current
(6)
EC
Current Sense Comparator
2.3
2.5
2.7
V
R
Zero Current Detector
Zero Current Detect threshold
VZCD_T
Zero Current Detect Hysteresis
VZCD_HYS
T
ZCD Blanking Time
N
O
Over-voltage Blanking Time
Over-voltage Threshold
tLEB_ZCD
After turn-off
tLEB_OVP
VZCD_OVP
After turn-off
1.5μs delay after turn-off
After turn-on,
same as tLEB
Over-current Blanking Time
tLEB_OCP
Over-current Threshold
VZCD_OCP
Starter
EF
Minimum Off Time
tOFF_MIN
tSTART
280ns delay after turn-on
0.31
V
650
mV
1.8
2.5
5.1
1.5
5.4
3.2
μs
5.7
μs
V
280
ns
0.57
0.60
0.63
V
2
3.5
5
µs
130
µs
R
Start Timer Period
VZCD falling edge
MP4021A Rev.1.05
www.MonolithicPower.com
1/21/2014
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
3
MP4021A—PRIMARY SIDE CONTROL OFFLINE LED CONTROLLER WITH ACTIVE PFC
ELECTRICAL CHARACTERISTICS (Continued)
VCC = 14V, TA = +25°C, unless otherwise noted.
Symbol
Output Clamp Voltage
Minimum Output Voltage
(6)
Max Source Current
(6)
Max Sink Current
Condition
Min
Typ
Max
Units
ER N
EW OM
TO
M
D
M E EN
P4 SI D
02 GN ED
6
S F
&
O
R
M
P4
02
7
Parameter
Gate Driver
VGATE_CLAMP VCC=23V
VGATE_MIN
VCC=VCC_OFF + 50mV
12
13.5
6.0
15
V
V
IGATE_SOURCE
1
A
IGATE_SINK
-1.2
A
R
EF
N
O
T
R
EC
Notes:
5) The multiplier output is given by: VCS=K•VMULT• (VCOMP-1.5)
6) Guaranteed by design.
MP4021A Rev.1.05
www.MonolithicPower.com
1/21/2014
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
4
MP4021A—PRIMARY SIDE CONTROL OFFLINE LED CONTROLLER WITH ACTIVE PFC
PIN FUNCTIONS
Name
1
MULT
2
ZCD
3
VCC
Pin Function
Multiplier input. Connect this pin to the tap of resistor divider from the rectified voltage of the
AC line. The half-wave sinusoid signal to this pin provides a reference signal for the internal
current control loop.
Zero-current detection. A negative going-edge triggers the turn-on signal of the external
MOSFET. Connect this pin to a resistor divider between the auxiliary winding to GND. Overvoltage condition is detected through ZCD. Every switching turn-off interval, if ZCD voltage
is higher than the over-voltage-protection (OVP) threshold after the 1.5µs blanking time, the
over-voltage protection will trigger and the system will stop switching until auto-restart
comes. ZCD pin can also monitor over-current condition. Connect this pin thru a diode to a
resistor divider between CS to GND. Every switching turn-on interval, if ZCD voltage is
higher than the over-current-protection (OCP) threshold after the 280ns blanking time, the
over-current protection will trigger and the system will stop switching until auto-restart
comes.
Power supply input. This pin supplies the power for the control signal and the high-current
MOSFET grade drive output. Bypass this pin to ground with an external bulk capacitor of
typically 22µF in parallel with a 100pF ceramic cap to reduce noise.
ER N
EW OM
TO
M
D
M E EN
P4 SI D
02 GN ED
6
S F
&
O
R
M
P4
02
7
Pin #
Gate drive output. This totem pole output stage is able to drive a high-power MOSFET with
a peak current of 1A source capability and 1.2A sink capability. The high level voltage of
this pin is clamped to 13.5V to avoid excessive gate drive voltage. And the low level voltage
is higher than 6V to guarantee enough drive capacity.
Current sense. The MOSFET current is sensed via a sensing resistor to its source lead. The
comparison between the resulting voltage and the internal sinusoidal-current reference
signal determines when the MOSFET turns off. A feed-forward from the rectified AC line
voltage connected to the current sense pin maximizes the line regulation. If the pin voltage
is higher than the current limit threshold of 2.5V (after turn-on blanking) the gate drive will
turn off.
GATE
5
CS
6
GND
Ground. Current return for the control signal and the gate drive signal.
7
FB/NC
Feedback signal. Leave this pin floating (NC) for primary-side control.
COMP
Loop compensation input. Connect a compensation network to stabilize the LED drive and
maintain an accurate LED current.
R
EC
4
R
EF
N
O
T
8
MP4021A Rev.1.05
www.MonolithicPower.com
1/21/2014
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
5
MP4021A—PRIMARY SIDE CONTROL OFFLINE LED CONTROLLER WITH ACTIVE PFC
TYPICAL PERFORMANCE CHARACTERISTICS
R
EF
N
O
T
R
EC
ER N
EW OM
TO
M
D
M E EN
P4 SI D
02 GN ED
6
S F
&
O
R
M
P4
02
7
VIN =110VAC/220VAC, 5 LEDs in series, ILED=500mA, Lm=2.2mH, NP:NS:NAUX =144:24:27, unless
otherwise noted.
MP4021A Rev.1.05
www.MonolithicPower.com
1/21/2014
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
6
MP4021A—PRIMARY SIDE CONTROL OFFLINE LED CONTROLLER WITH ACTIVE PFC
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
R
EF
N
O
T
R
EC
ER N
EW OM
TO
M
D
M E EN
P4 SI D
02 GN ED
6
S F
&
O
R
M
P4
02
7
VIN =110VAC/220VAC, 5 LEDs in series, ILED=500mA, Lm=2.2mH, NP:NS:NAUX =144:24:27, unless
otherwise noted.
MP4021A Rev.1.05
www.MonolithicPower.com
1/21/2014
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
7
MP4021A—PRIMARY SIDE CONTROL OFFLINE LED CONTROLLER WITH ACTIVE PFC
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN =110VAC/220VAC, VOUT=30V, IOUT_MAX=330mA, Constant Voltage Control, Lm=2.4mH,
NP:NS:NAUX=205:41:27, unless otherwise noted.
PF
0.6%
0.5%
0.4%
0.3%
0.2%
0.1%
0.0%
-0.1%
-0.2%
-0.3%
-0.4%
-0.5%
-0.6%
80
ER N
EW OM
TO
M
D
M E EN
P4 SI D
02 GN ED
6
S F
&
O
R
M
P4
02
7
LINE REGULATION
Line Regulation
120
160
200
240260
1.00
0.99
0.98
0.97
0.96
0.95
0.94
0.93
0.92
0.91
0.90
0.89
0.88
80
16
14
12
10
8
6
4
2
120
160
200
240 260
0
80
120
160
200
240 260
THD vs. IOUT
1.00
40
0.95
35
0.90
30
0.85
25
0.80
20
0.75
15
0.70
10
0.65
5
0.60
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35
0
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35
R
EF
PF
EC
R
LOAD REGULATION
N
O
T
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35
18
PF vs. IOUT
Load Regulation
8.0%
7.0%
6.0%
5.0%
4.0%
3.0%
2.0%
1.0%
0.0%
-1.0%
-2.0%
-3.0%
-4.0%
-5.0%
20
MP4021A Rev.1.05
www.MonolithicPower.com
1/21/2014
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
8
MP4021A—PRIMARY SIDE CONTROL OFFLINE LED CONTROLLER WITH ACTIVE PFC
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VOUT(AC)
100mV/div.
VCC
5V/div.
VCOMP
1V/div.
R
VOUT
10V/div.
IOUT
200mA/div.
EF
N
O
T
R
EC
VOUT(AC)
500mV/div.
ER N
EW OM
TO
M
D
M E EN
P4 SI D
02 GN ED
6
S F
&
O
R
M
P4
02
7
VIN =110VAC/220VAC, VOUT=30V, IOUT_MAX=330mA, Constant Voltage Control, Lm=2.4mH,
NP:NS:NAUX=205:41:27, unless otherwise noted.
VOUT(AC)
500mV/div.
VOUT(AC)
100mV/div.
VCC
5V/div.
VCOMP
1V/div.
VCC
5V/div.
VCOMP
1V/div.
VOUT
10V/div.
IOUT
5A/div.
VOUT
10V/div.
IOUT
200mA/div.
VCC
5V/div.
VCOMP
1V/div.
VOUT
10V/div.
IOUT
200mA/div.
MP4021A Rev.1.05
www.MonolithicPower.com
1/21/2014
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
9
MP4021A—PRIMARY SIDE CONTROL OFFLINE LED CONTROLLER WITH ACTIVE PFC
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VCOMP
5V/div.
VCOMP
5V/div.
VCC
5V/div.
VCS
500mV/div.
VZCD
1V/div.
R
EF
N
O
T
R
EC
VCC
5V/div.
VCS
500mV/div.
VZCD
1V/div.
ER N
EW OM
TO
M
D
M E EN
P4 SI D
02 GN ED
6
S F
&
O
R
M
P4
02
7
VIN =110VAC/220VAC, VOUT=30V, IOUT_MAX=330mA, Constant Voltage Control, Lm=2.4mH,
NP:NS:NAUX=205:41:27, unless otherwise noted.
MP4021A Rev.1.05
www.MonolithicPower.com
1/21/2014
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
10
MP4021A—PRIMARY SIDE CONTROL OFFLINE LED CONTROLLER WITH ACTIVE PFC
FUNCTION DIAGRAM
EMI
filter
ER N
EW OM
TO
M
D
M E EN
P4 SI D
02 GN ED
6
S F
&
O
R
M
P4
02
7
N:1
GATE
MULT
Control
Multiplier
PWM/PFC
Current control
Gate
driver
Current sense
CS
Current
Sense
COMP
Current
LImit
OTP
Latch off
or
Restart
Protection
Power supply
UVLO
FB/NC
VCC
Real Current
Control
EC
Power Supply
OCP
ZCD
Zero Current
Detection
Zero current detection
Figure 1—MP4021A Function Block Diagram
R
EF
N
O
T
R
GND
OVP
MP4021A Rev.1.05
www.MonolithicPower.com
1/21/2014
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
11
MP4021A—PRIMARY SIDE CONTROL OFFLINE LED CONTROLLER WITH ACTIVE PFC
OPERATION
Start Up
VDS
VBUS +NVOUT
ER N
EW OM
TO
M
D
M E EN
P4 SI D
02 GN ED
6
S F
&
O
R
M
P4
02
7
The MP4021A is a primary-side control offline
LED controller which incorporates all the features
for high-performance LED lighting. The LED
current can be accurately controlled with the real
current control method from the primary-side
information. Active Power Factor Correction
(PFC) eliminates unwanted harmonic noise to
pollute the AC line.
VBUS
turn-on
toff
I pk
Initially, VCC of the MP4021A is charged through
the start up resistor from the AC line. When VCC
reaches 13.6V, the control logic works and the
gate drive signal begins to switch. Then the
power supply is taken over by the auxiliary
winding.
The MP4021A will shut down when VCC drops
below 9V.
I pri
ton
I sec/ N
VZCD
0
Figure 2—Boundary Conduction Mode
Auxiliary Winding
Boundary Conduction Mode Operation
N
O
T
R
EC
During the external MOSFET on time (tON), the
rectified input voltage (VBUS) applies to the
primary-side inductor (Lm), and the primary
current (Ipri) increases linearly from zero to the
peak value (Ipk). When the external MOSFET
turns off, the energy stored in the inductor is
transferred to the secondary-side and turns on
the secondary-side diode to power the load. The
secondary current (Isec) begins to decrease
linearly from the peak value to zero. When the
secondary current decreases to zero, the
primary-side leakage inductance, magnetizing
inductance and all the parasitic capacitances
decrease the MOSFET drain-source voltage—
this decrease is also reflected on the auxiliary
winding (see Figure 2). The zero-current detector
in the ZCD pin generates the turn-on signal of the
external MOSFET when the ZCD voltage falls
below 0.31V (see Figure 3).
R
EF
As a result, there are virtually no primary-switch
turn-on losses and no secondary-diode reverserecover losses. It ensures high efficiency and low
EMI noise.
+
Vcc
RZCD1
ZCD
turn-on
signal
0.31V
RZCD2
CZCD
Figure 3—Zero Current Detector
Real Current Control
The proprietary real-current control method
allows the MP4021A to control the secondaryside LED current from primary-side information.
The mean output LED current can be calculated
approximately as:
Io ≈
N ⋅ VFB
2 ⋅ Rs
N—Turn ratio of primary side to secondary side
VFB—The feedback reference voltage (typical
0.4V)
Rs—The sensing resistor connected between the
MOSFET source and GND.
MP4021A Rev.1.05
www.MonolithicPower.com
1/21/2014
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
12
MP4021A—PRIMARY SIDE CONTROL OFFLINE LED CONTROLLER WITH ACTIVE PFC
Power Factor Correction
ER N
EW OM
TO
M
D
M E EN
P4 SI D
02 GN ED
6
S F
&
O
R
M
P4
02
7
The MULT pin is connected to the tap of the
resistor divider from the rectified instantaneous
line voltage and fed as one input of the Multiplier.
The output of the multiplier will be shaped as
sinusoid too. This signal provides the reference
for the current comparator and comparing with
the primary side inductor current which sets the
primary peak current shaped as sinusoid with the
input line voltage. High power factor can be
achieved.
off, if ZCD fails to send out another turn on signal
after 130µs, the starter will automatically send
out the turn on signal which can avoid the IC
unnecessary shut down by ZCD missing
detection.
Multiplier output
Minimum Off Time
The MP4021A operates with variable switching
frequency, the frequency is changing with the
input instantaneous line voltage. To limit the
maximum frequency and get a good EMI
performance, MP4021A employs an internal
minimum off time limiter—3.5µs, show as Figure
6.
Inductor current
ZCD
Figure 4—Power Factor Correction Scheme
GATE
The maximum voltage of the multiplier output to
the current comparator is clamped to 2.5V to get
a cycle-by-cycle current limitation.
Figure 6—Minimum Off Time
EC
VCC Under-voltage Lockout
T
R
When the VCC voltage drops below UVLO
threshold 9V, the MP4021A stops switching and
totally shuts down, the VCC will restart charging
by the external start up resistor from AC line.
Figure 5 shows the typical waveform of VCC
under-voltage lockout
O
Vcc
Auxiliary Winding Takes Charge
And Regulates the VCC
N
13.6V
3.5us
Protection happens
Leading Edge Blanking
In order to avoid the premature termination of the
switching pulse due to the parasitic capacitance
discharging at MOSFET turning on, an internal
leading edge blanking (LEB) unit is employed
between the CS Pin and the current comparator
input. During the blanking time, the path, CS Pin
to the current comparator input, is blocked.
Figure 7 shows the leading edge blanking.
VCS
9V
tLEB =280 ns
Gate
EF
Switching Pulses
R
Figure 5—VCC Under-Voltage Lockout
t
Auto Starter
The MP4021A integrates an auto starter, the
starter starts timing when the MOSFET is turned
Figure 7—Leading Edge Blanking
MP4021A Rev.1.05
www.MonolithicPower.com
1/21/2014
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
13
MP4021A—PRIMARY SIDE CONTROL OFFLINE LED CONTROLLER WITH ACTIVE PFC
VZCD
Output Over-Voltage Protection (OVP)
VOUT _ OVP ⋅
NAUX
R ZCD2
⋅
= 5.4V
NSEC R ZCD1 + R ZCD2
VOUT_OVP—Output over voltage protection point
NAUX—The auxiliary winding turns
NSEC—The secondary winding turns
Auxiliary Winding
EC
+
Vcc
OVP
signal
Latch
R
5.4V
RZCD1
ZCD
RZCD2
CZCD
T
1.5µs
Blanking
O
Sampling Here
ER N
EW OM
TO
M
D
M E EN
P4 SI D
02 GN ED
6
S F
&
O
R
M
P4
02
7
Output over voltage protection can prevent the
components from damage in the over voltage
condition. The positive plateau of auxiliary
winding voltage is proportional to the output
voltage, the OVP uses the auxiliary winding
voltage instead of directly monitoring the output
voltage, the OVP sample is shown in Figure 8.
Once the ZCD pin voltage is higher than 5.4V,
the OVP signal will be triggered and latched, the
gate driver will be turned off and the IC work at
quiescent mode, the VCC voltage dropped below
the UVLO which will make the IC shut down and
the system restarts again. The output OVP
setting point can be calculated as:
0V
tLEB _OVP
Figure 9—ZCD Voltage and OVP Sample
Output Short Circuit Protection
The MP4021A clamps the CS pin voltage to less
than 2.5V to limit the available output power. If
the short circuit of the secondary-side occurs, the
voltage of the auxiliary winding will fall down
following the voltage of the secondary winding
and the VCC drops to less than UV threshold and
re-start the system.
As supplementary, tie a resistor divider form CS
sensing resistor to ZCD pin, shown in Figure 10.
When the power MOSFET in the primary-side is
turned on, the ZCD pin monitors the rising
primary-side current, once the ZCD pin reaches
OCP threshold, typical 0.6V, the gate driver will
be turned off to prevent the chip form damage
and the IC works at quiescent mode, the VCC
voltage dropped below the UVLO which will
make the IC shut down and the system restarts
again. Please note that the value of the resistors
to set the OCP threshold (ROCP1 & ROCP2) should
be much smaller than those of the ZCD zerocurrent detector (RZCD1 & RZCD2)
Primary Winding
VBUS
Figure 8—OVP Sample Unit
N
To avoid the mis-trigger OVP by the oscillation
spike after the switch turns off, the OVP sampling
has a tLEB_OVP blanking period, typical 1.5µs,
shown in Figure 9.
R
EF
The current-limiting resistor between the output
of the aux-winding and the ZCD resistor divider
can also work as suppresser to avoid the OVP
mis-trigger.
GATE
PSR
control
RCS
ROCP1
ZCD
OCP
signal
Latch
CS
0 .6 V
D
ROCP2
280ns
Blanking
Figure 10—OCP Sample Unit
MP4021A Rev.1.05
www.MonolithicPower.com
1/21/2014
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
14
MP4021A—PRIMARY SIDE CONTROL OFFLINE LED CONTROLLER WITH ACTIVE PFC
The primary-side OCP setting point can be
calculated as:
R OCP2
− VD = 0.6V
ROCP1 + ROCP2
ER N
EW OM
TO
M
D
M E EN
P4 SI D
02 GN ED
6
S F
&
O
R
M
P4
02
7
IPRI _ OCP ⋅ RCS ⋅
Compensation for Wide Output Voltage
For wide output voltage applications, sample
VCC level thru a resistor to COMP pin. Since the
output voltage of AUX-winding follows the output
voltage, the resistor can import output voltage
information to COMP level to compensate the
LED current variation with different LED voltage
drop. The typical COMP source current is only
75µA and the tolerance could affect the action of
the compensation. So the inject current form
VCC should be smaller than 10µA. The
compensation resistor should be larger than 3MΩ.
IPRI_OCP—Primary-side over current protection
point.
For some applications, the primary-side
inductance value is very small, the minimal-off
time feature could make the system work in DCM
at the zero-crossing of the BUS voltage. To
improve the OCP function in this condition,
please remove CZCD and reduce the value of
RZCD1 and RZCD2 proportionally.
For the design example, please refer to MPS
application note AN059 for the detailed design
procedure and information.
R
EF
N
O
T
R
EC
Thermal Shut Down
To prevent from any lethal thermal damage,
when the inner temperature exceeds OTP
threshold, the MP4021A shuts down switching
cycle and latched until VCC drop below UVLO
and restart again.
Design Example
MP4021A Rev.1.05
www.MonolithicPower.com
1/21/2014
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
15
MP4021A—PRIMARY SIDE CONTROL OFFLINE LED CONTROLLER WITH ACTIVE PFC
PRIMARY-SIDE CONSTANT-VOLTAGE CONTROL
AC to DC
MP4021 A CV
Converter
Vo
DC to DC
MP2489 LED
Driver
Figure 11—Two-stage LED Driver Solution
The MP4021A can be designed as a primaryside constant-voltage control, offline isolated
flyback controller with Active Power Factor
Correction (PFC). The output voltage VO can be
regulated without opto-coupler under a wide AC
main input voltage range in a single-stage flyback
converter.
Primary-side Voltage Control
EC
The MP4021A can implement feedback control
function with FB pin.
N
O
T
R
RVS 1
COMP
DVS RVLIM
CCOMP
Aux-winding
Real Current
Control
CS
0.4V
REF
EF
Figure 12—FB Pin Structure
Shown in Figure 12, the FB signal is fed to the
error amplifier and comparing with the 0.4V
reference. So, at steady state, the average value
of FB level will be regulated at 0.4V. The Real
Current Control block’s output is internally
R
VAUX =
A simple D-R-C
winding voltage
the amplitude
reference. So
calculated as:
NAUX
⋅ VO
NSEC
circuitry sample-holds the auxand a resistor divider reduces
to match the internal 0.4V
the output voltage can be
N SEC R VS1 + R VS2
⋅
⋅ VREF
N AUX
R VS2
The current-limit resistor RVLIM helps to attenuate
the energy of the leakage inductance to improve
the voltage regulation precision.
CVS
RVS 2
EA
The FB pin is used to regulate the output voltage
by sampling the aux-winding. As a flyback
converter, during the flyback period, the primary
MOSFET is off and the secondary diode is
conducting current. Before the secondary current
drops to zero, the aux-winding voltage is
proportional to the output voltage.
VO =
FB
ICOMP
connected to FB with about 200kΩ impedance, if
there is no other external feedback signal on FB
pin, the sample signal from CS pin is regulated. If
there is external FB signal with low input
impedance (
工商网监
湘ICP备2023018690号
