MP4571
High-Efficiency, 1A, 60V, Fully Integrated
Synchronous Buck Converter
DESCRIPTION
FEATURES
The MP4571 is a fully integrated, fixedfrequency, synchronous step-down converter. It
can achieve up to 1A of continuous output
current with peak current control for excellent
transient response.
The wide 4.5V to 60V input voltage range
accommodates a variety of step-down
applications in an automotive input environment.
A 2μA shutdown mode quiescent current makes
it ideal for battery-powered applications.
The MP4571 integrates internal high-side and
low-side power MOSFETs for high efficiency
without an external Schottky diode, and is
available in a 12-pin QFN package.
The MP4571 employs advanced asynchronous
modulation (AAM), which achieves high efficiency
during light load by scaling down the frequency to
reduce the switching and gate driver losses.
The MP4571 offers standard features including
built-in soft start, enable control, and a power
good indicator. High duty cycle and low-dropout
mode are provided for automotive cold crank
conditions. In addition, the chip provides overcurrent protection with valley current detection,
which helps prevent current runaway. It also has
hiccup short-circuit protection (SCP), input undervoltage lockout (UVLO), and auto-recovery
thermal protection.
With internal compensation, the MP4571 offers
a very compact solution with a minimum number
of
readily
available,
standard
external
components. It is available in a QFN-12
(2.5mmx3mm) package.
MP4571 Rev. 1.0
3/9/2020
Wide 4.5V to 60V Operating Input Range
1A Continuous Output Current
High-Efficiency Synchronous Mode Control
250mΩ/45mΩ Internal Power MOSFETs
Configurable Frequency Up to 2.2MHz
180° Out-of-Phase SYNCO Clock
40μA Quiescent Current
Low Shutdown Mode Current: 2μA
FB Tolerance: 1% at Room Temp, 2% at
Full Temp
Selectable AAM or Forced CCM Operation
at Light Load
Internal 0.45ms Soft Start
Remote EN Control
Power Good (PG) Indicator
Low-Dropout Mode
Over-Current Protection (OCP)
Short-Circuit Protection with Hiccup Mode
VIN Under-Voltage Lockout (UVLO)
Thermal Shutdown
Available in a QFN-12 (2.5mmx3mm)
Package
APPLICATIONS
Automotive Infotainment
Automotive Lamps and LEDs
Automotive Motor Control
Industrial Power Systems
All MPS parts are lead-free, halogen-free, and adhere to the RoHS
directive. For MPS green status, please visit the MPS website under
Quality Assurance. “MPS”, the MPS logo, and “Simple, Easy Solutions” are
trademarks of Monolithic Power Systems, Inc. or its subsidiaries.
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1
MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL APPLICATION
GND
Efficiency vs. Load Current
VOUT = 5V, L = 15μH, fSW = 400kHz, AAM
BST
IN
100
VOUT
SW
GND
MP4571
VCC
EN
EN
FREQ
GND
FB
CCM/SYNCO PG
PG
VIN=8V
VIN=12V
VIN=24V
VIN=36V
Vin=48V
VIN=60V
90
80
1.40
1.20
70
1.00
60
0.80
50
0.60
40
0.40
30
0.20
20
1
MP4571 Rev. 1.0
3/9/2020
1.60
10
100
LOAD CURRENT (mA)
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POWER LOSS (W)
4.5V to 60V
EFFICIENCY (%)
VIN
0.00
1000
2
MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
ORDERING INFORMATION
Part Number*
Package
Top Marking
MSL Rating**
MP4571GQB
QFN-12 (2.5mmx3mm)
See Below
1
* For Tape & Reel, add suffix –Z (e.g. MP4571GQB–Z).
** Moisture Sensitivity Level Rating.
TOP MARKING
BFF: Product code of MP4571GQB
Y: Year code
WW: Week code
LLL: Lot number
PACKAGE REFERENCE
TOP VIEW
EN
12
CCM/
SYNCO NC
11
10
NC
9
BST
1
8
IN
SW
2
7
GND
3
4
PG
FB
5
6
FREQ VCC
QFN-12 (2.5mmx3mm)
MP4571 Rev. 1.0
3/9/2020
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3
MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
PIN FUNCTIONS
Pin #
Name
1
BST
2
SW
3
PG
4
FB
5
FREQ
6
VCC
7
GND
8
IN
9, 10
NC
11
CCM/
SYNCO
12
EN
MP4571 Rev. 1.0
3/9/2020
Description
Bootstrap. Connect a capacitor between SW and BST to form a floating supply across the
high-side switch driver.
Switch output. SW is the output of the internal power switches. A wide PCB trace is
recommended.
Power good indicator. The pin is an open drain; it requires a pull-up resistor to the power
source. PG is pulled up to the power source if the output voltage is within 90% to 108% of
the nominal voltage. It goes low when the output voltage exceeds 116% or falls below 94%
of the nominal voltage.
Feedback point. FB is the negative input of the error amplifier. Connect FB to the tap of an
external resistor divider between the output and GND to set the regulation voltage. In
addition, power good and under-voltage lockout circuits use FB to monitor the output
voltage.
Configurable switching frequency. Connect a resistor to GND to set the switching
frequency.
Internal bias supply. VCC supplies power to the internal control circuit and gate drivers. A
minimum 1µF decoupling capacitor to ground is required close to this pin.
IC ground. Connect the pin to larger copper areas to the negative terminals of the input and
output capacitors.
Input supply. This pin supplies all power to the converter. Place a decoupling capacitor to
ground, as close as possible to the IC, to reduce switching spikes.
No connection. These pins can be connected to GND to improve thermal and EMI
performance in PCB layout.
Mode selection/synchronization output. Connect the CCM pin to GND through a 10kΩ to
300kΩ resistor to force the converter into CCM. Float the CCM pin for nonsynchronous AAM
mode under light-load conditions. CCM/SYNCO is a synchronization output pin. It outputs a
180° out-of-phase clock to the other devices.
Enable. Drive EN high to turn on the device; float or drive it low to turn off the device.
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4
MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
θJA
θJC
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance
VIN……………………………………………… 65V
VSW ...................................... -0.3V to VIN + 0.3V
VBST .....................................................VSW + 6V
All Other Pins ................................ -0.3V to +6V
Continuous power dissipation (TA = 25°C) (2)
QFN-12 (2.5mmx3mm) ............................ 2.08W
Junction temperature .............................. 150°C
Lead temperature ................................... 260°C
Storage temperature ............... -65°C to +150°C
QFN-12 (2.5mmx3mm)
JESD51-7 (4).............................60......13....°C/W
EVQ4571-QB-00A (5)................45......11....°C/W
Electrostatic Discharge (ESD) Rating
Human body model (HBM) ....................... ±2kV
Charged device model (CDM) ................ ±750V
Recommended Operating Conditions
Continuous supply voltage (VIN) ...... 4.5V to 60V
Output voltage (VOUT) .................. 1V to 0.9 x VIN
Load current range ............................. 0A to 1A
Operating junction temp (TJ)……………………..
……………………………….. -40°C to +125°C (3)
MP4571 Rev. 1.0
3/9/2020
Notes:
1) Absolute maximum ratings are rated under room temperature
unless otherwise noted. Exceeding these ratings may
damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature, TJ (MAX), the junction-toambient thermal resistance, θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX) - TA) / θJA. Exceeding the maximum allowable power
dissipation will cause excessive die temperature, and the
module will go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
3) This device is not guaranteed to function outside its operating
conditions.
4) Measured on JESD51-7, 4-layer PCB.
5) Measured on MPS standard EVB: 8.9cmx8.9cm, 2oz. copper,
4-layer PCB.
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5
MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS
VIN = 24V, VEN = 2V, TJ = -40°C to +125°C
noted.
Parameters
Input Supply and UVLO
Supply current
(quiescent)
Supply current
(shutdown)
VIN under-voltage lockout
rising threshold
VIN under-voltage lockout
falling threshold
VIN UVLO threshold
hysteresis
Output and Regulation
Regulated FB reference
FB input current
Switches and Frequency
High-side switch on
resistance
Low-side switch on
resistance
SW leakage current
Switching frequency
Symbol
MP4571 Rev. 1.0
3/9/2020
Condition
Min
Typ
Max
Units
No load, VFB = 0.85V, AAM
40
65
μA
ISD
VEN = 0V
2
5
μA
INUVVth-R
3.8
4.0
4.2
V
INUVVth-F
3.3
3.5
3.7
V
INUVHYS
VREF
IFB
RDSON-H
RDSON-L
ISW-LKG
fSW
tPG-DELAY
PG leakage current
PG rising threshold
(VFB / VREF)
PG falling threshold
(VFB / VREF)
Enable (EN) Control
EN input rising threshold
EN input falling threshold
EN threshold hysteresis
EN input current
EN turn-off delay
BST
BST-SW UVLO
BST-SW UVLO
hysteresis
Soft Start and VCC
Soft-start time
VCC regulator
, typical values are at TJ = 25°C, unless otherwise
IQ
Minimum on time (7)
tON-MIN
Minimum off time (7)
tOFF-MIN
Power Good (PG) Indicator
PG sink current capacity
VPG-SINK
PG delay time
(6)
TJ = 25°C
TJ = -40°C to +125°C
VFB = 0.85V
VBST - VSW = 5V, TJ = 25°C
VBST - VSW = 5V, TJ = -40°C to +125°C
TJ = 25°C
TJ = -40°C to +125°C
VEN = 0V, VSW = 0V or 60V
RFREQ = 76.8kΩ
RFREQ = 28kΩ
RFREQ = 12.1kΩ
500
mV
0.792 0.800 0.808
0.784
0.816
10
50
V
V
nA
150
100
30
20
300
750
1800
Sink 4mA
Rising edge
Falling edge
PGFALLING
0.1
400
1000
2200
90
100
350
500
60
90
30
500
1250
2700
300
VFB rising
VFB falling
VFB falling
VFB rising
VEN-RISING
VEN-FALLING
VEN-HYS
IEN
VEN = 2V
tEN-DELAY
45
70
25
10
90
108
84
116
IPG-LKG
PGRISING
250
1.38
1.05
1000
ICC = 0mA
μA
kHz
kHz
kHz
ns
ns
mV
μs
μs
nA
%
%
%
%
1.52
1.19
V
V
mV
μA
μs
1.4
2.5
V
5
4.6
mΩ
1.45
1.12
330
0.7
60
tSS
VCC
mΩ
0.45
4.9
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mV
5.2
ms
V
6
MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS (continued)
VIN = 24V, VEN = 2V, TJ = -40°C to +125°C
noted.
Parameters
Protections
Peak current limit
Valley current limit
Zero cross threshold
Negative current limit
Thermal shutdown (7)
Thermal shutdown
hysteresis (7)
Symbol
IPEAK-LIMIT
IVALLEY-LIMIT
IZCD
INEG-LIMIT
TSD
(6)
, typical values are at TJ = 25°C, unless otherwise
Condition
Min
Typ
Max
Units
20% duty cycle
1.4
1.4
-100
-2
1.95
2.5
140
-1.3
170
+300
-0.8
A
A
mA
A
°C
AAM
FCCM
Temperature rising
TSD-SYS
25
°C
Notes:
6) Not tested in production. Guaranteed by over-temperature correlation.
7) Derived from the bench characterization. Not tested in production.
MP4571 Rev. 1.0
3/9/2020
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7
MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL CHARACTERISTICS
VIN = 24V, TJ = -40°C to +125°C, unless otherwise noted.
Quiescent Current vs. Temperature
Shutdown Current vs. Temperature
50
2.5
2.4
2.3
ISHUT (μA)
IQ (μA)
45
40
2.2
2.1
2.0
35
1.9
30
1.8
-50
-25
0
25
50
75
100
125
-50
-25
TEMPERATURE (oC)
VIN UVLO Threshold vs. Temperature
125
0.810
4.0
0.805
3.9
VREF (V)
VIN UVLO THRESHOLD (V)
100
Feedback Reference vs. Temperature
4.1
3.8
3.7
Rising
Falling
3.6
0.800
0.795
3.5
3.4
0.790
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
125
-50
VCC vs. Temperature
-25
0
25
50
75
TEMPERATURE (°C)
100
125
EN Threshold vs. Temperature
4.94
1.5
1.4
VEN (V)
4.92
VCC (V)
0
25
50
75
TEMPERATURE (oC)
4.90
4.88
1.3
Rising
Falling
1.2
1.1
4.86
1.0
-50
MP4571 Rev. 1.0
3/9/2020
-25
0
25
50
75
TEMPERATURE (°C)
100
125
-50
-25
0
25
50
75
TEMPERATURE (°C)
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100
125
8
MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL CHARACTERISTICS (continued)
VIN = 24V, TJ = -40°C to +125°C, unless otherwise noted.
Zero-Current Detection vs.
Temperature
Peak Current Limit vs. Temperature
2.10
160
2.05
2.00
140
ILIMIT (A)
IZCD (mA)
150
130
120
1.95
1.90
1.85
1.80
110
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
-50
125
-25
0
25
50
75
100
125
100
125
100
125
o
TEMPERATURE ( C)
Negative Current Limit vs.
Temperature
Valley Current Limit vs. Temperature
2.10
1.40
ILIMIT-NEGATIVE (A)
ILIMIT-VALLEY (A)
2.05
2.00
1.95
1.90
1.35
1.30
1.25
1.85
1.80
1.20
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
125
-50
0
25
50
75
TEMPERATURE (oC)
LS-FET On Resistance vs.
Temperature
400
70
350
60
RON-LS (mΩ)
RON-HS (mΩ)
HS-FET On Resistance vs.
Temperature
-25
300
250
50
40
200
30
-50
MP4571 Rev. 1.0
3/9/2020
-25
0
25
50
75
TEMPERATURE (°C)
100
125
-50
-25
0
25
50
75
TEMPERATURE (°C)
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9
MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL CHARACTERISTICS (continued)
VIN = 24V, TJ = -40°C to +125°C, unless otherwise noted.
PG Rising Threshold vs.
Temperature
PG Falling Threshold vs. Temperature
120
PGVTH (AS PERCENTAGE OF
VFB)
PGVTH (AS PERCENTAGE OF
VFB)
115
115
110
110
105
105
100
100
VFB Falling
VFB Rising
95
90
85
-50
MP4571 Rev. 1.0
3/9/2020
-25
0
25
50
75
TEMPERATURE (°C)
100
125
95
VFB Rising
VFB Falling
90
85
80
-50
-25
0
25
50
75
TEMPERATURE (°C)
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100
125
10
MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 24V, VOUT = 5V, L = 15µH, fSW = 400kHz, AAM, TA = 25°C, unless otherwise noted.
Efficiency vs. Load Current
Efficiency vs. Load Current
0.80
50
0.60
40
0.40
30
0.20
1
EFFICIENCY (%)
80
1
10
100
LOAD CURRENT (mA)
Efficiency vs. Load Current
Efficiency vs. Load Current
fSW = 1MHz, L = 10μH, AAM
fSW = 1MHz, L = 10μH, CCM
VIN=8V
VIN=12V
VIN=24V
VIN=36V
Vin=48V
VIN=60V
90
0.00
1000
3.20
2.80
2.40
70
2.00
60
1.60
50
1.20
40
0.80
30
0.40
20
1
10
100
LOAD CURRENT (mA)
0.00
1000
100
90
80
70
60
50
40
30
20
10
0
VIN=8V
VIN=12V
VIN=24V
VIN=36V
Vin=48V
VIN=60V
EFFICIENCY (%)
100
10
100
LOAD CURRENT (mA)
1
10
100
LOAD CURRENT (mA)
Efficiency vs. Load Current
Efficiency vs. Load Current
fSW = 2.2MHz, L = 4.7μH, AAM
fSW = 2.2MHz, L = 4.7μH, CCM
100
VIN=8V
VIN=12V
VIN=24V
VIN=36V
Vin=48V
VIN=60V
90
80
3.20
2.80
2.40
70
2.00
60
1.60
50
1.20
40
0.80
30
0.40
20
1
MP4571 Rev. 1.0
3/9/2020
10
100
LOAD CURRENT (mA)
0.00
1000
100
90
80
70
60
50
40
30
20
10
0
VIN=8V
VIN=12V
VIN=24V
VIN=36V
Vin=48V
VIN=60V
1
10
100
LOAD CURRENT (mA)
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POWER LOSS (W)
60
1.50
1.35
1.20
1.05
0.90
0.75
0.60
0.45
0.30
0.15
0.00
1000
3.00
2.70
2.40
2.10
1.80
1.50
1.20
0.90
0.60
0.30
0.00
1000
POWER LOSS (W)
1.00
VIN=8V
VIN=12V
VIN=24V
VIN=36V
Vin=48V
VIN=60V
EFFICIENCY (%)
70
20
EFFICIENCY (%)
1.20
100
90
80
70
60
50
40
30
20
10
0
EFFICIENCY (%)
80
1.40
POWER LOSS (W)
EFFICIENCY (%)
90
POWER LOSS (W)
VIN=8V
VIN=12V
VIN=24V
VIN=36V
Vin=48V
VIN=60V
fSW = 400kHz, L = 15μH, CCM
1.60
POWER LOSS (W)
100
3.00
2.70
2.40
2.10
1.80
1.50
1.20
0.90
0.60
0.30
0.00
1000
POWER LOSS (W)
fSW = 400kHz, L = 15μH, AAM
11
MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 24V, VOUT = 5V, L = 15µH, fSW = 400kHz, AAM, TA = 25°C, unless otherwise noted.
Line Regulation
0.20
0.20
0.15
0.15
LINE REGULATION (%)
LOAD REGULATION (%)
Load Regulation
0.10
0.05
0.00
Vin=8V
Vin=12V
Vin=24V
Vin=36V
Vin=48V
Vin=60V
-0.05
-0.10
-0.15
-0.20
0.10
0.05
0.00
-0.05
-0.10
Io=0.5A
Io=1A
-0.15
-0.20
10
100
1000
5 10 15 20 25 30 35 40 45 50 55 60
LOAD CURRENT (mA)
VIN (V)
Dropout vs. Input Voltage
Case Temp Rise vs. Load Current
50
CASE TEMPERATURE RISE
(°C)
5.2
5.0
VOUT (V)
4.8
4.6
4.4
Io=0.1A
Io=0.5A
4.2
Io=1A
30
20
10
0
4.0
5.0
5.2
5.4
5.6 5.8
VIN (V)
6.0
6.2
0.0
6.4
Switching Frequency vs. RFREQ
2400
2200
2000
1800
1600
1400
1200
1000
800
600
400
200
10
20
30
40
50
60
RFREQ (kΩ)
MP4571 Rev. 1.0
3/9/2020
70
80
90 100
0.2
0.4
0.6
IOUT (A)
0.8
1.0
Switching Frequency vs. VIN
fSW (kHz)
fSW (kHz)
Vin=12V
Vin=24V
Vin=60V
40
2400
2200
2000
1800
1600
1400
1200
1000
800
600
400
200
Rfreq=76.8k
Rfreq=12.1k
5 10 15 20 25 30 35 40 45 50 55 60
VIN (V)
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12
MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 5V, L = 15µH, fSW = 450kHz, AAM, TA = 25°C, unless otherwise noted. (8)
CISPR25 Class 5 Average Conducted
Emissions
CISPR25 Class 5 Peak Conducted
Emissions
150kHz to 108MHz
150kHz to 108MHz
75
70
65
60
55
50
45
40
35
30
25
20
15
10
5
0
-5
-10
-15
-20
PEAK CONDUCTED EMI (dBuV)
AVERAGE CONDUCTED EMI (dBuV)
CISPR25 CLASS 5 LIMITS
75
70
65
60
CISPR25 CLASS 5 LIMITS
55
50
45
40
35
30
25
20
15
10
5
0
-5
-10
-15
NOISE FLOOR
-20
0.1
NOISE FLOOR
0.1
1
10
Frequency (MHz)
108
60
55
55
CISPR25 CLASS 5 LIMITS
50
AVERAGE RADIATED EMI (dBuV/m)
50
PEAK RADIATED EMI (dBuV/m)
108
10
150kHz to 30MHz
150kHz to 30MHz
60
45
40
35
30
25
20
15
10
NOISE FLOOR
5
45
40
35
CISPR25 CLASS 5 LIMITS
30
25
20
15
10
5
0
0
-5
-5
-10
1
0.1
Frequency (MHz)
30
NOISE FLOOR
-10
Frequency (MHz)
30
CISPR25 Class 5 Average Radiated
Emissions
Horizontal, 30MHz to 200MHz
Horizontal, 30MHz to 200MHz
55
55
HORIZONTAL POLARIZATION
50
1
0.1
CISPR25 Class 5 Peak Radiated
Emissions
HORIZONTAL POLARIZATION
50
45
AVERAGE RADIATED EMI (dBuV/m)
PEAK RADIATED EMI (dBuV/m)
Frequency (MHz)
CISPR25 Class 5 Average Radiated
Emissions
CISPR25 Class 5 Peak Radiated
Emissions
45
1
CISPR25 CLASS 5 LIMITS
40
35
30
25
20
15
10
NOISE FLOOR
5
40
35
30
25
15
10
5
0
0
-5
30
40
50
CISPR25 CLASS 5 LIMITS
20
60
MP4571 Rev. 1.0
3/9/2020
70
80
90
100 110 120
Frequency (MHz)
130
140
150
160
170
180
190
200
NOISE FLOOR
-5
30
40
50
60
70
80
90
100 110 120
Frequency (MHz)
130
140
150
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160
170
180
190
200
13
MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 5V, L = 15µH, fSW = 450kHz, AAM, TA = 25°C, unless otherwise noted.
CISPR25 Class 5 Average Radiated
Emissions
CISPR25 Class 5 Peak Radiated
Emissions
Vertical, 30MHz to 200MHz
Vertical, 30MHz to 200MHz
55
55
VERTICAL POLARIZATION
50
45
CISPR25 CLASS 5 LIMITS
AVERAGE RADIATED EMI (dBuV/m)
PEAK RADIATED EMI (dBuV/m)
45
40
35
30
25
20
15
10
40
35
30
25
15
10
5
0
0
-5
30
40
50
60
70
80
90
100 110 120
Frequency (MHz)
130
140
150
160
170
180
190
30
50
60
70
80
90
100 110 120
Frequency (MHz)
130
140
150
160
170
180
190
200
Horizontal, 200MHz to 1GHz
55
55
HORIZONTAL POLARIZATION
50
40
CISPR25 Class 5 Average Radiated
Emissions
Horizontal, 200MHz to 1GHz
HORIZONTAL POLARIZATION
50
45
AVERAGE RADIATED EMI (dBuV/m)
45
PEAK RADIATED EMI (dBuV/m)
NOISE FLOOR
-5
200
CISPR25 Class 5 Peak Radiated
Emissions
CISPR25 CLASS 5 LIMITS
40
35
30
25
20
15
10
NOISE FLOOR
5
40
35
30
25
CISPR25 CLASS 5 LIMITS
20
15
10
5
0
0
-5
200
300
400
500
600
Frequency (MHz)
700
800
900
NOISE FLOOR
-5
1000
200
300
400
500
600
Frequency (MHz)
700
800
900
1000
900
1000
CISPR25 Class 5 Average Radiated
Emissions
CISPR25 Class 5 Peak Radiated
Emissions
Vertical, 200MHz to 1GHz
Vertical, 200MHz to 1GHz
55
55
VERTICAL POLARIZATION
50
VERTICAL POLARIZATION
50
45
AVERAGE RADIATED EMI (dBuV/m)
45
PEAK RADIATED EMI (dBuV/m)
CISPR25 CLASS 5 LIMITS
20
NOISE FLOOR
5
VERTICAL POLARIZATION
50
CISPR25 CLASS 5 LIMITS
40
35
30
25
20
15
10
NOISE FLOOR
5
40
35
30
25
CISPR25 CLASS 5 LIMITS
20
15
10
5
0
0
-5
200
300
400
500
600
Frequency (MHz)
700
800
900
1000
NOISE FLOOR
-5
200
300
400
500
600
Frequency (MHz)
700
800
Note:
8) The EMC test results are based on the application circuit with EMI filters (see Figure 8) and are tested on the EVQ4571-QB-00A.
MP4571 Rev. 1.0
3/9/2020
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14
MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 24V, VOUT = 5V, L = 15µH, fSW = 400kHz, TA = 25°C, unless otherwise noted.
Start-Up through Input Voltage
Start-Up through Input Voltage
IOUT = 0A, AAM
IOUT = 0A, CCM
CH3: VIN
10V/div.
CH3: VIN
10V/div.
CH2: VOUT
2V/div.
CH1: VSW
CH2: VOUT
2V/div.
CH4: IL
500mA/div.
20V/div.
CH4: IL
500mA/div.
CH1: VSW
20V/div.
1ms/div.
1ms/div.
Start-Up through Input Voltage
Shutdown through Input Voltage
IOUT = 1A
IOUT = 0A, AAM
CH3: VIN
10V/div.
CH3: VIN
10V/div.
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH1: VSW
CH4: IL
1A/div.
CH1: VSW
20V/div.
10V/div.
CH4: IL
500mA/div.
1ms/div.
20ms/div.
Shutdown through Input Voltage
Shutdown through Input Voltage
IOUT = 0A, CCM
IOUT = 1A
CH3: VIN
10V/div.
CH3: VIN
10V/div.
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH4: IL
500mA/div.
CH1: VSW
20V/div.
CH4: IL
1A/div.
CH1: VSW
20V/div.
10ms/div.
MP4571 Rev. 1.0
3/9/2020
10ms/div.
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15
MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 24V, VOUT = 5V, L = 15µH, fSW = 400kHz, TA = 25°C, unless otherwise noted.
Start-Up through EN
Start-Up through EN
IOUT = 0A, AAM
IOUT = 0A, CCM
CH3: VEN
2V/div.
CH3: VEN
2V/div.
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH1: VSW
20V/div.
CH4: IL
500mA/div.
CH4: IL
500mA/div.
CH1: VSW
20V/div.
1ms/div.
1ms/div.
Start-Up through EN
Shutdown through EN
IOUT = 1A
IOUT = 0A, AAM
CH3: VEN
2V/div.
CH3: VEN
2V/div.
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH1: VSW
CH4: IL
1A/div.
10V/div.
CH1: VSW
20V/div.
CH4: IL
500mA/div.
1ms/div.
1s/div.
Shutdown through EN
Shutdown through EN
IOUT = 0A, CCM
IOUT = 1A
CH3: VEN
2V/div.
CH3: VEN
2V/div.
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH4: IL
500mA/div.
CH1: VSW
20V/div.
CH4: IL
1A/div.
CH1: VSW
20V/div.
200ms/div.
MP4571 Rev. 1.0
3/9/2020
100μs/div.
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16
MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 24V, VOUT = 5V, L = 15µH, fSW = 400kHz, TA = 25°C, unless otherwise noted.
Output Ripple
Output Ripple
IOUT = 0A, AAM
IOUT = 0A, CCM
CH2: VOUT/AC
10mV/div.
CH1: VSW
10V/div.
CH2:
VOUT/AC
20mV/div.
CH1: VSW
10V/div.
CH4: IL
500mA/div.
CH4: IL
1A/div.
400µs/div.
2µs/div.
Output Ripple
SCP Entry
IOUT = 1A
IOUT = 0A, AAM
CH2: VOUT
2V/div.
CH3: VPG
5V/div.
CH1: VSW
10V/div.
CH2: VOUT/AC
20mV/div.
CH1: VSW
20V/div.
CH4: IL
2A/div.
CH4: IL
1A/div.
2µs/div.
4ms/div.
SCP Entry
SCP Entry
IOUT = 0A, CCM
IOUT = 1A
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH3: VPG
5V/div.
CH3: VPG
5V/div.
CH4: IL
2A/div.
CH4: IL
2A/div.
CH1: VSW
20V/div.
CH1: VSW
20V/div.
4ms/div.
MP4571 Rev. 1.0
3/9/2020
4ms/div.
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17
MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 24V, VOUT = 5V, L = 15µH, fSW = 400kHz, TA = 25°C, unless otherwise noted.
SCP Recovery
SCP Recovery
IOUT = 0A, AAM
IOUT = 0A, CCM
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH3: VPG
5V/div.
CH3: VPG
5V/div.
CH4: IL
2A/div.
CH4: IL
2A/div.
CH1: VSW
20V/div.
CH1: VSW
20V/div.
4ms/div.
4ms/div.
SCP Recovery
SCP Steady State
IOUT = 1A
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH3: VPG
5V/div.
CH3: VPG
5V/div.
CH4: IL
2A/div.
CH4: IL
2A/div.
CH1: VSW
20V/div.
CH1: VSW
20V/div.
4ms/div.
4ms/div.
Load Transient
Cold Crank
IOUT = 0A to 1A, AAM
VIN = 24V to 4V to 5V, IOUT = 0A
CH2:
VOUT/AC
200mV/div.
CH3: VIN
10V/div.
CH1: VSW
10V/div.
CH2: VOUT
5V/div.
CH4: IOUT
500mA/div.
CH4: IL
500mA/div.
100µs/div.
MP4571 Rev. 1.0
3/9/2020
40ms/div.
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18
MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 24V, VOUT = 5V, L = 15µH, fSW = 400kHz, TA = 25°C, unless otherwise noted.
VIN Ramp Down and Up
Cold Crank
VIN = 18V to 4.5V to 0V to 4.5V to 18V,
IOUT = 0A
VIN = 24V to 4V to 5V, IOUT = 1A
CH3: VIN
10V/div.
CH1: VSW
10V/div.
CH2: VOUT
5V/div.
CH3: VIN
5V/div.
CH1: VSW
5V/div.
CH2: VOUT
5V/div.
CH4: IL
1A/div.
CH4: IL
2A/div.
40ms/div.
10s/div.
VIN Ramp Down and Up
Load Dump
VIN = 18V to 4.5V to 0V to 4.5V to 18V,
IOUT = 1A
VIN = 24V to 48V to 24V, IOUT = 1A
CH3: VIN
20V/div.
CH3: VIN
5V/div.
CH1: VSW
5V/div.
CH2: VOUT
5V/div.
CH1: VSW
20V/div.
CH2: VOUT
5V/div.
CH4: IL
1A/div.
CH4: IL
1A/div.
10s/div.
MP4571 Rev. 1.0
3/9/2020
100ms/div.
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19
MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
FUNCTIONAL BLOCK DIAGRAM
IN
CSA
VCC
Internal
Regulator
UVLO
ILIMIT
EN
Reference
Soft
Start
RSEN
VCC
BST
Reg
OCP
BST
Slope
Comp
HS
Driver
COMP
VREF
Error
Amplifier
FB
18kΩ
600kΩ
36pF
0.4pF
VAAM COMP
AAM
Control
Logic
Oscillator CLK
PLL
CCM/
SYNCO
SW
VCC
LS
Driver
FREQ
50% of VREF
SCP
Hiccup
IVALLEY
PG
COMP
UV
PG REF
CSA
ZCD
RSEN
GND
Figure 1: Functional Block Diagram
MP4571 Rev. 1.0
3/9/2020
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20
MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
OPERATION
The MP4571 is a fully integrated, synchronous,
rectified, step-down, non-isolated switch-mode
converter. It offers a wide 4.5V to 60V input
supply range, and can achieve up to 1A of
continuous output current with excellent load and
line regulation across an ambient temperature
range of -40°C to +125°C. Figure 1 shows a
block diagram of the device.
PWM Control
At moderate to high output currents, the MP4571
operates in fixed-frequency, peak current control
mode to regulate the output voltage.
An internal clock initiates a PWM cycle. At the
rising edge of the clock, the high-side switch (HSFET) turns on, and the inductor current rises
linearly to provide energy to the load. The HSFET remains on until the current reaches the
value set by the COMP voltage (VCOMP), which is
the output of the internal error amplifier. VCOMP is
based on the difference between the output
feedback voltage and internal high-precision
reference. VCOMP determines how much energy
should be transferred to the load. A higher load
current creates a higher VCOMP. Once the HS-FET
is on, it remains on for at least 90ns.
When the HS-FET is off, the low-side switch (LSFET) turns on immediately, and stays on until the
next clock starts. During this time, the inductor
current flows through the LS-FET. Once the LSFET is on, it remains on for at least 100ns before
the next cycle starts. To avoid shoot-through, a
dead time is inserted to prevent the HS-FET and
LS-FET from turning on simultaneously.
If the current in the HS-FET does not reach the
COMP set current value within one PWM period,
the HS-FET remains on, saving a turn-off
operation.
Light-Load Operation
The MP4571 features configurable forced
continuous conduction mode (FCCM) and lightload asynchronous advanced mode (AAM),
which can be set by the CCM/SYNCO pin. FCCM
maintains a constant switching frequency and
smaller output ripple. However, FCCM has low
efficiency during light-load conditions, while AAM
achieves high efficiency (see Figure 2).
MP4571 Rev. 1.0
3/9/2020
To force the device into FCCM, connect the
CCM/SYNCO pin to GND using a 10kΩ to 300kΩ
resistor. In FCCM, the converter works with a
fixed frequency across a no-load to full-load
range. Float the CCM/SYNCO pin to force the
device into AAM under light-load conditions. The
device cannot change modes while it is operating,
so the mode must be selected before start-up.
Inductor
Current
Load
Decreased
Inductor
Current
AAM
FCCM
t
t
Load
t Decreased
t
t
t
Figure 2: AAM and FCCM
When AAM is enabled, the switching frequency is
scaled down according to VCOMP during light-load
conditions.
The
MP4571
first
enters
nonsynchronous operation while the inductor
current approaches zero at light-load. If the load
further decreases or is at no-load, VCOMP drops
below the internally set AAM value (VAAM). The
MP4571 then enters sleep mode and consumes
a low quiescent current to improve light-load
efficiency.
In sleep mode, the internal clock is blocked, so
the MP4571 skips some pulses. VFB is below
VREF, so VCOMP ramps up until it exceeds VAAM.
Then the internal clock is reset, and the
crossover time is used as the benchmark for the
next clock. This control scheme helps the device
achieve high efficiency by scaling down the
frequency to reduce switching and gate driver
losses.
As the output current increases from light load,
both VCOMP and the switching frequency rise. If
the output current exceeds the critical level set by
VCOMP, the MP4571 enters discontinuous
conduction operation (DCM) or CCM, which has
a constant switching frequency.
Enable (EN) Control
The MP4571 can be enabled or disabled via a
remote EN signal that is referenced to ground. The
remote EN control operates with a positive logic
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21
MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
that is compatible with popular logic devices.
Positive logic indicates that when the input voltage
exceeds the under-voltage lockout (UVLO)
threshold (about 4.0V), the converter is enabled by
pulling the EN pin above 1.45V. Drive the EN pin
below 1.12V to disable the MP4571. An internal
resistor (REN) from EN to GND allows EN to be
floated to shut down the chip (REN = 2.8MΩ when
EN is on; REN = 1.8MΩ when EN is off).
SYNCO
The MP4571 has a SYNCO pin. During start-up,
SYNCO stays low and quickly outputs a 180°
phase-shift clock to the internal oscillator once
soft start is ready. Note that the falling edge of
SYNCO is a 180° phase-shift to the rising edge
of the internal oscillator. This function allows two
devices to operate in the same frequency, but 180°
out of phase, which reduces the total input current
ripple. This allows a smaller input bypass capacitor
to be used.
Internal Regulator
A 4.9V internal regulator powers most of the
internal circuitries. This regulator takes VIN and
operates in the full VIN range. When VIN exceeds
4.9V, the output of the regulator is in full
regulation. Lower VIN values result in lower output
voltages. The regulator is enabled when VIN
exceeds its under-voltage lockout (UVLO)
threshold and EN is high. In EN shutdown mode,
the internal VCC regulator is disabled to reduce
power dissipation.
the duration of the switch-off time of the HS-FET,
which results in an automatic reduction of fSW.
Compliance with the minimum on time of the HSFET is guaranteed. An advantage of this method is
that the device works at the desired fSW as long as
possible, and a correction is only made at high VIN.
For the Switching Frequency vs. VIN curve, see the
Typical Performance Characteristics section on
page 12, where RFREQ equals 12.1kΩ.
Internal Soft Start (SS)
To avoid overshoot during start-up, the MP4571
has built-in soft start (SS) that ramps up the
output voltage at a controlled slew rate when the
EN pin goes high. When the SS voltage (VSS) is
below the internal reference (VREF), VSS overrides
VREF as the error amplifier reference. When VSS
exceeds VREF, VREF acts as the reference. At this
point, soft start finishes and the MP4571 enters
steady-state.
The SS time is internally set to 0.45ms. When the
output voltage is shorted to GND, the feedback
voltage is pulled low and VSS is discharged. The
part initiates soft start again when it returns to a
normal state.
Pre-Biased Start-Up
If VFB exceeds VSS during start-up, that means
the output has a pre-biased voltage. Neither the
HS-FET nor LS-FET turns on until VSS exceeds
VFB. Note that the pre-biased capability is only
available when the device is set to AAM.
The calculated resistance may need fine-tuning
with a bench test.
Power Good (PG) Indicator
The MP4571 has power good (PG) indication.
The PG pin is the open drain of a MOSFET. It
should be connected to a voltage source through
a resistor (e.g. 100kΩ). In the presence of an
input voltage, the MOSFET turns on so that the
PG pin is pulled to GND before soft start is ready.
PG goes high if the output voltage is between
90% and 108% of the nominal voltage after a
70μs delay. PG goes low when the output
voltage is above 116% or below 94% of the
nominal voltage after a 25μs delay.
It is not possible to use a high fSW with a high VIN,
since the minimum on time required for the HSFET is limited. The MP4571 control loop
automatically sets the maximum possible fSW up to
the set frequency, which also reduces excessive
power loss in the IC. VOUT is regulated by varying
Under-Voltage Lockout Protection (UVLO)
The MP4571 has input under-voltage lockout
protection (UVLO) to ensure reliable output
power. Assuming EN is active, the MP4571 is
powered on when the input voltage exceeds the
UVLO rising threshold. The device is powered off
Frequency Programmable and Foldback
The oscillating frequency (fSW) of the MP4571 is
configured by an external frequency resistor. The
frequency resistor should be located between
FREQ pin and GND, as close as possible to the
device. Select a proper RFREQ, calculated with
Equation (1):
RFREQ (MΩ)
MP4571 Rev. 1.0
3/9/2020
30
fSW(kHz)
(1)
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22
MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
when input voltage drops below the UVLO falling
threshold. This function prevents the device from
operating at an insufficient voltage. It is a nonlatch protection.
device resumes operation by initiating a soft
start.
Over-Current Protection (OCP)
The MP4571 has a 1.95A peak current limit.
Once the inductor current reaches the current
limit, the HS-FET turns off immediately. Then the
LS-FET turns on to discharge the energy, and
the inductor current decreases. The HS-FET
does not turn on again until the inductor current
drops below the current threshold (the valley
current limit). This protection prevents the
inductor current from running away and
damaging the components.
Short-Circuit Protection (SCP)
When a short-circuit condition occurs, the
MP4571 immediately reaches its current limit.
Meanwhile, the output voltage drops until VFB
falls below 50% of VREF. The device considers
this an output dead short, and triggers hiccup
short-circuit
protection
(SCP)
mode
to
periodically restart the part.
In hiccup mode, the MP4571 disables its output
power stage, slowly discharges the soft-start
capacitor, then initiates a soft start. If the shortcircuit condition remains after soft start ends, the
device repeats this operation until the short
circuit disappears and the output returns to the
regulation level. This protection mode greatly
reduces the average short-circuit current to
alleviate thermal issues and protect the regulator.
Negative Current Protection
The MP4571 has a -1.3A negative current limit.
Once the inductor current reaches the current
limit, the LS-FET immediately turns off and the
HS-FET turns on. The current limit prevents the
negative current from dropping too low and
damaging the components.
Thermal Shutdown
For thermal protection, the MP4571 monitors the
IC temperature internally. This function prevents
the chip from operating at exceedingly high
temperatures. If the junction temperature
exceeds the threshold value (about 170°C), it
shuts down the whole chip. This is a non-latch
protection. There is a 25°C hysteresis. Once the
junction temperature drops to about 145°C, the
MP4571 Rev. 1.0
3/9/2020
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23
MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
Floating Driver and Bootstrap Charging
An external bootstrap capacitor powers the
floating HS-FET driver. There are two methods to
charge the bootstrap capacitor (see Figure 3).
The first method is through the main charging
circuit from VCC through a diode. When the HSFET is on, VSW is about equal to VIN but exceeds
VCC, and the bootstrap capacitor is not charged.
The best charging period occurs when the LSFET is on, and VCC - VSW is at its largest. When
there is no current in the inductor, VSW equals
VOUT, so VCC can only charge BST when VOUT is
very small.
The second method is through the auxiliary
charging circuit from VIN. When the voltage
difference between BST and SW is below the
internal 5V bootstrap regulator, a PMOS pass
transistor (M1) turns on to charge the bootstrap
capacitor. The charging current is much smaller
than that from VCC, but as long as VIN exceeds
VSW, BST can be charged. This function is useful
in sleep mode, when there is not always a switch.
Figure 3: Internal Bootstrap Charging Circuit
Low-Dropout Operation (BST Refresh)
To improve dropout, the MP4571 is designed to
operate at close to 100% duty cycle as long as
the BST-to-SW voltage exceeds 1.4V. When the
BST-to-SW voltage drops below 1.34V, the HSFET turns off using a UVLO circuit, which allows
the LS-FET to conduct and refresh the charge on
the BST capacitor. When the input voltage drops,
the HS-FET remains on and close to 100% duty
cycle to maintain output regulation until the BSTto-SW voltage falls below 1.34V.
Since the supply current sourced from the BST
capacitor is low, the HS-FET can remain on for
more switching cycles than are required to
refresh the capacitor. The means the effective
duty cycle of the switching regulator is high.
MP4571 Rev. 1.0
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MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
The effective duty cycle during regulator dropout
is mostly influenced by the voltage drops across
the power MOSFET, inductor resistance, lowside diode, and PCB resistance.
Start-Up and Shutdown
If both VIN and VEN exceed their respective
thresholds, the chip starts. The reference block
starts first, generating a stable reference voltage
and current, and then the internal regulator is
enabled. The regulator provides a stable supply
for the remaining circuitries.
Three events can shut down the chip: EN going
low, VIN UVLO, and thermal shutdown. In the
shutdown procedure, the signaling path is
blocked first to avoid any fault triggering. The
COMP voltage and the internal supply rail are
then pulled down. The floating driver is not
subject to this shutdown command, but its
charging path is disabled.
While the internal supply rail is up, an internal
timer holds the power MOSFET off for about
50µs to blank the start-up glitches. When the
soft-start block is enabled, it first holds its SS
output low to ensure the circuitries are ready,
then slowly ramps up.
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MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
APPLICATION INFORMATION
Setting the Output Voltage
The external resistor divider connected to the FB
pin sets the output voltage (see the Typical
Application Circuits on page 29). The feedback
resistor (R1) must account for both stability and
dynamic response, so it cannot be too large or
too small. Choose an R1 value of about 40kΩ.
R2 is then estimated with Equation (2):
R2
Figure 4 shows
feedback network.
R1
VOUT
1
0.8
the
(2)
recommended
R3
T-type
VOUT
V
(1 OUT )
fSW IL
VIN
(3)
Where ΔIL is the peak-to-peak inductor ripple
current.
Choose an inductor that will not saturate under
the maximum inductor peak current. Calculate
the peak inductor current with Equation (4):
R1
VOUT
ILP IOUT
R2
Figure 4: Feedback Network
R3 + R1 is used to set the loop bandwidth. A
higher R3 + R1 indicates a lower bandwidth. To
ensure loop stability, it is strongly recommended
to limit the bandwidth between 1/10 of the
switching frequency and 100kHz.
The calculated resistance may need fine-tuning
via bench testing. Table 1 lists the recommended
feedback divider resistor values for common
output voltages. Use check loop analysis before
using the device in an application, and change
the resistance of R3 for loop stability if necessary.
Table 1: Resistor Values for Typical VOUT
VOUT (V)
R1 (kΩ)
R2 (kΩ)
3.3
5.0
41.2
41.2
13
7.68
Selecting the Inductor
The inductor must supply constant current to the
output load while being driven by the switching
input voltage. For the highest efficiency, choose
an inductor with a low DC resistance. High
inductance will result in less ripple current and
lower output ripple voltage. However, a larger
MP4571 Rev. 1.0
3/9/2020
A good rule to determine the ideal inductance
value is to make the inductor ripple current about
30% of the maximum load current. Ensure that
the peak inductor current is below the device
peak current limit. The inductance value can be
calculated with Equation (3):
L
MP4571
FB 5
inductance value results in a physically larger
inductor, higher series resistance, and lower
saturation current.
VOUT
V
(1 OUT )
2fSW L
VIN
(4)
Selecting the Input Capacitor
The step-down converter has a discontinuous
input current, and requires a capacitor to supply
the AC current to the converter while maintaining
the DC input voltage. Use low-ESR capacitors for
the best performance. Ceramic capacitors with
X5R
or
X7R
dielectrics
are
strongly
recommended because of their low ESR and
small temperature coefficients. Other capacitors,
such as Y5V and Z5U, should not be used since
they lose too much capacitance with frequency,
temperature, and bias voltage.
Place the input capacitors as close to the IN pin
as possible. For most applications, a 22µF
capacitor is sufficient. For higher output voltages,
use a 47μF capacitor to improve system stability.
To maintain a small solution size, choose a
properly sized capacitor that has a voltage rating
compliant with the input spec.
Since the input capacitor absorbs the input
switching current, it requires an adequate ripple
current rating that should exceed the converter’s
maximum input ripple current. The input ripple
current can be estimated with Equation (5):
ICIN IOUT
VOUT
V
(1 OUT )
VIN
VIN
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(5)
26
MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
The worst-case condition occurs at VIN = 2VOUT,
calculated with Equation (6):
ICIN
IOUT
2
(6)
For simplification, choose an input capacitor with
an RMS current rating greater than half of the
maximum load current.
The input capacitor can be electrolytic, tantalum,
or ceramic. When using electrolytic or tantalum
capacitors, use a small, high-quality ceramic
capacitor (0.1μF), placed as close to the IC as
possible. The input capacitance value determines
the input voltage ripple of the converter. If there
is an input voltage ripple requirement in the
system design, choose an input capacitor that
meets the specification.
The input voltage ripple caused by the
capacitance can be estimated with Equation (7):
VIN
IOUT
V
V
OUT (1 OUT )
fSW CIN VIN
VIN
(7)
The worst-case condition occurs at VIN = 2VOUT,
estimated with Equation (8):
VIN
I
1
OUT
4 fSW CIN
(8)
Selecting the Output Capacitor
The output capacitor maintains the output DC
voltage. Ceramic capacitors with low ESR are
recommended for their small size and low output
voltage ripple. Electrolytic and polymer
capacitors may also be used. The output voltage
ripple can be estimated with Equation (9):
VOUT
VOUT
V
1
(1 OUT ) (RESR
) (9)
fSW L
VIN
8fSW COUT
Where RESR is the equivalent series resistance of
the output capacitor.
For tantalum or electrolytic capacitors, the ESR
dominates the impedance at the switching
frequency. For simplification, the output ripple
can be calculated with Equation (11):
VOUT
VOUT
V
(1 OUT ) RESR
fSW L
VIN
(11)
Another consideration for the output capacitance
is the allowable overshoot in VOUT if the load is
suddenly removed. In this case, energy stored in
the inductor is transferred to COUT, causing its
voltage to rise. To achieve a desired overshoot
relative to the regulated voltage, the output
capacitance can be estimated with Equation (12):
COUT
IOUT 2 L
(12)
VOUT 2 ((VOUTMAX / VOUT )2 1)
Where VOUTMAX / VOUT is the allowable maximum
overshoot.
After calculating the capacitance required for
both the ripple and overshoot, choose the larger
value.
The characteristics of the output capacitor also
affect the stability of the regulation system. The
MP4571 can be optimized for a wide range of
capacitance and ESR values.
VIN Under-Voltage Lockout (UVLO) Setting
The MP4571 has an internal, fixed under-voltage
lockout (UVLO) threshold. The rising threshold is
4.0V, while the falling threshold is about 3.5V.
For applications that require a higher UVLO point,
place an external resistor divider between EN
and IN to obtain a higher equivalent UVLO
threshold (see Figure 5 and Figure 6). Add a 6V
Zener diode between EN to GND if the EN pin is
connected to VIN through a resistor.
8
VIN
IN
R4
For ceramic capacitors, the capacitance
dominates the impedance at the switching
frequency and causes most of the output voltage
ripple. For simplification, the output voltage ripple
can be calculated with Equation (10):
VOUT
MP4571 Rev. 1.0
3/9/2020
VOUT
V
(1 OUT ) (10)
8 fSW L COUT
VIN
2
12
Zener
6V
R5
EN
1.8MΩ
Figure 5: Adjustable UVLO Using EN Divider
when EN Rises
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MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
8
VIN
IN
R4
12
Zener
R5
6V
EN
2.8MΩ
Figure 6: Adjustable UVLO Using EN Divider
when EN Falls
The UVLO threshold can be calculated with
Equation (13) and Equation (14) when EN is
rising or falling, respectively:
INUVRISING (1
R4
) VEN_RISING
1.8M//R5
INUVFALLING (1
R4
) VEN_FALLING
2.8M//R5
BST Resistor and Capacitor
A resistor in series with the BST capacitor (RBST)
can reduce the SW rising rate and voltage spikes.
This enhances EMI performance and reduces
voltage stress at a high VIN. A higher resistance
is better for SW spike reduction, but
compromises efficiency. To make a tradeoff
between EMI and efficiency, it is recommended
to keep RBST below 20Ω. It is also recommended
for the BST capacitor to be between 0.1µF and
1μF.
(13)
(14)
Where VEN_RISING = 1.45V, VEN_FALLING = 1.12V.
When choosing R4, ensure it is big enough to
limit the current flowing into EN pin below 100µA.
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MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
PCB Layout Guidelines (9)
An optimized PCB layout is critical for proper
operation. A 4-layer layout is strongly
recommended to improve thermal performance.
For the best results, refer to Figure 7 and follow
the guidelines below:
1. Place high-current paths (GND, IN, and SW)
very close to the device with short, direct, and
wide traces.
2. Use large copper areas to minimize
conduction loss and thermal stress.
Top Layer and Top Silk
3. Place the ceramic input capacitors as close to
the IN and GND pins as possible to minimize
high frequency noise.
4. Place the T-type feedback resistors as close
as possible to the FB pin to ensure the trace
connecting to the FB pin is as short as
possible.
5. Route SW and BST away from sensitive
analog areas, such as FB.
6. Use multiple vias to connect the power
planes to the internal layer.
Inner Layer 1
Note:
9) The recommended PCB layout is based on the circuit in Figure
8.
Inner Layer 2
Bottom Layer and Bottom Silk
Figure 7: Recommended PCB Layout
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MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL APPLICATION CIRCUITS
C4
0.1µF
CIN9
22µF
GND
C1A
C1B
C1C
BST
VEMI
L3
15µH
1
U1
8 IN
C1D
SW
VOUT
R1
100kΩ
10µF 10µF 0.1µF 0.1µF
1210 1210 0603 0603
12
EN
D1
3
PG
PG
C2B
22µF
GND
R5
7.68kΩ
MP4571
BZT52C6V2
C2A
22µF
R4
41.2kΩ
R6
20kΩ
4
FB
EN
5V/1A
2
5
FREQ
R11
76.8kΩ
R9
100kΩ
6
VCC
11
CCM/SYNCO
R10
100kΩ
7
GND
C3
1µF
CCM/SYNCO
JP1
1
2
Figure 8: Typical Application Circuit
L1
240nH DFE201612E-R24M
5V to 60V
L2
4.7µH FDSD0402-H-4R7M
VIN
VEMI
CIN1 CIN2 CIN3 CIN4 CIN5 CIN6
1nF 10nF 1nF 10nF 1µF 1µF
GND
0603
0603
0603
0603 0805
CIN7 CIN8
10µF 10µF
0805
1210
CIN9
22µF
C1A C1B C1C C1D
10µF 10µF 0.1µF 0.1µF
1210
1210
1210
0603
0603
C4
0.1µF
8
R23
10Ω/0603
IN
1
L3
15µH
BST
U1
VIN
SW
R1
100kΩ
C12
0.1µF/100V
12
EN
D1
4
3
PG
FREQ
R11
76.8kΩ
CCM/
SYNCO
VCC
VOUT
C2C
1nF
C2D
10nF
C2E
1nF
C2F
10nF
GND
11
VOUT
CCM/SYNCO
R10
100kΩ
C10
R20
0.1µF 10Ω
C11
R21
7
GND
6
C2B
22µF
5
R9
100kΩ
C3
1µ F
R4
41.2kΩ
R6
20kΩ
C2A
22µF
R5
7.68kΩ
MP4571
BZT52C6V2
PG
FB
EN
5V/1A
VOUT
2
JP1
1
0.1µF 10Ω
2
Figure 9: Typical Application Circuit with EMI Filters
MP4571 Rev. 1.0
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MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
PACKAGE INFORMATION QFN-12 (2.5mmX3mm)
QFN-12 (2.5mmx3mm)
PIN 1 ID
MARKING
PIN 1 ID
INDEX AREA
TOP VIEW
BOTTOM VIEW
SIDE VIEW
NOTE:
1) LAND PATTERNS OF PINS 2, 7, AND 8
HAVE THE SAME LENGTH AND WIDTH.
2) ALL DIMENSIONS ARE IN MILLIMETERS.
3) LEAD COPLANARITY SHALL BE 0.10
MILLIMETERS MAX.
4) JEDEC REFERENCE IS MO-220.
5) DRAWING IS NOT TO SCALE.
RECOMMENDED LAND PATTERN
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MP4571 – 60V, 1A, SYNCHRONOUS STEP-DOWN CONVERTER
CARRIER INFORMATION
Part Number
Package Description
Quantity/
Reel
Reel/
Diameter
Carrier
Tape Width
Carrier
Tape Pitch
MP4571GQB–Z
QFN-12 (2.5mmx3mm)
5000
13in
12mm
8mm
Notice: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third-party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MP4571 Rev. 1.0
3/9/2020
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