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N01L163WC2AT2-55I

N01L163WC2AT2-55I

  • 厂商:

    NANOAMP

  • 封装:

  • 描述:

    N01L163WC2AT2-55I - 2Mb Ultra-Low Power Asynchronous CMOS SRAM 128K × 16 bit - NanoAmp Solutions, In...

  • 数据手册
  • 价格&库存
N01L163WC2AT2-55I 数据手册
NanoAmp Solutions, Inc. 670 North McCarthy Blvd. Suite 220, Milpitas, CA 95035 ph: 408-935-7777, FAX: 408-935-7770 www.nanoamp.com N02L163WC2A 2Mb Ultra-Low Power Asynchronous CMOS SRAM 128K × 16 bit Overview The N02L163WC2A is an integrated memory device containing a 2 Mbit Static Random Access Memory organized as 131,072 words by 16 bits. The device is designed and fabricated using NanoAmp’s advanced CMOS technology to provide both high-speed performance and ultra-low power. The device operates with two chip enable (CE1 and CE2) controls and output enable (OE) to allow for easy memory expansion. Byte controls (UB and LB) allow the upper and lower bytes to be accessed independently and can also be used to deselect the device. The N02L163WC2A is optimal for various applications where low-power is critical such as battery backup and hand-held devices. The device can operate over a very wide temperature range of -40oC to +85oC and is available in JEDEC standard packages compatible with other standard 128Kb x 16 SRAMs Features • Single Wide Power Supply Range 2.3 to 3.6 Volts • Very low standby current 2.0µA at 3.0V (Typical) • Very low operating current 2.0mA at 3.0V and 1µs (Typical) • Very low Page Mode operating current 0.8mA at 3.0V and 1µs (Typical) • Simple memory control Dual Chip Enables (CE1 and CE2) Byte control for independent byte operation Output Enable (OE) for memory expansion • Low voltage data retention Vcc = 1.8V • Very fast output enable access time 30ns OE access time • Automatic power down to standby mode • TTL compatible three-state output driver • Compact space saving BGA package available Product Family Part Number N02L163WC2AB N02L163WC2AT N02L163WC2AB2 N02L163WC2AT2 Package Type 48 - BGA 44 - TSOP II 48 - BGA Green 44 - TSOP II Green 55ns @ 2.7V -40oC to +85oC 2.3V - 3.6V 70ns @ 2.3V 2 µA 2 mA @ 1MHz Operating Temperature Power Supply (Vcc) Speed Standby Operating Current Current (Icc), (ISB), Typical Typical (DOC# 14-02-013 REV G ECN# 01-1270)1 The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. NanoAmp Solutions, Inc. Pin Configuration A4 A3 A2 A1 A0 CE1 I/O0 I/O1 I/O2 I/O3 VCC VSS I/O4 I/O5 I/O6 I/O7 WE A16 A15 A14 A13 A12 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 PIN ONE 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A5 A6 A7 OE UB LB I/O15 I/O14 I/O13 I/O12 VSS VCC I/O11 I/O10 I/O9 I/O8 CE2 A8 A9 A10 A11 NC N02L163WC2A 1 2 OE UB I/O10 I/O11 I/O12 3 A0 A3 A5 NC NC A14 A12 A9 4 A1 A4 A6 A7 A16 A15 A13 A10 5 A2 CE1 I/O1 I/O3 I/O4 I/O5 WE A11 6 CE2 I/O0 I/O2 VCC VSS I/O6 I/O7 NC A B C D E F G H LB I/O8 I/O9 VSS VCC N02L163WC2A TSOP I/O14 I/O13 I/O15 NC NC A8 48 Pin BGA (top) 6 x 8 mm Pin Descriptions Pin Name A0-A16 WE CE1, CE2 OE LB UB I/O0-I/O15 VCC VSS NC Pin Function Address Inputs Write Enable Input Chip Enable Input Output Enable Input Lower Byte Enable Input Upper Byte Enable Input Data Inputs/Outputs Power Ground Not Connected (DOC# 14-02-013 REV G ECN# 01-1270) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. 2 NanoAmp Solutions, Inc. Functional Block Diagram N02L163WC2A Address Inputs A0 - A3 Word Address Decode Logic Address Inputs A4 - A16 Page Address Decode Logic 32K Page x 16 word x 16 bit RAM Array Input/ Output Mux and Buffers Word Mux I/O0 - I/O7 I/O8 - I/O15 CE1 CE2 WE OE UB LB Control Logic Functional Description CE1 H X L L L L CE2 X L H H H H WE X X X L H H OE X X X X3 L H UB X X H L 1 LB X X H L 1 I/O0 - I/O151 High Z High Z High Z Data In Data Out High Z MODE Standby2 Standby2 Standby Write3 Read Active POWER Standby Standby Standby Active Active Active L1 L1 L1 L1 1. When UB and LB are in select mode (low), I/O0 - I/O15 are affected as shown. When LB only is in the select mode only I/O0 - I/O7 are affected as shown. When UB is in the select mode only I/O8 - I/O15 are affected as shown. 2. When the device is in standby mode, control inputs (WE, OE, UB, and LB), address inputs and data input/outputs are internally isolated from any external influence and disabled from exerting any influence externally. 3. When WE is invoked, the OE input is internally disabled and has no effect on the circuit. Capacitance1 Item Input Capacitance I/O Capacitance Symbol CIN CI/O Test Condition VIN = 0V, f = 1 MHz, TA = 25oC VIN = 0V, f = 1 MHz, TA = 25oC Min Max 8 8 Unit pF pF 1. These parameters are verified in device characterization and are not 100% tested (DOC# 14-02-013 REV G ECN# 01-1270) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. 3 NanoAmp Solutions, Inc. Absolute Maximum Ratings1 Item Voltage on any pin relative to VSS Voltage on VCC Supply Relative to VSS Power Dissipation Storage Temperature Operating Temperature Soldering Temperature and Time Symbol VIN,OUT VCC PD TSTG TA TSOLDER N02L163WC2A Rating –0.3 to VCC+0.3 –0.3 to 4.5 500 –40 to 125 -40 to +85 260oC, 10sec Unit V V mW o C oC oC 1. Stresses greater than those listed above may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Operating Characteristics (Over Specified Temperature Range) Item Supply Voltage Data Retention Voltage Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Input Leakage Current Output Leakage Current Read/Write Operating Supply Current @ 1 µs Cycle Time2 Read/Write Operating Supply Current @ 70 ns Cycle Time2 Page Mode Operating Supply Current @ 70ns Cycle Time2 (Refer to Power Savings with Page Mode Operation diagram) Read/Write Quiescent Operating Supply Current3 Symbol VCC VDR VIH VIL VOH VOL ILI ILO ICC1 ICC2 IOH = 0.2mA IOL = -0.2mA VIN = 0 to VCC OE = VIH or Chip Disabled VCC=3.6 V, VIN=VIH or VIL Chip Enabled, IOUT = 0 VCC=3.6 V, VIN=VIH or VIL Chip Enabled, IOUT = 0 VCC=3.6 V, VIN=VIH or VIL Chip Enabled, IOUT = 0 VCC=3.6 V, VIN=VIH or VIL Chip Enabled, IOUT = 0, f=0 VIN = VCC or 0V Chip Disabled tA= 85oC, VCC = 3.6 V Vcc = 1.8V, VIN = VCC or 0 Chip Disabled, tA= 85oC 2.0 2.0 12.0 Chip Disabled3 Test Conditions Min. 2.3 1.8 1.8 –0.3 VCC–0.2 0.2 0.5 0.5 4.0 16.0 Typ1 3.0 Max 3.6 3.6 VCC+0.3 0.6 Unit V V V V V V µA µA mA mA ICC3 4.0 mA ICC4 3.0 mA Maximum Standby Current3 ISB1 20.0 µA Maximum Data Retention Current3 IDR 10.0 µA 1. Typical values are measured at Vcc=Vcc Typ., TA=25°C and not 100% tested. 2. This parameter is specified with the outputs disabled to avoid external loading effects. The user must add current required to drive output capacitance expected in the actual system. 3. This device assumes a standby mode if the chip is disabled (CE1 high or CE2 low). In order to achieve low standby current all inputs must be within 0.2 volts of either VCC or VSS. (DOC# 14-02-013 REV G ECN# 01-1270) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. 4 NanoAmp Solutions, Inc. Power Savings with Page Mode Operation (WE = VIH) N02L163WC2A Page Address (A4 - A16) Open page ... Word Address (A0 - A3) Word 1 Word 2 Word 16 CE1 CE2 OE LB, UB Note: Page mode operation is a method of addressing the SRAM to save operating current. The internal organization of the SRAM is optimized to allow this unique operating mode to be used as a valuable power saving feature. The only thing that needs to be done is to address the SRAM in a manner that the internal page is left open and 16-bit words of data are read from the open page. By treating addresses A0-A3 as the least significant bits and addressing the 16 words within the open page, power is reduced to the page mode value which is considerably lower than standard operating currents for low power SRAMs. (DOC# 14-02-013 REV G ECN# 01-1270) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. 5 NanoAmp Solutions, Inc. Timing Test Conditions Item Input Pulse Level Input Rise and Fall Time Input and Output Timing Reference Levels Output Load Operating Temperature N02L163WC2A 0.1VCC to 0.9 VCC 5ns 0.5 VCC CL = 30pF -40 to +85 oC Timing Item Read Cycle Time Address Access Time Chip Enable to Valid Output Output Enable to Valid Output Byte Select to Valid Output Chip Enable to Low-Z output Output Enable to Low-Z Output Byte Select to Low-Z Output Chip Disable to High-Z Output Output Disable to High-Z Output Byte Select Disable to High-Z Output Output Hold from Address Change Write Cycle Time Chip Enable to End of Write Address Valid to End of Write Byte Select to End of Write Write Pulse Width Address Setup Time Write Recovery Time Write to High-Z Output Data to Write Time Overlap Data Hold from Write Time End Write to Low-Z Output Symbol tRC tAA tCO tOE tLB, tUB tLZ tOLZ tLBZ, tUBZ tHZ tOHZ tLBHZ, tUBHZ tOH tWC tCW tAW tLBW, tUBW tWP tAS tWR tWHZ tDW tDH tOW 40 0 10 10 5 10 0 0 0 10 70 50 50 50 40 0 0 20 35 0 10 20 20 20 2.3 - 3.6 V Min. 70 70 70 35 70 10 5 10 0 0 0 10 55 40 40 40 40 0 0 20 20 20 20 Max. 2.7 - 3.6 V Min. 55 55 55 30 55 Max. Units ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns (DOC# 14-02-013 REV G ECN# 01-1270) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. 6 NanoAmp Solutions, Inc. N02L163WC2A tRC Timing of Read Cycle (CE1 = OE = VIL, WE = CE2 = VIH) Address tAA tOH Data Out Previous Data Valid Data Valid Timing Waveform of Read Cycle (WE=VIH) tRC Address tAA tHZ CE1 tCO CE2 tLZ tOE OE tOLZ tLB, tUB LB, UB tLBLZ, tUBLZ Data Out High-Z tLBHZ, tUBHZ Data Valid tOHZ (DOC# 14-02-013 REV G ECN# 01-1270) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. 7 NanoAmp Solutions, Inc. Timing Waveform of Write Cycle (WE control) tWC Address tAW CE1 tCW CE2 tLBW, tUBW LB, UB tAS WE tDW High-Z Data In tWHZ Data Out tWP N02L163WC2A tWR tDH Data Valid tOW High-Z Timing Waveform of Write Cycle (CE1 Control) tWC Address tAW CE1 (for CE2 Control, use inverted signal) LB, UB tWP WE tDW Data In tLZ Data Out tWHZ tDH tCW tAS tLBW, tUBW tWR Data Valid High-Z (DOC# 14-02-013 REV G ECN# 01-1270) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. 8 NanoAmp Solutions, Inc. 44-Lead TSOP II Package (T44) N02L163WC2A 18.41±0.13 10.16±0.13 11.76±0.20 0.80mm REF 0.45 0.30 SEE DETAIL B DETAIL B 1.10±0.15 0o-8o 0.20 0.00 0.80mm REF Note: 1. All dimensions in inches (Millimeters) 2. Package dimensions exclude molding flash (DOC# 14-02-013 REV G ECN# 01-1270) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. 9 NanoAmp Solutions, Inc. Ball Grid Array Package A1 BALL PAD CORNER (3) D 0.28±0.05 1.24±0.10 N02L163WC2A 1. 0.35±0.05 DIA. E 2. SEATING PLANE - Z 0.15 Z 0.05 TOP VIEW SIDE VIEW 1. DIMENSION IS MEASURED AT THE A1 BALL PAD MAXIMUM SOLDER BALL DIAMETER. CORNER PARALLEL TO PRIMARY Z. 2. PRIMARY DATUM Z AND SEATING PLANE ARE DEFINED BY THE SPHERICAL CROWNS OF THE SOLDER BALLS. 3. A1 BALL PAD CORNER I.D. TO BE MARKED BY INK. K TYP J TYP e Z SD e SE BOTTOM VIEW Dimensions (mm) e = 0.75 D 6±0.10 E SD 8±0.10 0.375 SE 0.375 J 1.125 K 1.375 BALL MATRIX TYPE FULL (DOC# 14-02-013 REV G ECN# 01-1270) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. 10 NanoAmp Solutions, Inc. Ordering Information N02L163WC2A N02L163WC2AX-XX X Temperature I = Industrial, -40°C to 85°C Performance 55 = 55ns Package Type T = 44-pin TSOP II B = 48-ball BGA T2 = 44-pin TSOP II Green Package (RoHS Compliant) B2 = 48-ball BGA Green Package (RoHS Compliant) Revision History Revision A B C D E F G Date Jan. 2001 May 2001 Sept. 2001 Dec. 2001 Nov. 2002 Oct. 2004 Nov. 2005 Change Description Initial Preliminary Release Changed access time to 55 ns Minor parametric modifications. Full production release. Part number change from EM128J16, modified Overview and Features, added Page Mode Operation diagram, revised Operating Characteristics table, Package diagram, Functional Description table and Ordering Information diagram Replaced Isb and Icc on Product Family table with typical values Added Pb-Free and Green Package Option Removed Pb-Free Pkg., added Green Pkg, RoHS compliant © 2001 - 2002 Nanoamp Solutions, Inc. All rights reserved. NanoAmp Solutions, Inc. ("NanoAmp") reserves the right to change or modify the information contained in this data sheet and the products described therein, without prior notice. NanoAmp does not convey any license under its patent rights nor the rights of others. Charts, drawings and schedules contained in this data sheet are provided for illustration purposes only and they vary depending upon specific applications. NanoAmp makes no warranty or guarantee regarding suitability of these products for any particular purpose, nor does NanoAmp assume any liability arising out of the application or use of any product or circuit described herein. NanoAmp does not authorize use of its products as critical components in any application in which the failure of the NanoAmp product may be expected to result in significant injury or death, including life support systems and critical medical instruments. (DOC# 14-02-013 REV G ECN# 01-1270) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. 11
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