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74LS93

74LS93

  • 厂商:

    NSC

  • 封装:

  • 描述:

    74LS93 - Decade and Binary Counters - National Semiconductor

  • 数据手册
  • 价格&库存
74LS93 数据手册
DM74LS90 DM74LS93 Decade and Binary Counters June 1989 DM74LS90 DM74LS93 Decade and Binary Counters General Description Each of these monolithic counters contains four masterslave flip-flops and additional gating to provide a divide-bytwo counter and a three-stage binary counter for which the count cycle length is divide-by-five for the ’LS90 and divideby-eight for the ’LS93 All of these counters have a gated zero reset and the LS90 also has gated set-to-nine inputs for use in BCD nine’s complement applications To use their maximum count length (decade or four bit binary) the B input is connected to the QA output The input count pulses are applied to input A and the outputs are as described in the appropriate truth table A symmetrical divide-by-ten count can be obtained from the ’LS90 counters by connecting the QD output to the A input and applying the input count to the B input which gives a divide-by-ten square wave at output QA Features Y Y Typical power dissipation 45 mW Count frequency 42 MHz Connection Diagrams (Dual-In-Line Packages) TL F 6381 – 1 Order Number DM74LS90M or DM74LS90N See NS Package Number M14A or N14A TL F 6381 – 2 Order Number DM74LS93M or DM74LS93N See NS Package Number M14A or N14A C1995 National Semiconductor Corporation TL F 6381 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Note) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage Input Voltage (Reset) Input Voltage (A or B) Operating Free Air Temperature Range DM74LS Storage Temperature Range 7V 7V 5 5V 0 C to a 70 C b 65 C to a 150 C Note The ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed The device should not be operated at these limits The parametric values defined in the ‘‘Electrical Characteristics’’ table are not guaranteed at the absolute maximum ratings The ‘‘Recommended Operating Conditions’’ table will define the conditions for actual device operation Recommended Operating Conditions Symbol VCC VIH VIL IOH IOL fCLK fCLK tW Supply Voltage High Level Input Voltage Low Level Input Voltage High Level Output Current Low Level Output Current Clock Frequency (Note 1) Clock Frequency (Note 2) Pulse Width (Note 1) A to QA B to QB A to QA B to QB A B Reset tW Pulse Width (Note 2) A B Reset tREL tREL TA Reset Release Time (Note 1) Reset Release Time (Note 2) Free Air Operating Temperature 0 0 0 0 15 30 15 25 50 25 25 35 0 70 ns ns C ns ns Parameter Min 4 75 2 08 b0 4 DM74LS90 Nom 5 Max 5 25 Units V V V mA mA MHz MHz 8 32 16 20 10 Note 1 CL e 15 pF RL e 2 kX TA e 25 C and VCC e 5V Note 2 CL e 50 pF RL e 2 kX TA e 25 C and VCC e 5V ’LS90 Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol VI VOH VOL Parameter Input Clamp Voltage High Level Output Voltage Low Level Output Voltage Conditions VCC e Min II e b18 mA VCC e Min IOH e Max VIL e Max VIH e Min VCC e Min IOL e Max VIL e Max VIH e Min (Note 4) IOL e 4 mA VCC e Min II Input Current Input Voltage Max VCC e Max VI e 7V VCC e Max VI e 5 5V Reset A B 27 34 Min Typ (Note 1) Max b1 5 Units V V 0 35 0 25 05 04 01 02 04 V mA 2 ’LS90 Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) (Continued) Symbol IIH Parameter High Level Input Current Conditions VCC e Max VI e 2 7V Reset A B IIL Low Level Input Current VCC e Max VI e 0 4V Reset A B IOS ICC Short Circuit Output Current Supply Current VCC e Max (Note 2) VCC e Max (Note 3) b 20 Min Typ (Note 1) Max 20 40 80 b0 4 b2 4 b3 2 b 100 Units mA mA mA mA 9 15 Note 1 All typicals are at VCC e 5V TA e 25 C Note 2 Not more than one output should be shorted at a time and the duration should not exceed one second Note 3 ICC is measured with all outputs open both RO inputs grounded following momentary connection to 4 5V and all other inputs grounded Note 4 QA outputs are tested at IOL e Max plus the limit value of IIL for the B input This permits driving the B input while maintaining full fan-out capability ’LS90 Switching Characteristics at VCC e 5V and TA e 25 C (See Section 1 for Test Waveforms and Output Load) Symbol Parameter From (Input) To (Output) A to QA B to QB A to QA A to QA A to QD A to QD B to QB B to QB B to QC B to QC B to QD B to QD SET-9 to QA QD SET-9 to QB QC SET-0 to Any Q RL e 2 kX CL e 15 pF Min fMAX tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPHL Maximum Clock Frequency Propagation Delay Time Low to High Level Output Propagation Delay Time High to Low Level Output Propagation Delay Time Low to High Level Output Propagation Delay Time High to Low Level Output Propagation Delay Time Low to High Level Output Propagation Delay Time High to Low Level Output Propagation Delay Time Low to High Level Output Propagation Delay Time High to Low Level Output Propagation Delay Time Low to High Level Output Propagation Delay Time High to Low Level Output Propagation Delay Time Low to High Level Output Propagation Delay Time High to Low Level Output Propagation Delay Time High to Low Level Output 32 16 16 18 48 50 16 21 32 35 32 35 30 40 40 Max CL e 50 pF Min 20 10 20 24 52 60 23 30 37 44 36 44 35 48 52 ns ns ns ns ns ns ns ns ns ns ns ns ns Max MHz Units 3 Recommended Operating Conditions Symbol VCC VIH VIL IOH IOL fCLK Supply Voltage High Level Input Voltage Low Level Input Voltage High Level Output Current Low Level Output Current Clock Frequency (Note 1) A to QA B to QB fCLK Clock Frequency (Note 2) A to QA B to QB tW Pulse Width (Note 1) A B Reset tW Pulse Width (Note 2) A B Reset tREL tREL TA Reset Release Time (Note 1) Reset Release Time (Note 2) Free Air Operating Temperature 0 0 0 0 15 30 15 25 50 25 25 35 0 70 ns ns C ns ns Parameter Min 4 75 2 08 b0 4 DM74LS93 Nom 5 Max 5 25 Units V V V mA mA 8 32 16 20 10 MHz Note 1 CL e 15 pF RL e 2 kX TA e 25 C and VCC e 5V Note 2 CL e 50 pF RL e 2 kX TA e 25 C and VCC e 5V ’LS93 Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol VI VOH VOL Parameter Input Clamp Voltage High Level Output Voltage Low Level Output Voltage Conditions VCC e Min II e b18 mA VCC e Min IOH e Max VIL e Max VIH e Min VCC e Min IOL e Max VIL e Max VIH e Min (Note 4) IOL e 4 mA VCC e Min II Input Current Max Input Voltage VCC e Max VI e 7V VCC e Max VI e 5 5V VCC e Max VI e 2 7V Reset A B Reset A B 27 34 Min Typ (Note 1) Max b1 5 Units V V 0 35 0 25 05 04 01 02 04 20 40 80 V mA IIH High Level Input Current mA 4 ’LS93 Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) (Continued) Symbol IIL Parameter Low Level Input Current Conditions VCC e Max VI e 0 4V Reset A B IOS ICC Short Circuit Output Current Supply Current VCC e Max (Note 2) VCC e Max (Note 3) b 20 Min Typ (Note 1) Max b0 4 b2 4 b1 6 b 100 Units mA mA mA 9 15 Note 1 All typicals are at VCC e 5V TA e 25 C Note 2 Not more than one output should be shorted at a time and the duration should not exceed one second Note 3 ICC is measured with all outputs open both RO inputs grounded following momentary connection to 4 5V and all other inputs grounded Note 4 QA outputs are tested at IOL e max plus the limit value of IIL for the B input This permits driving the B input while maintaining full fan-out capability ’LS93 Switching Characteristics at VCC e 5V and TA e 25 C (See Section 1 for Test Waveforms and Output Load) From (Input) To (Output) RL e 2 kX CL e 15 pF Min fMAX Maximum Clock Frequency Propagation Delay Time Low to High Level Output Propagation Delay Time High to Low Level Output Propagation Delay Time Low to High Level Output Propagation Delay Time High to Low Level Output Propagation Delay Time Low to High Level Output Propagation Delay Time High to Low Level Output Propagation Delay Time Low to High Level Output Propagation Delay Time High to Low Level Output Propagation Delay Time Low to High Level Output Propagation Delay Time High to Low Level Output Propagation Delay Time High to Low Level Output A to QA B to QB A to QA A to QA A to QD A to QD B to QB B to QB B to QC B to QC B to QD B to QD SET-0 to Any Q 32 16 16 18 70 70 16 21 32 35 51 51 40 Max CL e 50 pF Min 20 10 20 24 85 90 23 30 37 44 60 70 52 ns ns ns ns ns ns ns ns ns ns ns Max MHz Units Symbol Parameter tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPHL 5 Function Tables LS90 BCD Count Sequence (See Note A) Count QD 0 1 2 3 4 5 6 7 8 9 L L L L L L L L H H QC L L L L H H H H L L Output QB L L H H L L H H L L QA L H L H L H L H L H 0 1 2 3 4 5 6 7 8 9 Count QA L L L L L H H H H H QD L L L L H L L L L H LS90 Bi-Quinary (5-2) (See Note B) Output QC L L H H L L L H H L QB L H L H L L H L H L LS93 Count Sequence (See Note C) Count QD 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 L L L L L L L L H H H H H H H H Output QC L L L L H H H H L L L L H H H H QB L L H H L L H H L L H H L L H H QA L H L H L H L H L H L H L H L H R0(1) H H X X L L X LS90 Reset Count Truth Table Reset Inputs R0(2) H H X L X X L R9(1) L X H X L X L R9(2) X L H L X L X QD L L H Output QC QB QA L L H L L L L L L COUNT COUNT COUNT COUNT LS93 Reset Count Truth Table Reset Inputs R0(1) H L X R0(2) H X L QD L Output QC QB QA L L L COUNT COUNT Note A Output QA is connected to input B for BCD count Note B Output QD is connected to input A for bi-quinary count Note C Output QA is connected to input B Note D H e High Level L e Low Level X e Don’t Care 6 Logic Diagrams LS90 LS93 TL F 6381 – 4 TL F 6381 – 3 The J and K inputs shown without connection are for reference only and are functionally at a high level 7 8 Physical Dimensions inches (millimeters) 14-Lead Small Outline Molded Package (M) Order Number DM74LS90M or DM74LS93M NS Package Number M14A 9 DM74LS90 DM74LS93 Decade and Binary Counters Physical Dimensions inches (millimeters) (Continued) 14-Lead Molded Dual-In-Line Package (N) Order Number DM74LS90N or DM74LS93N NS Package Number N14A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user National Semiconductor Corporation 1111 West Bardin Road Arlington TX 76017 Tel 1(800) 272-9959 Fax 1(800) 737-7018 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness National Semiconductor Europe Fax (a49) 0-180-530 85 86 Email cnjwge tevm2 nsc com Deutsch Tel (a49) 0-180-530 85 85 English Tel (a49) 0-180-532 78 32 Fran ais Tel (a49) 0-180-532 93 58 Italiano Tel (a49) 0-180-534 16 80 National Semiconductor Hong Kong Ltd 13th Floor Straight Block Ocean Centre 5 Canton Rd Tsimshatsui Kowloon Hong Kong Tel (852) 2737-1600 Fax (852) 2736-9960 National Semiconductor Japan Ltd Tel 81-043-299-2309 Fax 81-043-299-2408 National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications
74LS93 价格&库存

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