74HC4316PW,112

INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT4316 Quad bilateral switches Product specification File under Integrated Circuits, IC06 September 1993 Philips Semiconductors Product specification Quad bilateral switches 74HC/HCT4316 The 74HC/HCT4316 have four independent analog switches. Each switch has two input/output terminals (nY, nZ) and an active HIGH select input (nS). When the enable input (E) is HIGH, all four analog switches are turned off. FEATURES • Low “ON” resistance: 160 Ω (typ.) at VCC − VEE = 4.5 V 120 Ω (typ.) at VCC − VEE = 6.0 V 80 Ω (typ.) at VCC − VEE = 9.0 V Current through a switch will not cause additional VCC current provided the voltage at the terminals of the switch is maintained within the supply voltage range; VCC >> (VY, VZ) >> VEE. Inputs nY and nZ are electrically equivalent terminals. • Logic level translation: to enable 5 V logic to communicate with ± 5 V analog signals • Typical “break before make” built in • Output capability: non-standard VCC and GND are the supply voltage pins for the digital control inputs (E and nS). The VCC to GND ranges are 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT. The analog inputs/outputs (nY and nZ) can swing between VCC as a positive limit and VEE as a negative limit. VCC − VEE may not exceed 10.0 V. • ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT4316 are high-speed Si-gate CMOS devices. They are specified in compliance with JEDEC standard no. 7A. See the “4016” for the version without logic level translation. QUICK REFERENCE DATA VEE = GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns TYPICAL SYMBOL PARAMETER CONDITIONS UNIT HC turn “ON” time tPZH CL = 15 pF; RL = 1 kΩ; VCC = 5 V E to VOS 19 19 ns 16 17 ns E to VOS 19 24 ns nS to VOS 16 21 ns E to VOS 20 21 ns nS to VOS 16 19 ns 3.5 3.5 pF 13 14 pF 5 5 pF nS to VOS tPZL HCT turn “ON” time tPHZ/ tPLZ turn “OFF” time CI input capacitance CPD power dissipation capacitance per switch CS max. switch capacitance notes 1 and 2 Notes CL = output load capacitance in pF 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × where: VCC2 × fi + ∑ { (CL + CS) × VCC2 CS = max. switch capacitance in pF × fo } VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC fi = input frequency in MHz For HCT the condition is VI = GND to VCC − 1.5 V fo = output frequency in MHz ∑ { (CL + CS) × VCC2 × fo } = sum of outputs September 1993 2 Philips Semiconductors Product specification Quad bilateral switches 74HC/HCT4316 ORDERING INFORMATION See “74HC/HCT/HCU/HCMOS Logic Package Information”. PIN DESCRIPTION PIN NO. SYMBOL NAME AND FUNCTION 1, 4, 10, 13 1Z to 4Z independent inputs/outputs 2, 3, 11, 12 1Y to 4Y independent inputs/outputs 7 E enable input (active LOW) 8 GND ground (0 V) 9 VEE negative supply voltage 15, 5, 6, 14 1S to 4S select inputs (active HIGH) 16 VCC positive supply voltage (b) Fig.1 Pin configuration. September 1993 Fig.2 Logic symbol. 3 Fig.3 IEC logic symbol. Philips Semiconductors Product specification Quad bilateral switches 74HC/HCT4316 FUNCTION TABLE INPUTS SWITCH E nS L L L H off on H X off Note 1. H = HIGH voltage level L = LOW voltage level X = don’t care APPLICATIONS • Signal gating • Modulation • Demodulation • Chopper Fig.4 Functional diagram. Fig.5 Schematic diagram (one switch). September 1993 4 Philips Semiconductors Product specification Quad bilateral switches 74HC/HCT4316 RATINGS Limiting values in accordance with the Absolute Maximum System (IEC 134) Voltages are referenced to VEE = GND (ground = 0 V) SYMBOL PARAMETER MIN. UNIT CONDITIONS VCC DC supply voltage +11.0 V ±IIK DC digital input diode current 20 mA for VI < −0.5 V or VI > VCC + 0.5 V ±ISK DC switch diode current 20 mA for VS < −0.5 V or VS > VCC + 0.5 V ±IS DC switch current 25 mA for −0.5 V < VS < VCC + 0.5 V ±IEE DC VEE current 20 mA ±ICC; ±IGND DC VCC or GND current 50 mA Tstg storage temperature range +150 °C Ptot power dissipation per package PS −0.5 MAX. −65 for temperature range: −40 to +125 °C 74HC/HCT plastic DIL 750 mW above +70 °C: derate linearly with 12 mW/K plastic mini-pack (SO) 500 mW above +70 °C: derate linearly with 8 mW/K power dissipation per switch 100 mW Note to ratings To avoid drawing VCC current out of terminal Z, when switch current flows in terminals Yn, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminals Z, no VCC current will flow out of terminal Yn. In this case there is no limit for the voltage drop across the switch, but the voltages at Yn and Z may not exceed VCC or VEE. RECOMMENDED OPERATING CONDITIONS 74HC 74HCT SYMBOL PARAMETER UNIT CONDITIONS min. typ. max. min. typ. max. VCC DC supply voltage VCC−GND 2.0 5.0 10.0 4.5 5.0 5.5 V see Figs 6 and 7 VCC DC supply voltage VCC−VEE 2.0 5.0 10.0 2.0 5.0 10.0 V see Figs 6 and 7 VI DC input voltage range GND VCC GND VCC V VS DC switch voltage range VEE VCC VEE VCC V Tamb operating ambient temperature range −40 +85 −40 +85 °C Tamb operating ambient temperature range −40 +125 −40 tr, tf input rise and fall times 1000 500 400 250 6.0 September 1993 5 +125 °C ns 6.0 500 see DC and AC CHARACTERISTICS VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VCC = 10.0 V Philips Semiconductors Product specification Quad bilateral switches 74HC/HCT4316 Fig.6 Guaranteed operating area as a function of the supply voltages for 74HC4316. Fig.7 Guaranteed operating area as a function of the supply voltages for 74HCT4316. DC CHARACTERISTICS FOR 74HC/HCT For 74HC: VCC − GND or VCC − VEE = 2.0, 4.5, 6.0 and 9.0 V For 74HCT: VCC − GND = 4.5 and 5.5 V; VCC − VEE = 2.0, 4.5, 6.0 and 9.0 V Tamb (°C) TEST CONDITIONS 74HC/HCT SYMBOL PARAMETER +25 min. −40 to +85 typ. max. min. max. −40 to +125 min. UNIT VCC (V) VEE (V) IS (µA) Vis VI max. RON ON resistance (peak) − 160 120 85 − 320 240 170 − 400 300 215 − 480 360 255 Ω Ω Ω Ω 2.0 4.5 6.0 4.5 0 0 0 −4.5 100 VCC VIH 1000 to or 1000 VEE VIL 1000 RON ON resistance (rail) 160 80 70 60 − 160 140 120 − 200 175 150 − 240 210 180 Ω Ω Ω Ω 2.0 4.5 6.0 4.5 0 0 0 −4.5 100 VEE VIH or 1000 1000 VIL 1000 RON ON resistance (rail) 170 90 80 65 − 180 160 135 − 225 200 170 − 270 240 205 Ω Ω Ω Ω 2.0 4.5 6.0 4.5 0 0 0 −4.5 100 VCC VIH 1000 or 1000 VIL 1000 ∆RON maximum ∆ON resistance between any two channels − 16 9 6 Ω Ω Ω Ω 2.0 4.5 6.0 4.5 0 0 0 −4.5 VCC VH to or VEE VIL Notes 1. At supply voltages (VCC − VEE) approaching 2.0 V the analog switch ON-resistance becomes extremely non-linear. Therefore it is recommended that these devices are used to transmit digital signals only, when using these supply voltages. 2. For test circuit measuring RON see Fig.8. September 1993 6 Philips Semiconductors Product specification Quad bilateral switches 74HC/HCT4316 DC CHARACTERISTICS FOR 74HC Voltages are referenced to GND (ground = 0 V) Tamb (°C) TEST CONDITIONS 74HC SYMBOL PARAMETER VIH HIGH level input voltage VIL LOW level input voltage ±II input leakage current +25 −40 to +85 min. typ. max. min. 1.5 3.15 4.2 6.3 1.5 3.15 4.2 6.3 1.2 2.4 3.2 4.3 0.8 2.1 2.8 4.3 max. −40 to +125 min. UNIT VCC VEE (V) (V) V 2.0 4.5 6.0 9.0 VI OTHER max. 1.5 3.15 4.2 6.3 0.5 1.35 1.8 2.7 0.5 1.35 1.8 2.7 0.5 1.35 1.8 2.7 V 2.0 4.5 6.0 9.0 0.1 0.2 1.0 2.0 1.0 2.0 µA 6.0 10.0 0 0 VCC or GND ±IS analog switch OFF-state current 0.1 1.0 1.0 µA 10.0 0 VIH or VIL VS = VCC − VEE (see Fig.10) ±IS analog switch ON-state current 0.1 1.0 1.0 µA 10.0 0 VIH or VIL VS = VCC − VEE (see Fig.11) ICC quiescent supply current 8.0 16.0 80.0 160.0 160.0 320.0 µA 6.0 10.0 0 0 VCC or GND Vis = VEE or VCC; VOS = VCC or VEE September 1993 7 Philips Semiconductors Product specification Quad bilateral switches 74HC/HCT4316 AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (°C) TEST CONDITIONS 74HC SYMBOL PARAMETER +25 −40 to +85 min. typ. max. min. max. −40 to +125 min. UNIT VCC (V) VEE (V) OTHER max. tPHL/ tPLH propagation delay Vis to Vos 17 6 5 4 60 12 10 8 75 15 13 10 90 18 15 12 ns 2.0 4.5 6.0 4.5 0 RL = ∞; CL = 50 pF 0 (see Fig.18) 0 −4.5 tPZH/ tPZL turn “ON” time E to Vos 61 22 18 19 205 41 35 37 255 51 43 47 310 62 53 56 ns 2.0 4.5 6.0 4.5 0 0 0 −4.5 RL = 1 kΩ; CL = 50 pF (see Figs 19, 20 and 21) tPZH/ tPZL turn “ON” time nS to Vos 52 19 15 17 175 35 30 34 220 44 37 43 265 53 45 51 ns 2.0 4.5 6.0 4.5 0 0 0 −4.5 RL = 1 kΩ; CL = 50 pF (see Figs 19, 20 and 21) tPHZ/ tPLZ turn “OFF” time E to Vos 63 23 18 21 220 44 37 39 275 55 47 49 330 66 56 59 ns 2.0 4.5 6.0 4.5 0 0 0 −4.5 RL = 1 kΩ; CL = 50 pF (see Figs 19, 20 and 21) tPHZ/ tPLZ turn “OFF” time nS to Vos 55 20 16 18 175 35 30 36 220 44 37 45 265 53 45 54 ns 2.0 4.5 6.0 4.5 0 0 0 −4.5 RL = 1 kΩ; CL = 50 pF (see Figs 19, 20 and 21) September 1993 8 Philips Semiconductors Product specification Quad bilateral switches 74HC/HCT4316 DC CHARACTERISTICS FOR 74HCT Voltages are referenced to GND (ground = 0) Tamb (°C) TEST CONDITIONS 74HCT SYMBOL PARAMETER +25 min. VIH HIGH level input voltage VIL LOW level input voltage ±II 2.0 typ. −40 to +85 UNIT VCC (V) VEE (V) VI OTHER max. min. max. min. max. 1.6 1.2 −40 to +125 2.0 2.0 V 4.5 to 5.5 0.8 0.8 0.8 V 4.5 to 5.5 input leakage current 0.1 1.0 1.0 µA 5.5 ±IS analog switch OFF-state current 0.1 1.0 1.0 µA 10.0 0 VIH or VIL VS = VCC − VEE (see Fig.10) ±IS analog switch ON-state current 0.1 1.0 1.0 µA 10.0 0 VIH or VIL VS = VCC − VEE (see Fig.11) ICC quiescent supply current 8.0 16.0 80.0 160.0 160.0 320.0 µA 5.5 5.0 0 VCC or GND 0 VCC −5.0 or GND ∆ICC additional quiescent supply current per input pin for unit load coefficient is 1 (note 1) 100 360 450 490 µA 4.5 to 5.5 0 VCC other inputs −2.1 V at VCC or GND Note 1. The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given here. To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below. INPUT UNIT LOAD COEFFICIENT nS E 0.50 0.50 September 1993 9 Vis = VEE or VCC; VOS = VCC or VEE Philips Semiconductors Product specification Quad bilateral switches 74HC/HCT4316 Fig.8 Test circuit for measuring RON. Fig.9 Typical RON as a function of input voltage Vis for Vis = 0 to VCC − VEE. Fig.10 Test circuit for measuring OFF-state current. Fig.11 Test circuit for measuring ON-state current. September 1993 10 Philips Semiconductors Product specification Quad bilateral switches 74HC/HCT4316 AC CHARACTERISTICS FOR 74HCT GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (°C) TEST CONDITIONS 74HCT SYMBOL PARAMETER +25 −40 TO +85 min. typ. max. min. max. −40 to +125 min. UNIT VCC (V) VEE (V) OTHER max. tPHL/ tPLH propagation delay Vis to Vos 6 4 12 8 15 10 18 12 ns 4.5 4.5 0 RL = ∞; −4.5 CL = 50 pF (see Fig.18) tPZH turn “ON” time E to Vos 22 21 44 42 55 53 66 63 ns 4.5 4.5 tPZL turn “ON” time E to Vos 28 21 56 42 70 53 84 63 ns 4.5 4.5 0 RL = 1 kΩ; −4.5 CL = 50 pF (see Figs 19, 0 −4.5 20 and 21) tPZH turn “ON” time nS to Vos 20 17 40 34 53 43 60 51 ns 4.5 4.5 tPZL turn “ON” time nS to Vos 25 17 50 34 63 43 75 51 ns 4.5 4.5 tPHZ/ tPLZ turn “OFF” time E to Vos 25 23 50 46 63 58 75 69 ns 4.5 4.5 0 RL = 1 kΩ; −4.5 CL = 50 pF (see Figs 19, 20 and 21) tPHZ/ tPLZ turn “OFF” time nS to Vos 22 20 44 40 55 50 66 60 ns 4.5 4.5 0 RL = 1 kΩ; −4.5 CL = 50 pF (see Figs 19, 20 and 21) September 1993 11 0 RL = 1 kΩ; −4.5 CL = 50 pF (see Figs 19, 0 −4.5 20 and 21) Philips Semiconductors Product specification Quad bilateral switches 74HC/HCT4316 ADDITIONAL AC CHARACTERISTICS FOR 74HC/HCT Recommended conditions and typical values GND = 0 V; Tamb = 25 °C SYMBOL PARAMETER typ. UNIT VCC (V) VEE (V) Vis(p-p) (V) CONDITIONS sine-wave distortion f = 1 kHz 0.80 0.40 % % 2.25 4.5 −2.25 −4.5 4.0 8.0 RL = 10 kΩ; CL = 50 pF (see Fig.14) sine-wave distortion f = 10 kHz 2.40 1.20 % % 2.25 4.5 −2.25 −4.5 4.0 8.0 RL = 10 kΩ; CL = 50 pF (see Fig.14) switch “OFF” signal feed-through −50 −50 dB dB 2.25 4.5 −2.25 −4.5 note 1 RL = 600 Ω; CL = 50 pF f = 1 MHz (see Figs 12 and 15) crosstalk between any two switches −60 −60 dB dB 2.25 4.5 −2.25 −4.5 note 1 RL = 600 Ω; CL = 50 pF; f = 1 MHz; (see Fig.16) V(p-p) crosstalk voltage between control and any switch (peak-to-peak value) 110 220 mV mV 4.5 4.5 0 −4.5 fmax minimum frequency response (−3 dB) 150 160 MHz MHz 2.25 4.5 −2.25 −4.5 CS maximum switch capacitance 5 pF RL = 600 kΩ; CL = 50 pF; f = 1 MHz (E or nS, square-wave between VCC and GND, tr = tf = 6 ns) (see Fig.17) note 2 RL = 50 Ω ; CL = 10 pF (see Figs 13 and 14) Notes 1. Adjust input voltage Vis to 0 dBm level (0 dBm = 1 mW into 600 Ω). 2. Adjust input voltage Vis to 0 dBm level at VOS for 1 MHz (0 dBm = 1 mW into 50 Ω). General note Vis is the input voltage at an nY or nZ terminal, whichever is assigned as an input. Vos is the output voltage at an nY or nZ terminal, whichever is assigned as an output. Test conditions: VCC = 4.5 V; GND = 0 V; VEE = −4.5 V; RL = 50 Ω; Rsource = 1 kΩ. Fig.12 Typical switch “OFF” signal feed-through as a function of frequency. September 1993 12 Philips Semiconductors Product specification Quad bilateral switches 74HC/HCT4316 Test conditions: VCC = 4.5 V; GND = 0 V; VEE = −4.5 V; RL = 50 Ω; Rsource = 1 kΩ. Fig.13 Typical frequency response. Fig.14 Test circuit for measuring sine-wave distortion and minimum frequency response. Fig.15 Test circuit for measuring switch “OFF” signal feed-through. Fig.16 Test circuit for measuring crosstalk between any two switches. (a) channel ON condition; (b) channel OFF condition. The crosstalk is defined as follows (oscilloscope output): Fig.17 Test circuit for measuring crosstalk between control and any switch. September 1993 13 Philips Semiconductors Product specification Quad bilateral switches 74HC/HCT4316 AC WAVEFORMS Fig.18 Waveforms showing the input (Vis) to output (Vos) propagation delays. (1) HC : VM = 50%; VI = GND to VCC. HCT : VM = 1.3 V; VI = GND to 3 V. Fig.19 Waveforms showing the turn-ON and turn-OFF times. September 1993 14 Philips Semiconductors Product specification Quad bilateral switches 74HC/HCT4316 TEST CIRCUIT AND WAVEFORMS Fig.20 Test circuit for measuring AC performance. Fig.21 Input pulse definitions. Conditions TEST SWITCH Vis tPZH tPZL tPHZ tPLZ others VEE VCC VEE VCC open VCC VEE VCC VEE pulse tr; tf FAMILY AMPLITUDE VM fmax; PULSE WIDTH OTHER 74HC VCC 50% < 2 ns 6 ns 74HCT 3.0 V 1.3 V < 2 ns 6 ns Definitions for Figs 20 and 21: CL = load capacitance including jig and probe capacitance (see AC CHARACTERISTICS for values). RT = termination resistance should be equal to the output impedance ZO of the pulse generator. tr = tf = 6 ns; when measuring fmax, there is no constraint to tr, tf with 50% duty factor. PACKAGE OUTLINES See “74HC/HCT/HCU/HCMOS Logic Package Outlines”. September 1993 15