INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT4514
4-to-16 line decoder/demultiplexer
with input latches
Product specification
File under Integrated Circuits, IC06
September 1993
Philips Semiconductors
Product specification
4-to-16 line decoder/demultiplexer with
input latches
74HC/HCT4514
The 74HC/HCT4514 are 4-to-16 line
decoders/demultiplexers having four binary weighted
address inputs (A0 to A3), with latches, a latch enable input
(LE), and an active LOW enable input (E). The 16 outputs
(Q0 to Q15) are mutually exclusive active HIGH. When LE
is HIGH, the selected output is determined by the data on
An. When LE goes LOW, the last data present at An are
stored in the latches and the outputs remain stable. When
E is LOW, the selected output, determined by the contents
of the latch, is HIGH. At E HIGH, all outputs are LOW. The
enable input (E) does not affect the state of the latch.
FEATURES
• Non-inverting outputs
• Output capability: standard
• ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT4514 are high-speed Si-gate CMOS
devices and are pin compatible with “4514” of the “4000B”
series. They are specified in compliance with JEDEC
standard no. 7A.
When the “4514” is used as a demultiplexer, E is the data
input and A0 to A3 are the address inputs.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
TYPICAL
SYMBOL
PARAMETER
CONDITIONS
UNIT
HC
tPHL/ tPLH
propagation delay An to Qn
CL = 15 pF; VCC = 5 V
CI
input capacitance
CPD
power dissipation capacitance per package
notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi +∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
∑ (CL × VCC2 × fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC − 1.5 V
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
September 1993
2
HCT
23
26
ns
3.5
3.5
pF
44
45
pF
Philips Semiconductors
Product specification
4-to-16 line decoder/demultiplexer with
input latches
74HC/HCT4514
PIN DESCRIPTION
PIN NO.
SYMBOL
NAME AND FUNCTION
1
LE
latch enable input (active HIGH)
2, 3, 21, 22
A0 to A3
address inputs
11, 9, 10, 8, 7, 6, 5, 4, 18, 17, 20, 19, 14, 13, 16, 15
Q0 to Q15
multiplexer outputs (active HIGH)
12
GND
ground (0 V)
23
E
enable input (active LOW)
24
VCC
positive supply voltage
Fig.1 Pin configuration.
September 1993
Fig.2 Logic symbol.
3
Fig.3 IEC logic symbol.
Philips Semiconductors
Product specification
4-to-16 line decoder/demultiplexer with
input latches
74HC/HCT4514
APPLICATIONS
• Digital multiplexing
• Address decoding
• Hexadecimal/BCD decoding
Fig.4 Functional diagram.
FUNCTION TABLE
INPUTS
OUTPUTS
E
A0
A1
A2
A3
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
H
X
X
X
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
H
L
L
H
H
L
L
L
L
L
L
L
L
H
L
L
L
L
H
L
L
L
L
H
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
H
L
L
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
H
L
L
L
L
H
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
H
L
L
H
H
L
L
L
L
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
H
L
L
L
L
H
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
H
L
L
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
H
L
L
L
L
H
L
L
L
L
H
Notes
1. LE = HIGH
H = HIGH voltage level
L = LOW voltage level
X = don’t care
September 1993
4
Q10 Q11 Q12 Q13 Q14 Q15
Philips Semiconductors
Product specification
4-to-16 line decoder/demultiplexer with
input latches
Fig.5 Logic diagram.
September 1993
5
74HC/HCT4514
Philips Semiconductors
Product specification
4-to-16 line decoder/demultiplexer with
input latches
74HC/HCT4514
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
TEST CONDITIONS
74HC
SYMBOL PARAMETER
+25
min.
typ.
max.
−40 to +85
−40 to +125
min.
min.
max.
UNIT V
WAVEFORMS
CC
(V)
max.
tPHL/ tPLH
propagation delay
An to Qn
74
27
22
230
46
39
290
58
49
345
69
59
ns
2.0
4.5
6.0
Fig.6
tPHL/ tPLH
propagation delay
LE to Qn
74
27
22
230
46
39
290
58
49
345
69
59
ns
2.0
4.5
6.0
Fig.6
tPHL/ tPLH
propagation delay
E to Qn
41
15
12
175
35
30
220
44
37
265
53
45
ns
2.0
4.5
6.0
Fig.6
tTHL/ tTLH
output transition time
19
7
6
75
15
13
95
19
16
110
22
19
ns
2.0
4.5
6.0
Fig.6
tW
latch enable pulse width 80
HIGH
16
14
14
5
4
100
20
17
120
24
20
ns
2.0
4.5
6.0
Fig.7
tsu
set-up time
An to LE
90
18
15
25
9
7
115
23
20
135
27
23
ns
2.0
4.5
6.0
Fig.7
th
hold time
An to LE
1
1
1
−11
−4
−3
1
1
1
1
1
1
ns
2.0
4.5
6.0
Fig.7
September 1993
6
Philips Semiconductors
Product specification
4-to-16 line decoder/demultiplexer with
input latches
74HC/HCT4514
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: MSI
Note to HCT types
The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given in the family specifications.
To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.
INPUT
UNIT LOAD COEFFICIENT
An
LE
E
0.65
1.40
1.00
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
TEST CONDITIONS
74HCT
SYMBOL PARAMETER
+25
min.
typ.
max.
−40 to +85
−40 to +125
min. max.
min.
UNIT V
WAVEFORMS
CC
(V)
max.
tPHL/ tPLH
propagation delay
An to Qn
30
55
69
83
ns
4.5
Fig.6
tPHL/ tPLH
propagation delay
LE to Qn
29
50
63
75
ns
4.5
Fig.6
tPHL/ tPLH
propagation delay
E to Qn
17
40
50
60
ns
4.5
Fig.6
tTHL/ tTLH
output transition time
7
15
19
22
ns
4.5
Fig.6
tW
latch enable pulse width
HIGH
16
4
20
24
ns
4.5
Fig.7
tsu
set-up time
An to LE
18
9
23
27
ns
4.5
Fig.7
th
hold time
An to LE
3
−3
3
3
ns
4.5
Fig.7
September 1993
7
Philips Semiconductors
Product specification
4-to-16 line decoder/demultiplexer with
input latches
74HC/HCT4514
AC WAVEFORMS
(1) HC : VM = 50%; VI = GND to VCC.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.6 Waveforms showing the input (An, LE, E) to output (Qn) propagation delays and the output transition times.
The shaded areas indicate when the input is permitted to
change for predictable output performance.
(1) HC : VM = 50%; VI = GND to VCC.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.7
Waveforms showing the minimum pulse width of the latch enable input (LE) and the set-up and hold times
for LE to An. Set-up and hold times are shown as positive values but may be specified as negative values.
September 1993
8
Philips Semiconductors
Product specification
4-to-16 line decoder/demultiplexer with
input latches
APPLICATION INFORMATION
Fig.8 Code-to-code conversion; hexadecimal to BCD.
PACKAGE OUTLINES
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.
September 1993
9
74HC/HCT4514
Philips Semiconductors - PIP - 74HC/HCT4514; 4-to-16 line decoder/demultiplexer with input latches
74HC/HCT4514; 4-to-16 line
decoder/demultiplexer with
input latches
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Datasheet
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General description
The 74HC/HCT4514 are high-speed Si-gate CMOS devices and are pin compatible with '4514' of the '4000B' series. They
are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT4514 are 4-to-16 line decoders/demultiplexers having four binary weighted address inputs (A0 to A3), with
latches, a latch enable input (LE), and an active LOW enable input (E). The 16 outputs (Q0 to Q15) are mutually exclusive
active HIGH. When LE is HIGH, the selected output is determined by the data on An. When LE goes LOW, the last data
present at An are stored in the latches and the outputs remain stable. When E is LOW, the selected output, determined by
the contents of the latch, is HIGH. At E HIGH, all outputs are LOW. The enable input (E) does not affect the state of the
latch.
When the '4514' is used as a demultiplexer, E is the data input and A0 to A3 are the address inputs.
Features
●
●
●
Non-inverting outputs
Output capability: standard
ICC category: MSI
Datasheet
Type number
Title
74HC/HCT4514 4-to-16 line
decoder/demultiplexer with
input latches
Publication
release date
Datasheet status Page
count
File
size
(kB)
01-Sep-93
Product
specification
74
9
Datasheet
Download
Additional datasheet info
To complete the device datasheet with package and family information, also download the following PDF files. The "Logic
Package Information" document is required to determine in which package(s) this device is available.
Document
1
Description
HCT_FAMILY_SPECIFICATIONS HC/T Family Specifications, The IC06 74HC/HCT/HCMOS Logic Family
Specifications
file:///D|/SUD/PHGLS10940-1.htm (1 of 4) [11/28/02 10:11:30 AM]
Philips Semiconductors - PIP - 74HC/HCT4514; 4-to-16 line decoder/demultiplexer with input latches
2
HCT_PACKAGE_INFO
HC/T Package Info, The IC06 74HC/HCT/HCMOS Logic Package
Information
3
HCT_PACKAGE_OUTLINES
HC/T Package Outlines, The IC06 74HC/HCT/HCMOS Logic Package
Outlines
Parametrics
Type number
Package
Description
74HC4514D
SOT137
(SO24)
4-of-16
Decoder/Demultiplexer
with Input Latches;
15
Outputs LOW at Data
Input HIGH
5 Volts
24
+
Low Power or
Battery
Applications
CMOS
Low
74HC4514DB
4-of-16
Decoder/Demultiplexer
SOT340-1
with Input Latches;
15
(SSOP24)
Outputs LOW at Data
Input HIGH
5 Volts
24
+
Low Power or
Battery
Applications
CMOS
Low
74HC4514N
4-of-16
Decoder/Demultiplexer
SOT101-1
with Input Latches;
15
(DIP24)
Outputs LOW at Data
Input HIGH
5 Volts
24
+
Low Power or
Battery
Applications
CMOS
Low
4-of-16
Decoder/Demultiplexer
SOT355-1
74HC4514PW
with Input Latches;
15
(TSSOP24)
Outputs LOW at Data
Input HIGH
5 Volts
24
+
Low Power or
Battery
Applications
CMOS
Low
uncased
die
4-of-16
Decoder/Demultiplexer
with Input Latches;
15
Outputs LOW at Data
Input HIGH
5 Volts
24
+
Low Power or
Battery
Applications
CMOS
Low
SOT137
(SO24)
4-of-16
Decoder/Demultiplexer
with Input Latches;
15
Outputs LOW at Data
Input HIGH; TTL
Enabled
5 Volts
24
+
Low Power or
Battery
Applications
TTL
Low
4-of-16
Decoder/Demultiplexer
SOT340-1 with Input Latches;
74HCT4514DB
15
(SSOP24) Outputs LOW at Data
Input HIGH; TTL
Enabled
5 Volts
24
+
Low Power or
Battery
Applications
TTL
Low
4-of-16
Decoder/Demultiplexer
SOT101-1 with Input Latches;
15
Outputs LOW at Data
(DIP24)
Input HIGH; TTL
Enabled
5 Volts
24
+
Low Power or
Battery
Applications
TTL
Low
74HC4514U
74HCT4514D
74HCT4514N
file:///D|/SUD/PHGLS10940-1.htm (2 of 4) [11/28/02 10:11:30 AM]
Propagation Voltage No. Power
Logic
Output
Delay(ns)
of Dissipation
Switching Drive
Pins Considerations Levels
Capability
Philips Semiconductors - PIP - 74HC/HCT4514; 4-to-16 line decoder/demultiplexer with input latches
4-of-16
Decoder/Demultiplexer
SOT355-1 with Input Latches;
74HCT4514PW
15
(TSSOP24) Outputs LOW at Data
Input HIGH; TTL
Enabled
5 Volts
24
+
Low Power or
Battery
Applications
TTL
Low
4-of-16
Decoder/Demultiplexer
with Input Latches;
15
Outputs LOW at Data
Input HIGH; TTL
Enabled
5 Volts
24
+
Low Power or
Battery
Applications
TTL
Low
74HCT4514U
uncased
die
Products, packages, availability and ordering
Type number
North American Ordering code
type number
(12NC)
Marking/Packing Package
Device status
Buy online
Discretes packing
info
74HC4514D
Standard Marking
9337 156 70652 * Bulk Pack,
CECC
SOT137
(SO24)
Full production
74HC4514D-T
Standard Marking
SOT137
9337 156 70653 * Reel Pack, SMD,
(SO24)
13", CECC
Full production
74HC4514DB
9351 900 90112
74HC4514DB-T
Standard Marking
SOT340-1
9351 900 90118 * Reel Pack, SMD,
Full production
(SSOP24)
13"
74HC4514N
74HC4514N
Standard Marking
9336 710 40652 * Bulk Pack,
CECC
74HC4514PW
74HC4514PW
9352 624 15112
74HC4514PW-T
Standard Marking SOT355-1
9352 624 15118 * Reel Pack, SMD, (TSSOP24) Full production
13"
74HC4514D
74HC4514DB
SOT101-1
(DIP24)
Full production
Full production
SOT355-1
(TSSOP24) Full production
Full production
74HCT4514D
Standard Marking
9337 156 90652 * Bulk Pack,
CECC
SOT137
(SO24)
Full production
74HCT4514D-T
Standard Marking
SOT137
9337 156 90653 * Reel Pack, SMD,
(SO24)
13", CECC
Full production
74HCT4514DB 74HCT4514DB
74HCT4514N
Standard Marking
* Bulk Pack
SOT340-1
(SSOP24)
No Marking *
NAU000
9338 396 30005 Chips on Wafer,
Pre-Sawn, On FFC
74HC4514U
74HCT4514D
Standard Marking
* Bulk Pack
9351 900 80112
Standard Marking
* Bulk Pack
SOT340-1
(SSOP24)
Full production
74HCT4514DBT
Standard Marking
SOT340-1
9351 900 80118 * Reel Pack, SMD,
Full production
(SSOP24)
13"
74HCT4514N
Standard Marking
9336 710 70652 * Bulk Pack,
CECC
file:///D|/SUD/PHGLS10940-1.htm (3 of 4) [11/28/02 10:11:30 AM]
SOT101-1
(DIP24)
Full production
-
Philips Semiconductors - PIP - 74HC/HCT4514; 4-to-16 line decoder/demultiplexer with input latches
74HCT4514PW 74HCT4514PW
74HCT4514PWT
9352 624 14112
Standard Marking
* Bulk Pack
SOT355-1
(TSSOP24) Full production
Standard Marking SOT355-1
9352 624 14118 * Reel Pack, SMD, (TSSOP24) Full production
13"
No Marking *
NAU000
9338 396 40005 Chips on Wafer,
Pre-Sawn, On FFC
74HCT4514U
Full production
-
Products in the above table are all in production. Some variants are discontinued; click here for information on these
variants.
Similar products
74HC/HCT4514 links to the similar products page containing an overview of products that are similar in function or
related to the type number(s) as listed on this page. The similar products page includes products from the same catalog
tree(s), relevant selection guides and products from the same functional category.
Support & tools
HC/T Family Specifications, The IC06 74HC/HCT/HCMOS Logic Family Specifications (date 01-Mar-98)
HC/T User Guide (date 01-Nov-97)
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