NX3L1G3157_10

NX3L1G3157 Low-ohmic single-pole double-throw analog switch Rev. 08 — 26 April 2010 Product data sheet 1. General description The NX3L1G3157 is a low-ohmic single-pole double-throw analog switch suitable for use as an analog or digital 2:1 multiplexer/demultiplexer. It has a digital select input (S), two independent inputs/outputs (Y0 and Y1) and a common input/output (Z). Schmitt-trigger action at the digital input makes the circuit tolerant to slower input rise and fall times. The NX3L1G3157 allows signals with amplitude up to VCC to be transmitted from Z to Y0 or Y1; or from Y0 or Y1 to Z. Its low ON resistance (0.5 Ω) and flatness (0.13 Ω) ensures minimal attenuation and distortion of transmitted signals. 2. Features and benefits Wide supply voltage range from 1.4 V to 4.3 V Very low ON resistance: 1.6 Ω (typical) at VCC = 1.4 V 1.0 Ω (typical) at VCC = 1.65 V 0.55 Ω (typical) at VCC = 2.3 V 0.50 Ω (typical) at VCC = 2.7 V 0.50 Ω (typical) at VCC = 4.3 V Break-before-make switching High noise immunity ESD protection: HBM JESD22-A114F Class 3A exceeds 7500 V MM JESD22-A115-A exceeds 200 V CDM AEC-Q100-011 revision B exceeds 1000 V IEC61000-4-2 contact discharge exceeds 8000 V for switch ports CMOS low-power consumption Latch-up performance exceeds 100 mA per JESD78 Class II Level A Direct interface with TTL levels at 3.0 V Control input accepts voltages above supply voltage High current handling capability (350 mA continuous current under 3.3 V supply) Specified from −40 °C to +85 °C and from −40 °C to +125 °C NXP Semiconductors NX3L1G3157 Low-ohmic single-pole double-throw analog switch 3. Applications Cell phone PDA Portable media player 4. Ordering information Table 1. Ordering information Package Temperature range NX3L1G3157GW NX3L1G3157GM −40 °C to +125 °C −40 °C to +125 °C Name SC-88 XSON6 Description plastic surface-mounted package; 6 leads plastic extremely thin small outline package; no leads; 6 terminals; body 1 × 1.45 × 0.5 mm Version SOT363 SOT886 Type number 5. Marking Table 2. Marking codes[1] Marking code MJ MJ Type number NX3L1G3157GW NX3L1G3157GM [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 6. Functional diagram Y1 S S6 1 Y1 Z4 3 Y0 001aac354 Z Y0 001aac355 Fig 1. Logic symbol Fig 2. Logic diagram NX3L1G3157_8 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 08 — 26 April 2010 2 of 22 NXP Semiconductors NX3L1G3157 Low-ohmic single-pole double-throw analog switch 7. Pinning information 7.1 Pinning NX3L1G3157 NX3L1G3157 Y1 GND 1 2 6 5 S GND VCC Y0 Y0 3 001aai592 Y1 1 6 S 2 5 VCC 3 4 Z 4 Z 001aag562 Transparent top view Fig 3. Pin configuration SOT363 (SC-88) Fig 4. Pin configuration SOT886 (XSON6) 7.2 Pin description Table 3. Symbol Y1 GND Y0 Z VCC S Pin description Pin 1 2 3 4 5 6 Description independent input or output ground (0 V) independent input or output common output or input supply voltage select input 8. Functional description Table 4. Input S L H [1] H = HIGH voltage level; L = LOW voltage level. Function table[1] Channel on Y0 Y1 NX3L1G3157_8 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 08 — 26 April 2010 3 of 22 NXP Semiconductors NX3L1G3157 Low-ohmic single-pole double-throw analog switch 9. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC VI VSW IIK ISK ISW Parameter supply voltage input voltage switch voltage input clamping current switch clamping current switch current VI < −0.5 V VI < −0.5 V or VI > VCC + 0.5 V VSW > −0.5 V or VSW < VCC + 0.5 V; source or sink current VSW > −0.5 V or VSW < VCC + 0.5 V; pulsed at 1 ms duration, < 10 % duty cycle; peak current Tstg Ptot [1] [2] [3] Conditions select input S [1] [2] Min −0.5 −0.5 −0.5 −50 - Max +4.6 +4.6 ±50 ±350 ±500 Unit V V mA mA mA mA VCC + 0.5 V storage temperature total power dissipation Tamb = −40 °C to +125 °C [3] −65 - +150 250 °C mW The minimum input voltage rating may be exceeded if the input current rating is observed. The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed but may not exceed 4.6 V. For SC-88 package: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K. For XSON6 package: above 118 °C the value of Ptot derates linearly with 7.8 mW/K. 10. Recommended operating conditions Table 6. VCC VI VSW Tamb Δt/ΔV [1] Recommended operating conditions Conditions select input S [1] Symbol Parameter supply voltage input voltage switch voltage ambient temperature input transition rise and fall rate Min 1.4 0 0 −40 - Max 4.3 4.3 VCC +125 200 Unit V V V °C ns/V VCC = 1.4 V to 4.3 V [2] To avoid sinking GND current from terminal Z when switch current flows in terminal Yn, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal Z, no GND current will flow from terminal Yn. In this case, there is no limit for the voltage drop across the switch. Applies to control signal levels. [2] NX3L1G3157_8 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 08 — 26 April 2010 4 of 22 NXP Semiconductors NX3L1G3157 Low-ohmic single-pole double-throw analog switch 11. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground 0 V). Symbol Parameter Conditions Min VIH HIGH-level input voltage VCC = 1.4 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 3.6 V to 4.3 V VIL LOW-level input voltage VCC = 1.4 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 3.6 V to 4.3 V II input leakage current OFF-state leakage current select input S; VI = GND to 4.3 V; VCC = 1.4 V to 4.3 V Y0 and Y1 port; see Figure 5 VCC = 1.4 V to 3.6 V VCC = 3.6 V to 4.3 V IS(ON) ON-state leakage current Z port; see Figure 6 VCC = 1.4 V to 3.6 V VCC = 3.6 V to 4.3 V ±5 ±10 ±50 ±50 ±500 ±500 nA nA ±5 ±10 ±50 ±50 ±500 ±500 nA nA 0.65VCC 1.7 2.0 0.7VCC Tamb = 25 °C Typ Max 0.35VCC 0.7 0.8 0.3VCC Tamb = −40 °C to +125 °C Min 0.65VCC 1.7 2.0 0.7VCC Max Max (85 °C) (125 °C) 0.7 0.8 0.3VCC ±0.5 0.7 0.8 ±1 V V V V V V μA Unit 0.35VCC 0.35VCC V 0.3VCC V IS(OFF) ICC supply current VI = VCC or GND; VSW = GND or VCC VCC = 3.6 V VCC = 4.3 V 1.0 35 130 100 150 690 800 6000 7000 nA nA pF pF pF CI CS(OFF) CS(ON) input capacitance OFF-state capacitance ON-state capacitance NX3L1G3157_8 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 08 — 26 April 2010 5 of 22 NXP Semiconductors NX3L1G3157 Low-ohmic single-pole double-throw analog switch 11.1 Test circuits switch 1 VIL or VIH S Z Y0 Y1 1 2 2 switch IS S VIH VIL VCC VI VO GND 001aac358 VI = 0.3 V or VCC − 0.3 V; VO = VCC − 0.3 V or 0.3 V. Fig 5. Test circuit for measuring OFF-state leakage current VCC S Z Y0 Y1 1 2 switch 1 S VIH VIL VIL or VIH IS VI 2 switch VO GND 001aac359 VI = 0.3 V or VCC − 0.3 V; VO = VCC − 0.3 V or 0.3 V. Fig 6. Test circuit for measuring ON-state leakage current NX3L1G3157_8 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 08 — 26 April 2010 6 of 22 NXP Semiconductors NX3L1G3157 Low-ohmic single-pole double-throw analog switch 11.2 ON resistance Table 8. ON resistance At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for graphs see Figure 8 to Figure 14. Symbol RON(peak) Parameter ON resistance (peak) Conditions VI = GND to VCC; ISW = 100 mA; see Figure 7 VCC = 1.4 V VCC = 1.65 V VCC = 2.3 V VCC = 2.7 V VCC = 4.3 V ΔRON ON resistance mismatch between channels VI = GND to VCC; ISW = 100 mA VCC = 1.4 V VCC = 1.65 V VCC = 2.3 V VCC = 2.7 V VCC = 4.3 V RON(flat) ON resistance (flatness) VI = GND to VCC; ISW = 100 mA VCC = 1.4 V VCC = 1.65 V VCC = 2.3 V VCC = 2.7 V VCC = 4.3 V [1] [2] [3] Typical values are measured at Tamb = 25 °C. Measured at identical VCC, temperature and input voltage. Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical VCC and temperature. [3] [2] Tamb = −40 °C to +85 °C Tamb = −40 °C to +125 °C Unit Min Typ[1] Max Min Max - 1.6 1.0 0.55 0.5 0.5 3.7 1.6 0.8 0.75 0.75 - 4.1 1.7 0.9 0.9 0.9 Ω Ω Ω Ω Ω - 0.04 0.04 0.02 0.02 0.02 0.3 0.2 0.08 0.075 0.075 - 0.3 0.3 0.1 0.1 0.1 Ω Ω Ω Ω Ω - 1.0 0.5 0.15 0.13 0.2 3.3 1.2 0.3 0.3 0.4 - 3.6 1.3 0.35 0.35 0.45 Ω Ω Ω Ω Ω NX3L1G3157_8 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 08 — 26 April 2010 7 of 22 NXP Semiconductors NX3L1G3157 Low-ohmic single-pole double-throw analog switch 11.3 ON resistance test circuit and graphs 1.6 RON (Ω) 1.2 001aag564 VSW V VCC S Z VI (1) 0.8 switch 1 S VIL VIH 0.4 (2) (3) (4) (5) (6) VIL or VIH Y0 1 switch Y1 2 2 ISW GND 001aag563 0 0 1 2 3 4 VI (V) 5 RON = VSW / ISW. (1) VCC = 1.5 V. (2) VCC = 1.8 V. (3) VCC = 2.5 V. (4) VCC = 2.7 V. (5) VCC = 3.3 V. (6) VCC = 4.3 V. Measured at Tamb = 25 °C. Fig 7. Test circuit for measuring ON resistance Fig 8. Typical ON resistance as a function of input voltage NX3L1G3157_8 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 08 — 26 April 2010 8 of 22 NXP Semiconductors NX3L1G3157 Low-ohmic single-pole double-throw analog switch 1.6 RON (Ω) 1.2 001aag565 1.0 RON (Ω) 0.8 (1) (2) (3) (4) 001aag566 0.6 0.8 (1) (2) (3) (4) 0.4 0.4 0.2 0 0 1 2 VI (V) 3 0 0 1 2 VI (V) 3 (1) Tamb = 125 °C. (2) Tamb = 85 °C. (3) Tamb = 25 °C. (4) Tamb = −40 °C. (1) Tamb = 125 °C. (2) Tamb = 85 °C. (3) Tamb = 25 °C. (4) Tamb = −40 °C. Fig 9. ON resistance as a function of input voltage; VCC = 1.5 V Fig 10. ON resistance as a function of input voltage; VCC = 1.8 V 1.0 RON (Ω) 0.8 001aag567 1.0 RON (Ω) 0.8 001aag568 0.6 (1) (2) (3) (4) 0.6 (1) (2) (3) (4) 0.4 0.4 0.2 0.2 0 0 1 2 VI (V) 3 0 0 1 2 VI (V) 3 (1) Tamb = 125 °C. (2) Tamb = 85 °C. (3) Tamb = 25 °C. (4) Tamb = −40 °C. (1) Tamb = 125 °C. (2) Tamb = 85 °C. (3) Tamb = 25 °C. (4) Tamb = −40 °C. Fig 11. ON resistance as a function of input voltage; VCC = 2.5 V Fig 12. ON resistance as a function of input voltage; VCC = 2.7 V NX3L1G3157_8 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 08 — 26 April 2010 9 of 22 NXP Semiconductors NX3L1G3157 Low-ohmic single-pole double-throw analog switch 1.0 RON (Ω) 0.8 001aag569 1.0 RON (Ω) 0.8 001aaj896 0.6 (1) (2) (3) (4) 0.6 (1) (2) (3) (4) 0.4 0.4 0.2 0.2 0 0 1 2 3 VI (V) 4 0 0 1 2 3 4 VI (V) 5 (1) Tamb = 125 °C. (2) Tamb = 85 °C. (3) Tamb = 25 °C. (4) Tamb = −40 °C. (1) Tamb = 125 °C. (2) Tamb = 85 °C. (3) Tamb = 25 °C. (4) Tamb = −40 °C. Fig 13. ON resistance as a function of input voltage; VCC = 3.3 V Fig 14. ON resistance as a function of input voltage; VCC = 4.3 V 12. Dynamic characteristics Table 9. Dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see Figure 17. Symbol Parameter Conditions Tamb = 25 °C Min ten enable time S to Z or Yn; see Figure 15 VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 3.6 V to 4.3 V tdis disable time S to Z or Yn; see Figure 15 VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 3.6 V to 4.3 V 9 6 5 4 4 20 15 11 10 10 25 20 14 12 12 30 23 16 14 14 ns ns ns ns ns 28 23 17 14 14 43 35 27 25 25 48 38 29 27 27 52 42 32 30 30 ns ns ns ns ns Typ[1] Max Tamb = −40 °C to +125 °C Min Max (85 °C) Max (125 °C) Unit NX3L1G3157_8 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 08 — 26 April 2010 10 of 22 NXP Semiconductors NX3L1G3157 Low-ohmic single-pole double-throw analog switch Table 9. Dynamic characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see Figure 17. Symbol Parameter Conditions Tamb = 25 °C Min tb-m break-before-make see Figure 16 time VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 3.6 V to 4.3 V [1] [2] [2] Tamb = −40 °C to +125 °C Min Max (85 °C) Max (125 °C) - Unit Typ[1] Max - 19 17 13 10 10 - 4 4 2 2 2 ns ns ns ns ns Typical values are measured at Tamb = 25 °C and VCC = 1.5 V, 1.8 V, 2.5 V, 3.3 V and 4.3 V respectively. Break-before-make guaranteed by design. 12.1 Waveform and test circuits VI S input GND ten VOH Y1 connected to VEXT Z output OFF to HIGH HIGH to OFF GND tdis Z output HIGH to OFF OFF to HIGH VOH VX ten VX 001aag570 VM tdis VX VX Y0 connected to VEXT GND Measurement points are given in Table 10. Logic level: VOH is typical output voltage level that occurs with the output load. Fig 15. Enable and disable times Table 10. VCC 1.4 V to 4.3 V Measurement points Input VM 0.5VCC Output VX 0.9VOH Supply voltage NX3L1G3157_8 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 08 — 26 April 2010 11 of 22 NXP Semiconductors NX3L1G3157 Low-ohmic single-pole double-throw analog switch VCC S Z Y0 Y1 VEXT = 1.5 V G VI V VO RL CL GND 001aag571 a. Test circuit VI 0.5VI 0.9VO VO tb-m 0.9VO 001aag572 b. Input and output measurement points Fig 16. Test circuit for measuring break-before-make timing VCC S Z Y0 Y1 1 2 switch G VI V VO RL CL VEXT = 1.5 V GND 001aag642 Test data is given in Table 11. Definitions test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. VEXT = External voltage for measuring switching times. Fig 17. Load circuit for switching times Table 11. VCC 1.4 V to 4.3 V Test data Input VI VCC tr, tf ≤ 2.5 ns Load CL 35 pF RL 50 Ω Supply voltage NX3L1G3157_8 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 08 — 26 April 2010 12 of 22 NXP Semiconductors NX3L1G3157 Low-ohmic single-pole double-throw analog switch 12.2 Additional dynamic characteristics Table 12. Additional dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); VI = GND or VCC (unless otherwise specified); tr = tf ≤ 2.5 ns; Tamb = 25 °C. Symbol Parameter THD total harmonic distortion Conditions fi = 20 Hz to 20 kHz; RL = 32 Ω; see Figure 18 VCC = 1.4 V; VI = 1 V (p-p) VCC = 1.65 V; VI = 1.2 V (p-p) VCC = 2.3 V; VI = 1.5 V (p-p) VCC = 2.7 V; VI = 2 V (p-p) VCC = 4.3 V; VI = 2 V (p-p) f(−3dB) αiso Vct −3 dB frequency response isolation (OFF-state) crosstalk voltage RL = 50 Ω; see Figure 19 VCC = 1.4 V to 4.3 V fi = 100 kHz; RL = 50 Ω; see Figure 20 VCC = 1.4 V to 4.3 V between digital inputs and switch; fi = 1 MHz; CL = 50 pF; RL = 50 Ω; see Figure 21 VCC = 1.4 V to 3.6 V VCC = 3.6 V to 4.3 V Qinj charge injection fi = 1 MHz; CL = 0.1 nF; RL = 1 MΩ; Vgen = 0 V; Rgen = 0 Ω; see Figure 22 VCC = 1.5 V VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V VCC = 4.3 V [1] fi is biased at 0.5VCC. [1] [1] [1] Min - Typ 0.15 0.10 0.02 0.02 0.02 60 −90 Max - Unit % % % % % MHz dB - 0.2 0.3 - V V - 3 4 6 9 15 - pC pC pC pC pC 12.3 Test circuits VCC 0.5VCC RL switch 1 S VIL VIH VIL or VIH S Z Y0 1 switch Y1 2 2 fi D GND 001aag573 Fig 18. Test circuit for measuring total harmonic distortion NX3L1G3157_8 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 08 — 26 April 2010 13 of 22 NXP Semiconductors NX3L1G3157 Low-ohmic single-pole double-throw analog switch VCC 0.5VCC RL switch 1 S VIL VIH VIL or VIH S Z Y0 1 switch Y1 2 2 fi dB GND 001aag574 Adjust fi voltage to obtain 0 dBm level at output. Increase fi frequency until dB meter reads −3 dB. Fig 19. Test circuit for measuring the frequency response when channel is in ON-state 0.5VCC RL VCC 0.5VCC RL switch 1 S VIH VIL VIL or VIH S Z Y0 1 switch Y1 2 2 fi dB GND 001aag561 Adjust fi voltage to obtain 0 dBm level at input. Fig 20. Test circuit for measuring isolation (OFF-state) NX3L1G3157_8 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 08 — 26 April 2010 14 of 22 NXP Semiconductors NX3L1G3157 Low-ohmic single-pole double-throw analog switch switch VCC 1 2 S Z G logic input Y0 Y1 1 2 switch S VIL VIH VI RL RL CL V VO 0.5VCC 0.5VCC 001aah442 a. Test circuit logic input (S) off on off VO Vct 001aah443 b. Input and output pulse definitions Fig 21. Test circuit for measuring crosstalk voltage between digital inputs and switch NX3L1G3157_8 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 08 — 26 April 2010 15 of 22 NXP Semiconductors NX3L1G3157 Low-ohmic single-pole double-throw analog switch VCC S Z Y0 Y1 1 2 Rgen VI switch G VO RL CL Vgen GND 001aac366 a. Test circuit logic (S) off input on off VO ΔVO 001aac478 b. Input and output pulse definitions Definition: Qinj = ΔVO × CL. ΔVO = output voltage variation. Rgen = generator resistance. Vgen = generator voltage. Fig 22. Test circuit for measuring charge injection NX3L1G3157_8 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 08 — 26 April 2010 16 of 22 NXP Semiconductors NX3L1G3157 Low-ohmic single-pole double-throw analog switch 13. Package outline Plastic surface-mounted package; 6 leads SOT363 D B E A X y HE vMA 6 5 4 Q pin 1 index A A1 1 e1 e 2 bp 3 wM B detail X Lp c 0 1 scale 2 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.8 A1 max 0.1 bp 0.30 0.20 c 0.25 0.10 D 2.2 1.8 E 1.35 1.15 e 1.3 e1 0.65 HE 2.2 2.0 Lp 0.45 0.15 Q 0.25 0.15 v 0.2 w 0.2 y 0.1 OUTLINE VERSION SOT363 REFERENCES IEC JEDEC JEITA SC-88 EUROPEAN PROJECTION ISSUE DATE 04-11-08 06-03-16 Fig 23. Package outline SOT363 (SC-88) NX3L1G3157_8 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 08 — 26 April 2010 17 of 22 NXP Semiconductors NX3L1G3157 Low-ohmic single-pole double-throw analog switch XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm SOT886 b 1 2 3 4× L1 L (2) e 6 e1 5 e1 4 6× (2) A A1 D E terminal 1 index area 0 DIMENSIONS (mm are the original dimensions) UNIT mm A (1) max 0.5 A1 max 0.04 b 0.25 0.17 D 1.5 1.4 E 1.05 0.95 e 0.6 e1 0.5 L 0.35 0.27 L1 0.40 0.32 1 scale 2 mm Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. OUTLINE VERSION SOT886 REFERENCES IEC JEDEC MO-252 JEITA EUROPEAN PROJECTION ISSUE DATE 04-07-15 04-07-22 Fig 24. Package outline SOT886 (XSON6) NX3L1G3157_8 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 08 — 26 April 2010 18 of 22 NXP Semiconductors NX3L1G3157 Low-ohmic single-pole double-throw analog switch 14. Abbreviations Table 13. Acronym CDM CMOS ESD HBM MM PDA TTL Abbreviations Description Charged Device Model Complementary Metal-Oxide Semiconductor ElectroStatic Discharge Human Body Model Machine Model Personal Digital Assistant Transistor-Transistor Logic 15. Revision history Table 14. Revision history Release date 20100426 Data sheet status Product data sheet Product data sheet Product data sheet Product data sheet Product data sheet Product data sheet Product data sheet Product data sheet Change notice Supersedes NX3L1G3157_7 NX3L1G3157_6 NX3L1G3157_5 NX3L1G3157_4 NX3L1G3157_3 NX3L1G3157_2 NX3L1G3157_1 Document ID NX3L1G3157_8 Modifications: NX3L1G3157_7 NX3L1G3157_6 NX3L1G3157_5 NX3L1G3157_4 NX3L1G3157_3 NX3L1G3157_2 NX3L1G3157_1 • Table 8: ON resistance mismatch between channels changed at VCC = 4.3 V. 20100324 20100208 20090407 20080730 20080721 20080415 20071008 NX3L1G3157_8 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 08 — 26 April 2010 19 of 22 NXP Semiconductors NX3L1G3157 Low-ohmic single-pole double-throw analog switch 16. Legal information 16.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 16.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 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Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on a weakness or default in the customer application/use or the application/use of customer’s third party customer(s) (hereinafter both referred to as “Application”). It is customer’s sole responsibility to check whether the NXP Semiconductors product is suitable and fit for the Application planned. Customer has to do all necessary testing for the Application in order to avoid a default of the Application and the product. NXP Semiconductors does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 16.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. The product is not designed, authorized or warranted to be NX3L1G3157_8 16.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 08 — 26 April 2010 20 of 22 NXP Semiconductors NX3L1G3157 Low-ohmic single-pole double-throw analog switch 17. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com NX3L1G3157_8 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 08 — 26 April 2010 21 of 22 NXP Semiconductors NX3L1G3157 Low-ohmic single-pole double-throw analog switch 18. Contents 1 2 3 4 5 6 7 7.1 7.2 8 9 10 11 11.1 11.2 11.3 12 12.1 12.2 12.3 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 ON resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 7 ON resistance test circuit and graphs. . . . . . . . 8 Dynamic characteristics . . . . . . . . . . . . . . . . . 10 Waveform and test circuits . . . . . . . . . . . . . . . 11 Additional dynamic characteristics . . . . . . . . . 13 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 17 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 19 Legal information. . . . . . . . . . . . . . . . . . . . . . . 20 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 20 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Contact information. . . . . . . . . . . . . . . . . . . . . 21 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2010. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 26 April 2010 Document identifier: NX3L1G3157_8