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FDD6760A
N-Channel PowerTrench® MOSFET
25 V, 3.2 mΩ
Features
General Description
Max rDS(on) = 3.2 mΩ at VGS = 10 V, ID = 27 A
This N-Channel MOSFET has been designed specifically to
improve the overall efficiency of DC/DC converters using either
synchronous or conventional switching PWM controllers. It has
been optimized for low gate charge, low rDS(on) and fast
switching speed.
Max rDS(on) = 6.0 mΩ at VGS = 4.5 V, ID = 21 A
100% UIL test
RoHS Compliant
Applications
Vcore DC-DC for Desktop Computers and Servers
VRM for Intermediate Bus Architecture
D
D
G
S
G
D-PAK
TO -252
(TO-252)
S
MOSFET Maximum Ratings TC = 25 °C unless otherwise noted
Symbol
VDS
Drain to Source Voltage
Parameter
VGS
Gate to Source Voltage
Drain Current -Continuous (Package limited)
ID
TC = 25 °C
-Continuous (Silicon limited)
TC = 25 °C
-Continuous
TA = 25 °C
PD
TJ, TSTG
Units
V
±20
V
50
131
(Note 1a)
-Pulsed
27
A
200
Single Pulse Avalanche Energy
EAS
Ratings
25
(Note 3)
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
72
65
(Note 1a)
Operating and Storage Junction Temperature Range
3.7
-55 to +175
mJ
W
°C
Thermal Characteristics
RθJC
Thermal Resistance, Junction to Case
RθJA
Thermal Resistance, Junction to Ambient
2.3
(Note 1a)
40
°C/W
Package Marking and Ordering Information
Device Marking
FDD6760A
Device
FDD6760A
©2009 Fairchild Semiconductor Corporation
FDD6760A Rev. 1.2
Package
D-PAK (TO-252)
1
Reel Size
13 ’’
Tape Width
16 mm
Quantity
2500 units
www.fairchildsemi.com
FDD6760A N-Channel Power Trench® MOSFET
March 2015
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 µA, VGS = 0 V
∆BVDSS
∆TJ
Breakdown Voltage Temperature
Coefficient
ID = 250 µA, referenced to 25 °C
IDSS
Zero Gate Voltage Drain Current
VDS = 20 V, VGS = 0 V
1
µA
IGSS
Gate to Source Leakage Current
VGS = ±20 V, VDS = 0 V
±100
nA
3.0
V
25
V
16
mV/°C
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 µA
∆VGS(th)
∆TJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 µA, referenced to 25 °C
rDS(on)
Static Drain to Source On Resistance
gFS
Forward Transconductance
1.0
1.6
-7
mV/°C
VGS = 10 V, ID = 27 A
2.3
3.2
VGS = 4.5 V, ID = 21 A
4.4
6.0
VGS = 10 V, ID = 27 A, TJ = 150 °C
3.5
4.9
VDS = 5 V, ID = 27 A
186
mΩ
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate Resistance
VDS = 13 V, VGS = 0 V,
f = 1MHz
f = 1MHz
2380
3170
pF
525
700
pF
470
710
pF
Ω
1.3
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
VDD = 13 V, ID = 27 A,
VGS = 10 V, RGEN = 6 Ω
Qg
Total Gate Charge
VGS = 0 V to 10 V
Qg
Total Gate Charge
VGS = 0 V to 5 V
Qgs
Gate to Source Charge
Qgd
Gate to Drain “Miller” Charge
VDD = 13 V,
ID = 17 A
10
20
ns
9
18
ns
28
ns
6
ns
44
62
25
35
nC
nC
6
nC
9.9
nC
Drain-Source Diode Characteristics
VSD
Source to Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 3.1 A
(Note 2)
0.7
1.2
VGS = 0 V, IS = 27 A
(Note 2)
0.8
1.3
IF = 27A, di/dt = 100 A/µs
V
21
34
ns
8
16
nC
Notes:
1: RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
RθJC is guaranteed by design while RθJA is determined by the user’s board design.
a) 40 °C/W when mounted on a
1 in2 pad of 2 oz copper
b) 96 °C/W when mounted
on a minimum pad.
2: Pulse Test: Pulse Width < 300 µs, Duty cycle < 2.0%.
3: EAS of 72 mJ is based on starting TJ = 25 °C, L = 1 mH, IAS = 12 A, VDD = 23 V, VGS = 10 V. 100% test at L = 0.1 mH, IAS = 29 A.
©2009 Fairchild Semiconductor Corporation
FDD6760A Rev. 1.2
2
www.fairchildsemi.com
FDD6760A N-Channel Power Trench® MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted
4
VGS = 10 V
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
200
VGS = 4.5 V
ID, DRAIN CURRENT (A)
150
VGS = 6 V
VGS = 4 V
100
VGS = 3.5 V
50
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
0
0
0.5
1.0
1.5
2.0
2.5
VGS = 3.5 V
3
VGS = 4.5 V
2
VGS = 6 V
1
VGS = 10 V
0
3.0
0
50
100
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics
200
14
ID = 27 A
VGS = 10 V
rDS(on), DRAIN TO
1.6
1.4
1.2
1.0
0.8
SOURCE ON-RESISTANCE (mΩ)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
150
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
1.8
0.6
-75 -50 -25 0 25 50 75 100 125 150 175
TJ, JUNCTION TEMPERATURE (oC)
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
12
ID = 27 A
10
8
6
TJ = 150 oC
4
2
TJ = 25 oC
0
2
4
6
8
10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On- Resistance
vs Junction Temperature
Figure 4. On-Resistance vs Gate to
Source Voltage
200
IS, REVERSE DRAIN CURRENT (A)
200
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
150
ID, DRAIN CURRENT (A)
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
VGS = 4 V
VDS = 3.5 V
100
TJ = 25 oC
50
TJ = 175 oC
TJ = -55 oC
0
0
1
2
3
4
5
VGS = 0 V
10
TJ = 175 oC
TJ = -55 oC
1
TJ = 25 oC
0.1
0.2
6
VGS, GATE TO SOURCE VOLTAGE (V)
0.4
0.6
0.8
1.0
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
©2009 Fairchild Semiconductor Corporation
FDD6760A Rev. 1.2
100
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
3
www.fairchildsemi.com
FDD6760A N-Channel Power Trench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
6000
ID = 27 A
Ciss
8
CAPACITANCE (pF)
VGS, GATE TO SOURCE VOLTAGE (V)
10
6
VDD = 13 V
VDD = 10 V
4
VDD = 16 V
1000
Coss
Crss
f = 1 MHz
VGS = 0 V
2
100
0.1
0
0
9
18
27
36
45
1
Figure 7. Gate Charge Characteristics
120
ID, DRAIN CURRENT (A)
IAS, AVALANCHE CURRENT (A)
30
Figure 8. Capacitance vs Drain
to Source Voltage
100
TJ = 125 oC
10
TJ = 150 oC
TJ = 25 oC
VGS = 10 V
90
60
VGS = 4.5 V
30
o
Limited by Package
1
0.001
0.01
0.1
1
10
100
0
25
1000
50
75
150
175
3000
P(PK), PEAK TRANSIENT POWER (W)
10 us
100
100 us
THIS AREA IS
LIMITED BY rDS(on)
1 ms
10 ms
SINGLE PULSE
TJ = MAX RATED
100 ms
DC
Rθ JC = 2.3 oC/W
TC = 25 oC
0.1
0.1
125
Figure 10. Maximum Continuous Drain
Current vs Case Temperature
500
1
100
o
Figure 9. Unclamped Inductive
Switching Capability
10
RθJC = 2.3 C/W
Tc, CASE TEMPERATURE ( C)
tAV, TIME IN AVALANCHE (ms)
ID, DRAIN CURRENT (A)
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
1
10
70
VGS = 10 V
SINGLE PULSE
RθJC = 2.3 oC/W
TC = 25 oC
100
20
-5
10
-4
10
-3
10
-2
10
-1
10
1
10
t, PULSE WIDTH (sec)
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
©2009 Fairchild Semiconductor Corporation
FDD6760A Rev. 1.2
1000
Figure 12. Single Pulse Maximum
Power Dissipation
4
www.fairchildsemi.com
FDD6760A N-Channel Power Trench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
2
NORMALIZED THERMAL
IMPEDANCE, ZθJC
1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
0.1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJC + TC
SINGLE PULSE
o
RθJC = 2.3 C/W
0.02
-5
10
-4
-3
10
-2
10
-1
10
1
10
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Transient Thermal Response Curve
2
NORMALIZED THERMAL
IMPEDANCE, ZθJA
1
0.1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
0.01
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
SINGLE PULSE
o
RθJA = 96 C/W
(Note 1b)
0.001
-4
10
-3
10
-2
10
-1
0
10
10
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 14. Transient Thermal Response Curve
©2009 Fairchild Semiconductor Corporation
FDD6760A Rev. 1.2
5
www.fairchildsemi.com
FDD6760A N-Channel Power Trench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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