LA6324N-E

Ordering number : ENN2704C LA6324N Monolithic Linear IC High-Performance Quad Operational Amplifier http://onsemi.com Overview The LA6324 consists of four independent, high-performance, internally phase compensated operational amplifiers that are designed to operate from a single power supply over a wide range of voltages. These four operational amplifiers are packaged in a single package. As in case of conventional general-purpose operational amplifiers, operation from dual power supplies is also possible and the power dissipation is low. It can be applied to various uses in commercial and industrial equipment including all types of transducer amplifiers and DC amplifiers. Features • No phase compensation required • Wide operating voltage range: 3.0 V to 30.0 V (single supply) ±1.5 V to ±15.0 V (dual supplies) • Highly resistant to dielectric breakdown • Input voltag range includes the neighborhood of GND level and output voltage range VOUT is from 0 to VCC –1.5 V. • Small current dissipation: ICC = 0.6 mA typ/VCC = + 5 V, RL = ∞ Specitications Absolute Maximum Ratings at Ta = 25 °C Parameter Symbol Conditions Ratings Unit Maximum Supply voltage VCC max 32 V Differential input voltage VID 32 V Maximum input voltage VIN max Allowable power dissipation Pd max -0.3 to +32 LA6324N 720 V mW Operating temperature Topr -30 to +85 °C Storage temperature Tstg -55 to +125 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Semiconductor Components Industries, LLC, 2013 August, 2013 92706 / O2504TN(PC)/63096HA(II)/4138TA(KOTO) No.2704-1/5 LA6324N Operating Characteristics at Ta = 25 °C, VCC = +5 V Parameter Symbol Conditions Ratings Test circuit min Unit typ max Input offset voltage VIO 1 ±2 ±7 mV Input offset current IIO IIN(+) / IIN(–) 2 ±5 ±50 nA Input bias current IB IIN(+) / IIN(–) 3 250 nA Common-mode input voltage range VICM 4 0 Common-mode rejection ratio CMR 4 65 80 Voltage gain VG 5 25 100 Output voltage range VOUT Supply voltage rejection ratio SVR Channel separation VCC = 15 V, RL ≥ 2 kΩ VCC –1.5 0 6 CS f = 1 k to 20 kHz ICC Current drain 45 V/mV VCC –1.5 65 V dB 100 V dB 7 120 8 0.6 2 dB 1.5 3 mA ICC VCC = 30 V 8 Output current (Source) IO source VIN+ = 1 V, VIN– = 0 V 9 20 40 mA mA Output current (Sink) IO sink VIN+ = 0 V, VIN– = 1 V 10 10 20 mA Package Dimensions unit : mm 3003B [LA6324N] 19.0 8 1 7 (3.0) 0.51min (1.88) 2.54 0.48 3.4 3.65max 0.25 7.62 6.4 14 1.2 Equivalent Circuit Pin Assignment (1 unit) (LA6324N) VCC VOUT1 1 VININPUT VIN+ VOUT 14 VOUT4 1 - + 4 + - 13 VIN4- VIN1- 2 VIN1+ 3 12 VIN4+ VCC 4 11 GND VIN2+ 5 10 VIN3+ VIN2- 6 2 3 VOUT2 7 9 VIN38 VOUT3 Top view No.2704-2/5 LA6324N Test Circuit 1. Input offset voltage VIO 2. Input offset current IIO VCC R2 R1 R1 R2 VEE +1.4V VCC - + NULL - + VCC R2 R R1 VCC - R R1 VF1 + NULL - + R2 C VEE +1.4V VF1 VIO = 1+R2/R1 IIO = VF2 C VF2 - VF1 R(1+R2/R1) 3. Input bias current IB VCC R2 R R1 R1 R2 VEE +1.4V VF3 VCC R2 R1 C EC1, EC2 + VEE R2 VEE VEE VF4 C VF4 - VF3 2R(1+R2/R1) 5. Voltage gain VG VCC R2 R1 VCC VF5,VF6 R1 + RL R2 C (EC1 - EC2) (1+R2/R1) VF5 - VF6 CMR = 20 log + +1.4V VCC + NULL - + NULL - R2 4. Common-mode rejection ratio CMR Common-mode input voltage range VICM - R R1 IB = R1 VCC - + NULL - + VCC R2 R1 VCC - VG = + NULL EK1, VEE EK2 VF7,VF8 C (EK1 - EK2) (1+R2/R1) VF8 - VF7 6. Supply voltage rejection ratio SVR R1 R1 VCC1, R2 VCC2 + VEE R2 + NULL VEE SVR (+) = 20 log VCC R2 R1 VCC VCC VF9,VF10 R1 + R2 C (1+R2/R1) (VCC1 - VCC2) VF9 - VF10 SVR (-) = 20 log VEE1, VEE2 + NULL VEE VF11,VF12 C (1+R2/R1) (VEE1 - VEE2 ) VF11 - VF12 7. Channel separation CS R2 a C b VCC/2 R1 VCC/2 SW: a R2 VOA CS (A B) = 20 log R1 VOB VCC A + RL A R2 b a VIN VCC/2 R1 VCC/2 B + B VCC VO SW: b R2 VOB CS (B A) = 20 log R1 VOA These apply also to other channels. RL No.2704-3/5 LA6324N 8. Current drain ICC 9. Output current IO source 10. Output current IO sink VCC + +1V VCC A - +1V VO A + VO A VCC ICC - VCC 4.0 IB - VCC 100 Input bias current, IB - nA Current drain, ICC - mA 80 3.0 2.0 1.0 60 40 20 0 0 10 20 30 0 0 40 10 Supply voltage, VCC - V IO (source) - Ta 30 40 30 40 VG - VCC 160 60 120 Voltage gain, VG - dB Output current, IO (source) - mA 70 20 Supply voltage, VCC - V 50 40 30 80 40 20 10 -20 0 20 40 60 0 0 80 10 20 Supply voltage, VCC - V VO - f VG - f 140 120 20 Voltage gain, VG - dB Output voltage amplitude, VOUT - Vp-p 24 16 12 8 4 0 1k 100 80 60 40 20 2 3 5 10k 2 3 5 100k Frequency, f - Hz 2 3 5 1M 0 1 10 100 1k 10k 100k 1M 10M Frequency, f - Hz No.2704-4/5 LA6324N Pd max - Ta Pd max - Ta LA6324N 720 25 700 600 500 400 300 200 100 0 -30 0 30 60 85 90 120 360 Allowable power dissipation, Pd max - mW Allowable power dissipation, Pd max - mW 800 LA6324NM 320 280 240 200 160 120 80 40 0 -40 -30 -20 0 20 40 60 80 85 100 Sample Application Circuits Noninverting DC amplifier Rectangular wave oscillator Inverting AC amplifier ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). 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