MC1403, B
Low Voltage Reference
A precision band−gap voltage reference designed for critical
instrumentation and D/A converter applications. This unit is designed
to work with D/A converters, up to 12 bits in accuracy, or as a
reference for power supply applications.
• Output Voltage: 2.5 V 25 mV
• Input Voltage Range: 4.5 V to 40 V
• Quiescent Current: 1.2 mA Typical
• Output Current: 10 mA
• Temperature Coefficient: 10 ppm/°C Typical
• Guaranteed Temperature Drift Specification
• Equivalent to AD580
• Standard 8−Pin DIP, and 8−Pin SOIC Package
http://onsemi.com
PRECISION LOW VOLTAGE
REFERENCE
PDIP−8
P1 SUFFIX
CASE 626
8
1
Typical Applications
•
•
•
•
•
Voltage Reference for 8 to 12 Bit D/A Converters
Low TC Zener Replacement
High Stability Current Reference
Voltmeter System Reference
Pb−Free Package is Available
SOIC−8
D SUFFIX
CASE 751
8
1
PIN CONNECTIONS
MAXIMUM RATINGS (TA = 25°C, unless otherwise noted.)
Vin 1
8 NC
Symbol
Value
Unit
Vout 2
7 NC
VI
40
V
GND 3
6 NC
Tstg
−65 to 150
°C
NC 4
5 NC
Junction Temperature
TJ
+175
°C
Operating Ambient Temperature Range
MC1403B
MC1403
TA
−40 to +85
0 to + 70
°C
°C
Rating
Input Voltage
Storage Temperature
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
Semiconductor Components Industries, LLC, 2005
March, 2005 − Rev. 4
1
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
Publication Order Number:
MC1403/D
MC1403, B
+ 5.0 V
1
MC1403
2 2.5V
Full Scale
Adjust 500
1.0 k
R1
3
R2
Reference
Amplifier
IRef
*0.1 F
C1
Monolithic D/A
Converter
1.2 k
R3
* Caution: System stability may be affected if output capacitance
* exceeds 1.0 F. Using higher capacitance values is not
* recommended and should be carefully considered.
Figure 1. A Reference for Monolithic D/A Converters
Providing the Reference Current
for ON Semiconductor Monolithic D/A Converters
The resistor R3 improves temperature performance by
matching the impedance on both inputs of the D/A reference
amplifier. The capacitor decouples any noise present on the
reference line. It is essential if the D/A converter is located
any appreciable distance from the reference.
A single MC1403 reference can provide the required
current input for up to five of the monolithic D/A converters.
The MC1403 makes an ideal reference for many monolithic D/A converters, requiring a stable current reference of
nominally 2.0 mA. This can be easily obtained from the
MC1403 with the addition of a series resistor, R1. A variable
resistor, R2, is recommended to provide means for full−
scale adjust on the D/A converter.
ELECTRICAL CHARACTERISTICS (Vin = 15 V, TA = 25°C, unless otherwise noted.)
Characteristic
Symbol
Min
Typ
Max
Unit
Vout
2.475
2.5
2.525
V
VO/T
−
10
40
ppm/°C
Output Voltage
(IO = 0 mA)
Temperature Coefficient of Output Voltage*
MC1403
Output Voltage Change*
(Over specified temperature range)
MC1403B 0 to + 70°C
MC1403B −40 to + 85°C
VO
mV
−
−
−
−
7.0
12.5
−
−
1.2
0.6
4.5
3.0
Line Regulation (IO = 0 mA)
(15 V VI 40 V)
(4.5 V VI 15 V)
Regline
Load Regulation
(0 mA < IO < 10 mA)
Regload
−
−
10
mV
IQ
−
1.2
1.5
mA
Quiescent Current
(IO = 0 mA)
*Guaranteed but not tested.
http://onsemi.com
2
mV
MC1403, B
Vin
2.0 k
2.0 k
2.0 k
2.0 k
1.0 k
32
Vout
1.5 k
C1
30 pF
10 k
1.73k
2.37 k
1.0 k
5.61 k
This device contains 15 active transistors.
Figure 2. MC1403, B Schematic
http://onsemi.com
3
1.483 k
∆Vout , CHANGE IN OUTPUT VOLTAGE (mV)
MC1403, B
∆ Vout , CHANGE IN Vout (mV)
2.0
1.0
25°C
0
−1.0
0°C
−2.0
75°C
−3.0
−4.0
−5.0
−6.0
0
10
20
30
Vin, INPUT VOLTAGE (V)
40
10
9.0
8.0
7.0
6.0
5.0
4.0
75°C
3.0
2.0
0°C
1.0
0
50
25°C
0
1.0
2.0
3.0 4.0 5.0 6.0
7.0
Iout, OUTPUT CURRENT (mA)
8.0
9.0
10
Figure 4. Change in Output Voltage
versus Load Current
Figure 3. Typical Change in Vout versus Vin
(Normalized to Vin = 15 V @ TC = 25°C)
(Normalized to Vout @ Vin = 15 V, Iout = 0 mA)
∆ Vout , CHANGE IN Vout (mV)
1.20
1.15
1.10
1.05
1.00
0.95
0.90
Iout = 2 mA
Vin = 15 V
0
−2.0
Vin = 5.0 V
−4.0
−6.0
−8.0
−10
−12
0
−40 −30 −20 −10
0 10 20 30 40 50
TA, TEMPERATURE (°C)
60 70
−14
−40 −30 −20 −10
80 85
0
10 20 30 40 50
TA, TEMPERATURE (°C)
60 70
80 85
Figure 5. Quiescent Current versus Temperature
Figure 6. Change in Vout versus Temperature
(Vin = 15 V, Iout = 0 mA)
(Normalized to Vout @ Vin = 15 V)
4.0
∆ Vout , CHANGE IN Vout (mV)
I1, QUIESCENT CURRENT (mA)
1.25
2.0
IO = 0 mA
= 2.0 mA
0
−2.0
= 8.0 mA
−4.0
= 5.0 mA
−6.0
−8.0
−10
−12
−40 −30 −20 −10
0
10
20
30
40
50
60 70
80 85
TA, TEMPERATURE (°C)
Figure 7. Change in Vout versus Temperature
(Normalized to TA = 25°C, Vin = 15 V, Iout = 0 mA)
http://onsemi.com
4
MC1403, B
3−1/2−Digit Voltmeter − Common Anode
Displays, Flashing Overrange
is done by dividing the EOC pulse rate by 2 with 1/2
MC14013B flip−flop and blanking the display using the
blanking input of the MC14543B.
The display uses an LED display with common anode
digit lines driven with an MC14543B decoder and an
MC1413 LED driver. The MC1413 contains 7 Darlington
transistor drivers and resistors to drive the segments of the
display. The digit drive is provided by four MPS−A12
Darlington transistors operating in an emitter−follower
configuration. The MC14543B, MC14013B and LED
displays are referenced to VEE via Pin 13 of the MC14433.
This places the full power supply voltage across the display.
The current for the display may be adjusted by the value of
the segment resistors shown as 150 in Figure 8.
An example of a 3−1/2−digit voltmeter using the
MC14433 is shown in the circuit diagram of Figure 8. The
reference voltage for the system uses an MC1403 2.5 V
reference IC. The full scale potentiometer can calibrate for
a full scale of 199.9 mV or 1.999 V. When switching from
2.0 V to 200 mV operation, RI is also changed, as shown on
the diagram.
When using RC equal to 300 k, the clock frequency for
the system is about 66 kHz. The resulting conversion time
is approximately 250 ms.
When the input is overrange, the display flashes on and
off. The flashing rate is one−half the conversion rate. This
MC1403
20 k
2
−5.0 V
0.1F
+5.0 V
3
0.1F
300 k
RC
11 10
VX
2
MC14433
0.1 F **
13
7
8
0.1 F
4 1
2
3
5
23
22
21
20
4
5
6
+5.0 V
0.1 F
12 24
3
1
RI *
+5.0 V
0.1 F
−5.0 V
16 9
6
8
7
6
5
4
3
2
1
10
11
12
13
14
15
7
−5.0 V
9
14
Segment Resistors
150 (7)
MC1413
1
MC14543B
+5.0 V
−5.0 V
−5.0 V
15 19 18 17 16
5.0 V
DS1
DS2
−5.0 V
6
5
DS3
3
DS4
D
C
S
R
Q
Q
1
2
51 k
MC14013B
4
+5.0 V
8
9
D S Q 13
11 C
Q 12
R
14
7 10
* RI = 470 k for 2.0 V Range
RI = 27 k for 200 mV Range
** Mylar Capacitor
10
11
12
13
14
15
16
50 F
−5.0 V
+5.0 V
−5.0 V
Figure 8. 3−1/2−Digit Voltmeter
http://onsemi.com
5
Minus Sign
f g e d c b a
200
MPS−A12 Plus Sign
110
Common
Anode
LED
Display
0.1 F
MPS−A12
(4)
MC1403, B
ORDERING INFORMATION
Device
MC1403D
Package
Operating Temperature Range
Shipping†
SOIC−8
98 Units/Rail
MC1403DG
SOIC−8
(Pb−Free)
98 Units/Rail
MC1403DR2
SOIC−8
MC1403DR2G
MC1403P1
2500 Tape/Reel
TA = 0° to +70°C
SOIC−8
(Pb−Free)
2500 Tape/Reel
PDIP−8
1000 Units/Rail
PDIP−8
(Pb−Free)
1000 Units/Tubes
SOIC−8
98 Units/Rail
MC1403BDG
SOIC−8
(Pb−Free)
98 Units/Rail
MC1403BDR2
SOIC−8
MC1403P1G
MC1403BD
TA = − 40° to +85°C
2500 Tape/Reel
MC1403BP1
PDIP−8−8
1000 Units/Rail
MC1403BP1G
PDIP−8−8
(Pb−Free)
1000 Units/Rail
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PDIP−8
CASE 626−05
ISSUE P
DATE 22 APR 2015
SCALE 1:1
D
A
E
H
8
5
E1
1
4
NOTE 8
b2
c
B
END VIEW
TOP VIEW
WITH LEADS CONSTRAINED
NOTE 5
A2
A
e/2
NOTE 3
L
SEATING
PLANE
A1
C
D1
M
e
8X
SIDE VIEW
b
0.010
eB
END VIEW
M
C A
M
B
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. DIMENSIONS A, A1 AND L ARE MEASURED WITH THE PACKAGE SEATED IN JEDEC SEATING PLANE GAUGE GS−3.
4. DIMENSIONS D, D1 AND E1 DO NOT INCLUDE MOLD FLASH
OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS ARE
NOT TO EXCEED 0.10 INCH.
5. DIMENSION E IS MEASURED AT A POINT 0.015 BELOW DATUM
PLANE H WITH THE LEADS CONSTRAINED PERPENDICULAR
TO DATUM C.
6. DIMENSION eB IS MEASURED AT THE LEAD TIPS WITH THE
LEADS UNCONSTRAINED.
7. DATUM PLANE H IS COINCIDENT WITH THE BOTTOM OF THE
LEADS, WHERE THE LEADS EXIT THE BODY.
8. PACKAGE CONTOUR IS OPTIONAL (ROUNDED OR SQUARE
CORNERS).
DIM
A
A1
A2
b
b2
C
D
D1
E
E1
e
eB
L
M
INCHES
MIN
MAX
−−−−
0.210
0.015
−−−−
0.115 0.195
0.014 0.022
0.060 TYP
0.008 0.014
0.355 0.400
0.005
−−−−
0.300 0.325
0.240 0.280
0.100 BSC
−−−−
0.430
0.115 0.150
−−−−
10 °
MILLIMETERS
MIN
MAX
−−−
5.33
0.38
−−−
2.92
4.95
0.35
0.56
1.52 TYP
0.20
0.36
9.02
10.16
0.13
−−−
7.62
8.26
6.10
7.11
2.54 BSC
−−−
10.92
2.92
3.81
−−−
10 °
NOTE 6
GENERIC
MARKING DIAGRAM*
STYLE 1:
PIN 1. AC IN
2. DC + IN
3. DC − IN
4. AC IN
5. GROUND
6. OUTPUT
7. AUXILIARY
8. VCC
XXXXXXXXX
AWL
YYWWG
XXXX
A
WL
YY
WW
G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42420B
PDIP−8
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AK
8
1
SCALE 1:1
−X−
DATE 16 FEB 2011
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
8
5
S
B
0.25 (0.010)
M
Y
M
1
4
−Y−
K
G
C
N
X 45 _
SEATING
PLANE
−Z−
0.10 (0.004)
H
M
D
0.25 (0.010)
M
Z Y
S
X
J
S
8
8
1
1
IC
4.0
0.155
XXXXX
A
L
Y
W
G
IC
(Pb−Free)
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
XXXXXX
AYWW
1
1
Discrete
XXXXXX
AYWW
G
Discrete
(Pb−Free)
XXXXXX = Specific Device Code
A
= Assembly Location
Y
= Year
WW
= Work Week
G
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
1.270
0.050
SCALE 6:1
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
8
8
XXXXX
ALYWX
G
XXXXX
ALYWX
1.52
0.060
0.6
0.024
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8_
0.25
0.50
5.80
6.20
GENERIC
MARKING DIAGRAM*
SOLDERING FOOTPRINT*
7.0
0.275
DIM
A
B
C
D
G
H
J
K
M
N
S
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
STYLES ON PAGE 2
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42564B
SOIC−8 NB
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 2
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
SOIC−8 NB
CASE 751−07
ISSUE AK
DATE 16 FEB 2011
STYLE 1:
PIN 1. EMITTER
2. COLLECTOR
3. COLLECTOR
4. EMITTER
5. EMITTER
6. BASE
7. BASE
8. EMITTER
STYLE 2:
PIN 1. COLLECTOR, DIE, #1
2. COLLECTOR, #1
3. COLLECTOR, #2
4. COLLECTOR, #2
5. BASE, #2
6. EMITTER, #2
7. BASE, #1
8. EMITTER, #1
STYLE 3:
PIN 1. DRAIN, DIE #1
2. DRAIN, #1
3. DRAIN, #2
4. DRAIN, #2
5. GATE, #2
6. SOURCE, #2
7. GATE, #1
8. SOURCE, #1
STYLE 4:
PIN 1. ANODE
2. ANODE
3. ANODE
4. ANODE
5. ANODE
6. ANODE
7. ANODE
8. COMMON CATHODE
STYLE 5:
PIN 1. DRAIN
2. DRAIN
3. DRAIN
4. DRAIN
5. GATE
6. GATE
7. SOURCE
8. SOURCE
STYLE 6:
PIN 1. SOURCE
2. DRAIN
3. DRAIN
4. SOURCE
5. SOURCE
6. GATE
7. GATE
8. SOURCE
STYLE 7:
PIN 1. INPUT
2. EXTERNAL BYPASS
3. THIRD STAGE SOURCE
4. GROUND
5. DRAIN
6. GATE 3
7. SECOND STAGE Vd
8. FIRST STAGE Vd
STYLE 8:
PIN 1. COLLECTOR, DIE #1
2. BASE, #1
3. BASE, #2
4. COLLECTOR, #2
5. COLLECTOR, #2
6. EMITTER, #2
7. EMITTER, #1
8. COLLECTOR, #1
STYLE 9:
PIN 1. EMITTER, COMMON
2. COLLECTOR, DIE #1
3. COLLECTOR, DIE #2
4. EMITTER, COMMON
5. EMITTER, COMMON
6. BASE, DIE #2
7. BASE, DIE #1
8. EMITTER, COMMON
STYLE 10:
PIN 1. GROUND
2. BIAS 1
3. OUTPUT
4. GROUND
5. GROUND
6. BIAS 2
7. INPUT
8. GROUND
STYLE 11:
PIN 1. SOURCE 1
2. GATE 1
3. SOURCE 2
4. GATE 2
5. DRAIN 2
6. DRAIN 2
7. DRAIN 1
8. DRAIN 1
STYLE 12:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
7. DRAIN
8. DRAIN
STYLE 13:
PIN 1. N.C.
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
7. DRAIN
8. DRAIN
STYLE 14:
PIN 1. N−SOURCE
2. N−GATE
3. P−SOURCE
4. P−GATE
5. P−DRAIN
6. P−DRAIN
7. N−DRAIN
8. N−DRAIN
STYLE 15:
PIN 1. ANODE 1
2. ANODE 1
3. ANODE 1
4. ANODE 1
5. CATHODE, COMMON
6. CATHODE, COMMON
7. CATHODE, COMMON
8. CATHODE, COMMON
STYLE 16:
PIN 1. EMITTER, DIE #1
2. BASE, DIE #1
3. EMITTER, DIE #2
4. BASE, DIE #2
5. COLLECTOR, DIE #2
6. COLLECTOR, DIE #2
7. COLLECTOR, DIE #1
8. COLLECTOR, DIE #1
STYLE 17:
PIN 1. VCC
2. V2OUT
3. V1OUT
4. TXE
5. RXE
6. VEE
7. GND
8. ACC
STYLE 18:
PIN 1. ANODE
2. ANODE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
7. CATHODE
8. CATHODE
STYLE 19:
PIN 1. SOURCE 1
2. GATE 1
3. SOURCE 2
4. GATE 2
5. DRAIN 2
6. MIRROR 2
7. DRAIN 1
8. MIRROR 1
STYLE 20:
PIN 1. SOURCE (N)
2. GATE (N)
3. SOURCE (P)
4. GATE (P)
5. DRAIN
6. DRAIN
7. DRAIN
8. DRAIN
STYLE 21:
PIN 1. CATHODE 1
2. CATHODE 2
3. CATHODE 3
4. CATHODE 4
5. CATHODE 5
6. COMMON ANODE
7. COMMON ANODE
8. CATHODE 6
STYLE 22:
PIN 1. I/O LINE 1
2. COMMON CATHODE/VCC
3. COMMON CATHODE/VCC
4. I/O LINE 3
5. COMMON ANODE/GND
6. I/O LINE 4
7. I/O LINE 5
8. COMMON ANODE/GND
STYLE 23:
PIN 1. LINE 1 IN
2. COMMON ANODE/GND
3. COMMON ANODE/GND
4. LINE 2 IN
5. LINE 2 OUT
6. COMMON ANODE/GND
7. COMMON ANODE/GND
8. LINE 1 OUT
STYLE 24:
PIN 1. BASE
2. EMITTER
3. COLLECTOR/ANODE
4. COLLECTOR/ANODE
5. CATHODE
6. CATHODE
7. COLLECTOR/ANODE
8. COLLECTOR/ANODE
STYLE 25:
PIN 1. VIN
2. N/C
3. REXT
4. GND
5. IOUT
6. IOUT
7. IOUT
8. IOUT
STYLE 26:
PIN 1. GND
2. dv/dt
3. ENABLE
4. ILIMIT
5. SOURCE
6. SOURCE
7. SOURCE
8. VCC
STYLE 29:
PIN 1. BASE, DIE #1
2. EMITTER, #1
3. BASE, #2
4. EMITTER, #2
5. COLLECTOR, #2
6. COLLECTOR, #2
7. COLLECTOR, #1
8. COLLECTOR, #1
STYLE 30:
PIN 1. DRAIN 1
2. DRAIN 1
3. GATE 2
4. SOURCE 2
5. SOURCE 1/DRAIN 2
6. SOURCE 1/DRAIN 2
7. SOURCE 1/DRAIN 2
8. GATE 1
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42564B
SOIC−8 NB
STYLE 27:
PIN 1. ILIMIT
2. OVLO
3. UVLO
4. INPUT+
5. SOURCE
6. SOURCE
7. SOURCE
8. DRAIN
STYLE 28:
PIN 1. SW_TO_GND
2. DASIC_OFF
3. DASIC_SW_DET
4. GND
5. V_MON
6. VBULK
7. VBULK
8. VIN
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 2 OF 2
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