MJF6388 (NPN),
MJF6668 (PNP)
Complementary Power
Darlingtons
For Isolated Package Applications
Designed for general−purpose amplifiers and switching
applications, where the mounting surface of the device is required to
be electrically isolated from the heatsink or chassis.
Features
• Isolated Overmold Package
• Electrically Similar to the Popular 2N6388, 2N6668, TIP102,
•
•
•
•
•
and TIP107
No Isolating Washers Required, Reduced System Cost
High DC Current Gain
High Isolation Voltage
UL Recognized at 3500 VRMS: File #E69369
These Devices are Pb−Free and are RoHS Compliant*
Value
Unit
VCEO
100
Vdc
Collector−Base Voltage
VCB
100
Vdc
Emitter−Base Voltage
VEB
5.0
Vdc
RMS Isolation Voltage (Note 1)
(t = 0.3 sec, R.H. ≤ 30%, TA = 25_C)
Per Figure 14
Collector Current − Continuous
Collector Current − Peak (Note 2)
VISOL
Adc
15
Adc
IB
1.0
Adc
Total Power Dissipation (Note 3)
@ TC = 25_C
Derate above 25_C
PD
40
0.31
W
W/_C
Total Power Dissipation
@ TA = 25_C
Derate above 25_C
PD
2.0
0.016
W
W/_C
–65 to +150
_C
TJ, Tstg
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Proper strike and creepage distance must be provided.
2. Pulse Test: Pulse Width = 5.0 ms, Duty Cycle ≤ 10%.
3. Measurement made with thermocouple contacting the bottom insulated
surface (in a location beneath the die), the devices mounted on a heatsink with
thermal grease and a mounting torque of ≥ 6 in. lbs.
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
Thermal Resistance, Junction−to−Case (Note 4)
RqJC
4.0
_C/W
Thermal Resistance, Junction−to−Ambient
RqJA
62.5
_C/W
Lead Temperature for Soldering Purposes
TL
260
_C
4. Measurement made with thermocouple contacting the bottom insulated
surface (in a location beneath the die), the devices mounted on a heatsink with
thermal grease and a mounting torque of ≥ 6 in. lbs.
September, 2013 − Rev. 11
EMITTER 3
MJF6388 (NPN)
MJF6668 (PNP)
TO−220 FULLPACK
CASE 221D
STYLE 2
UL RECOGNIZED
1
10
ICM
© Semiconductor Components Industries, LLC, 2013
EMITTER 3
V
Base Current − Continuous
Operating and Storage Temperature Range
BASE
1
4500
IC
COLLECTOR 2
BASE
1
Symbol
Collector−Emitter Voltage
COMPLEMENTARY SILICON
POWER DARLINGTONS
10 AMPERES
100 VOLTS, 40 WATTS
COLLECTOR 2
MAXIMUM RATINGS
Rating
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1
2
3
MARKING DIAGRAM
MJF6xy8
MJF6xy8G
AYWW
G
A
Y
WW
= Specific Device
Code
x = 3 or 6
y = 6 or 8
= Pb−Free Package
= Assembly Location
= Year
= Work Week
ORDERING INFORMATION
Device
Package
Shipping
MJF6388G
TO−220 FULLPACK
(Pb−Free)
50 Units/Rail
MJF6668G
TO−220 FULLPACK
(Pb−Free)
50 Units/Rail
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
Publication Order Number:
MJF6388/D
MJF6388 (NPN), MJF6668 (PNP)
ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted)
Characteristic
Symbol
Min
Max
100
−
−
10
−
−
10
3.0
−
10
−
2.0
3000
1000
200
100
15000
−
−
−
−
−
−
−
2.0
2.0
2.5
3.0
−
−
2.8
4.5
−
2.5
20
−
Unit
OFF CHARACTERISTICS
VCEO(sus)
Collector−Emitter Sustaining Voltage (Note 5)
(IC = 30 mAdc, IB = 0)
Collector Cutoff Current
(VCE = 80 Vdc, IB = 0)
ICEO
Collector Cutoff Current
(VCE = 100 Vdc, VEB(off) = 1.5 Vdc)
(VCE = 100 Vdc, VEB(off) = 1.5 Vdc, TC = 125_C)
ICEX
Collector Cutoff Current
(VCB = 100 Vdc, IE = 0)
ICBO
Emitter Cutoff Current
(VBE = 5.0 Vdc, IC = 0)
IEBO
Vdc
mAdc
mAdc
mAdc
mAdc
mAdc
ON CHARACTERISTICS (Note 5)
hFE
DC Current Gain
(IC = 3.0 Adc, VCE = 4.0 Vdc)
(IC = 5.0 Adc, VCE = 3.0 Vdc)
(IC = 8.0 Adc, VCE = 4.0 Vdc)
(IC = 10 Adc, VCE = 3.0 Vdc)
Collector−Emitter Saturation Voltage
(IC = 3.0 Adc, IB = 6.0 mAdc)
(IC = 5.0 Adc, IB = 0.01 Adc)
(IC = 8.0 Adc, IB = 80 mAdc)
(IC = 10 Adc, IB = 0.1 Adc)
VCE(sat)
Base−Emitter Saturation Voltage
(IC = 5.0 Adc, IB = 0.01 Adc)
(IC = 10 Adc, IB = 0.1 Adc)
VBE(sat)
Base−Emitter On Voltage
(IC = 8.0 Adc, VCE = 4.0 Vdc)
VBE(on)
−
Vdc
Vdc
Vdc
DYNAMIC CHARACTERISTICS
Small−Signal Current Gain
(IC = 1.0 Adc, VCE = 5.0 Vdc, ftest = 1.0 MHz)
|hfe|
Output Capacitance
(VCB = 10 Vdc, IE = 0, f = 1.0 MHz)
MJF6388
MJF6668
Cob
Insulation Capacitance
(Collector−to−External Heatsink)
−
pF
−
−
200
300
−
3.0 Typ
1000
−
Cc−hs
Small−Signal Current Gain
(IC = 1.0 Adc, VCE = 5.0 Vdc, f = 1.0 kHz)
pF
hfe
−
5. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2.0%.
NPN
MJF6388
PNP
MJF6668
COLLECTOR
COLLECTOR
BASE
BASE
≈8k
≈8k
≈ 120
≈ 120
EMITTER
EMITTER
Figure 1. Darlington Schematic
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2
MJF6388 (NPN), MJF6668 (PNP)
VCC
+ 30 V
RB & RC VARIED TO OBTAIN DESIRED CURRENT LEVELS
D1, MUST BE FAST RECOVERY TYPES, e.g.,
MUR110 USED ABOVE IB ≈ 100 mA
MSD6100 USED BELOW IB ≈ 100 mA
RC
SCOPE
TUT
V1
APPROX.
+12 V
RB
V2
APPROX.
-8 V
≈120
-4 V
25 ms
tr, tf ≤ 10 ns
DUTY CYCLE = 1%
≈8 k
D1
51
FOR td AND tr, D1 IS DISCONNECTED
AND V2 = 0
FOR NPN TEST CIRCUIT REVERSE ALL POLARITIES.
Figure 2. Switching Times Test Circuit
NPN
MJF6388
PNP
MJF6668
10
7
5
7
5
ts
t, TIME (s)
μ
tf
1
0.7
0.3
0.2
0.1
0.07
0.1
tr
VCC = 30 V
IC/IB = 250
IB1 = IB2
TJ = 25°C
0.2
tr
3
td
2
ts
1
0.7
0.5
0.3
0.2
1
0.5
2
IC, COLLECTOR CURRENT (AMPS)
5
0.1
0.1
10
td
tf
3
0.5 0.7 1
2
0.3
IC, COLLECTOR CURRENT (AMPS)
0.2
Figure 3. Typical Switching Times
20
IC, COLLECTOR CURRENT (AMPS)
t, TIME (s)
μ
3
VCC = 30 V
IC/IB = 250
IB1 = IB2
TJ = 25°C
100 ms
10
5
3
2
dc
TJ = 150°C
1
5 ms
0.5
0.3
0.2
CURRENT LIMIT
SECONDARY BREAKDOWN LIMIT
THERMAL LIMIT @ TC = 25°C
(SINGLE PULSE)
0.1
0.05
0.03
0.02
1ms
1
5
20 30
2
3
10
50
VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 4. Maximum Forward Bias
Safe Operating Area
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3
100
5
7
10
MJF6388 (NPN), MJF6668 (PNP)
r(t), TRANSIENT THERMAL
RESISTANCE (NORMALIZED)
1
0.5
D = 0.5
0.3
0.2
0.2
0.1
0.05
0.03
P(pk)
RqJC(t) = r(t) RqJC
RqJC = °C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) - TC = P(pk) RqJC(t)
0.1
0.05
SINGLE PULSE
t1
t2
DUTY CYCLE, D = t1/t2
0.02
0.01
0.01 0.02
0.05
0.2 0.3 0.5
0.1
1
2 3
5
10
20 30 50
t, TIME (ms)
100 200 300 500
1K
2K 3K 5K
10K 20K 30K 50K 100K
Figure 5. Thermal Response
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate IC − VCE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 4 is based on TJ(pk) = l50_C; TC is
variable depending on conditions. Secondary breakdown
pulse limits are valid for duty cycles to 10% provided TJ(pk)
< 150_C. TJ(pk) may be calculated from the data in Figure 5.
At high case temperatures, thermal limitations will reduce
the power that can be handled to values less than the
limitations imposed by secondary breakdown.
POWER DERATING FACTOR
1
SECOND BREAKDOWN
DERATING
0.8
0.6
THERMAL
DERATING
0.4
0.2
0
20
40
60
80
100
140
120
160
TC, CASE TEMPERATURE (°C)
Figure 6. Maximum Power Derating
NPN
MJF6388
PNP
MJF6668
5000
3000
2000
5000
hFE , SMALL-SIGNAL CURRENT GAIN
10,000
hfe , SMALL-SIGNAL CURRENT GAIN
10,000
1000
500
300
200
TC = 25°C
VCE = 4 Vdc
IC = 3 Adc
100
50
30
20
10
1
2
5
10
20
50 100
f, FREQUENCY (kHz)
200
2000
1000
500
100
50
20
10
500 1000
TC = 25°C
VCE = 4 VOLTS
IC = 3 AMPS
200
1
2 3
5 7 10
20 30 50 70 100
f, FREQUENCY (kHz)
Figure 7. Typical Small−Signal Current Gain
http://onsemi.com
4
200 300 500 1000
MJF6388 (NPN), MJF6668 (PNP)
NPN
MJF6388
PNP
MJF6668
300
300
TJ = 25°C
TJ = 25°C
200
100
C, CAPACITANCE (pF)
C, CAPACITANCE (pF)
200
Cob
70
Cib
50
30
0.1
Cib
100
Cob
70
50
0.2
0.5
1
2
5
10
20
VR, REVERSE VOLTAGE (VOLTS)
50
30
0.1
100
0.2
0.5
1
2
5
10
20
VR, REVERSE VOLTAGE (VOLTS)
50
100
Figure 8. Typical Capacitance
20,000
20,000
VCE = 4 V
VCE = 4 V
10,000
5000
TJ = 150°C
3000
2000
hFE, DC CURRENT GAIN
hFE, DC CURRENT GAIN
10,000
25°C
1000
-55°C
500
300
200
0.1
0.2
0.3
0.5 0.7
1
3
2
5
7
7000
5000
2000
25°C
1000
700
500
300
200
0.1
10
TJ = 150°C
3000
-55°C
0.2
0.3
0.5 0.7
1
2
3
5
7
10
IC, COLLECTOR CURRENT (AMP)
IC, COLLECTOR CURRENT (AMP)
VCE , COLLECTOR-EMITTER VOLTAGE (VOLTS)
VCE , COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 9. Typical DC Current Gain
3
TJ = 25°C
2.6
IC = 2 A
4A
6A
2.2
1.8
1.4
1
0.3
0.5 0.7
1
2
3
5
7
10
20
3
TJ = 25°C
2.6
IC = 2 A
6A
2.2
1.8
1.4
1
0.3
30
4A
IB, BASE CURRENT (mA)
0.5 0.7
1
2
3
5
IB, BASE CURRENT (mA)
Figure 10. Typical Collector Saturation Region
http://onsemi.com
5
7
10
20
30
MJF6388 (NPN), MJF6668 (PNP)
NPN
MJF6388
PNP
MJF6668
3
3
TJ = 25°C
TJ = 25°C
2.5
V, VOLTAGE (VOLTS)
V, VOLTAGE (VOLTS)
2.5
2
VBE(sat) @ IC/IB = 250
1.5
VBE @ VCE = 4 V
1
2
1.5
VBE @ VCE = 4 V
VBE(sat) @ IC/IB = 250
1
VCE(sat) @ IC/IB = 250
VCE(sat) @ IC/IB = 250
0.5
0.1
0.5
0.2 0.3
0.5 0.7
1
2
3
5
7
10
0.1
0.2 0.3
0.5 0.7
1
2
3
5
7
10
7
10
IC, COLLECTOR CURRENT (AMP)
IC, COLLECTOR CURRENT (AMP)
Figure 11. Typical “On” Voltages
+4
+5
θV, TEMPERATURE COEFFICIENT (mV/ °C)
θV, TEMPERATURE COEFFICIENT (mV/ °C)
+5
*IC/IB ≤ hFE/3
+3
25°C to 150°C
+2
+1
-55°C to 25°C
0
-1
-2
-3
-4
-5
0.1
*qVC for VCE(sat)
qVB for VBE
25°C to 150°C
-55°C to 25°C
*IC/IB ≤ hFE/3
+4
+3
25°C to 150°C
+2
+1
-55°C to 25°C
0
-1
*qVC for VCE(sat)
-2
-3
qVB for VBE
25°C to 150°C
-55°C to 25°C
-4
-5
0.2 0.3
0.5 0.7
1
2
3
5
7
0.1
10
IC, COLLECTOR CURRENT (AMP)
0.2 0.3
0.5 0.7 1
2 3
IC, COLLECTOR CURRENT (AMP)
5
Figure 12. Typical Temperature Coefficients
105
104
REVERSE
REVERSE
FORWARD
IC, COLLECTOR CURRENT (A)
μ
IC, COLLECTOR CURRENT (A)
μ
105
VCE = 30 V
103
102
TJ = 150°C
101
100
100°C
25°C
10-1
-0.6 - 0.4 -0.2
0
+0.2 +0.4 +0.6 +0.8
+1
VCE = 30 V
103
102
101
TJ = 150°C
100°C
100
25°C
10-1
+0.6 +0.4 +0.2
+1.2 +1.4
FORWARD
104
VBE, BASE-EMITTER VOLTAGE (VOLTS)
0
-0.2 -0.4 -0.6 -0.8
-1
VBE, BASE-EMITTER VOLTAGE (VOLTS)
Figure 13. Typical Collector Cut−Off Region
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6
-1.2 -1.4
MJF6388 (NPN), MJF6668 (PNP)
TEST CONDITION FOR ISOLATION TEST*
FULLY ISOLATED PACKAGE
LEADS
HEATSINK
0.110, MIN
Figure 14. Mounting Position
*Measurement made between leads and heatsink with all leads shorted together.
MOUNTING INFORMATION
4-40 SCREW
CLIP
PLAIN WASHER
HEATSINK
COMPRESSION WASHER
HEATSINK
NUT
Figure 15. Typical Mounting Techniques*
Laboratory tests on a limited number of samples indicate, when using the screw and compression washer mounting technique, a screw
torque of 6 to 8 in . lbs is sufficient to provide maximum power dissipation capability. The compression washer helps to maintain a constant pressure on the package over time and during large temperature excursions.
Destructive laboratory tests show that using a hex head 4−40 screw, without washers, and applying a torque in excess of 20 in . lbs will
cause the plastic to crack around the mounting hole, resulting in a loss of isolation capability.
Additional tests on slotted 4−40 screws indicate that the screw slot fails between 15 to 20 in . lbs without adversely affecting the package. However, in order to positively ensure the package integrity of the fully isolated device, ON Semiconductor does not recommend
exceeding 10 in . lbs of mounting torque under any mounting conditions.
** For more information about mounting power semiconductors see Application Note AN1040.
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7
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−220 FULLPAK
CASE 221D−03
ISSUE K
−T−
−B−
F
C
S
Q
SCALE 1:1
SEATING
PLANE
U
1 2 3
−Y−
K
G
N
L
D
STYLE 1:
PIN 1. GATE
2. DRAIN
3. SOURCE
STYLE 2:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
STYLE 4:
PIN 1. CATHODE
2. ANODE
3. CATHODE
STYLE 5:
PIN 1. CATHODE
2. ANODE
3. GATE
J
R
3 PL
0.25 (0.010)
M
B
M
Y
DESCRIPTION:
INCHES
MIN
MAX
0.617
0.635
0.392
0.419
0.177
0.193
0.024
0.039
0.116
0.129
0.100 BSC
0.118
0.135
0.018
0.025
0.503
0.541
0.048
0.058
0.200 BSC
0.122
0.138
0.099
0.117
0.092
0.113
0.239
0.271
MILLIMETERS
MIN
MAX
15.67
16.12
9.96
10.63
4.50
4.90
0.60
1.00
2.95
3.28
2.54 BSC
3.00
3.43
0.45
0.63
12.78
13.73
1.23
1.47
5.08 BSC
3.10
3.50
2.51
2.96
2.34
2.87
6.06
6.88
MARKING
DIAGRAMS
STYLE 3:
PIN 1. ANODE
2. CATHODE
3. ANODE
STYLE 6:
PIN 1. MT 1
2. MT 2
3. GATE
xxxxxx
G
A
Y
WW
DOCUMENT NUMBER:
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH
3. 221D-01 THRU 221D-02 OBSOLETE, NEW
STANDARD 221D-03.
DIM
A
B
C
D
F
G
H
J
K
L
N
Q
R
S
U
A
H
DATE 27 FEB 2009
98ASB42514B
TO−220 FULLPAK
xxxxxxG
AYWW
AYWW
xxxxxxG
AKA
Bipolar
Rectifier
= Specific Device Code
= Pb−Free Package
= Assembly Location
= Year
= Work Week
A
Y
WW
xxxxxx
G
AKA
= Assembly Location
= Year
= Work Week
= Device Code
= Pb−Free Package
= Polarity Designator
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
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