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NB4N11MDTEVB

NB4N11MDTEVB

  • 厂商:

    ONSEMI(安森美)

  • 封装:

    -

  • 描述:

    BOARD EVAL FOR NB4N11MD

  • 数据手册
  • 价格&库存
NB4N11MDTEVB 数据手册
NB4N11MDTEVB Evaluation Board User's Manual for NB4N11M http://onsemi.com EVAL BOARD USER’S MANUAL Description Board Lay−Up ON Semiconductor has developed an evaluation board for the NB4N11M device as a convenience for the customers interested in performing their own device engineering assessment. This board provides a high bandwidth 50 W controlled impedance environment. The pictures in Figure 1 show the top and bottom view of the evaluation board, which can be configured in several different ways. This NB4N11M evaluation board manual contains: • Appropriate Lab Setup • Assembly Instructions • Bill of Materials This manual should be used in conjunction with the NB4N11M device data sheet, which contains full technical details on the device specifications and operation. The NB4N11M evaluation board is implemented in four layers with split (dual) power supplies (Figure 7, Evaluation Board Lay−up). For standard lab setup, a split (dual) power supply is essential to enable the 50 W internal impedance in the oscilloscope as a devices termination. The first layer or primary trace layer is 0.005″ thick Rogers RO4003 material, which is designed to have equal electrical length on all signal traces from the device under the test (DUT) to the sense output. The second layer is the 1.0 oz copper ground plane. The FR4 dielectric material is placed between second and third layer and between third and fourth layer. The third layer is also 1.0 oz copper ground plane. The fourth layer is the secondary trace layer. Top View Bottom View Figure 1. Top and Bottom View of the NB4N11M Evaluation Board © Semiconductor Components Industries, LLC, 2012 February, 2012 − Rev. 1 1 Publication Order Number: EVBUM2071/D NB4N11MDTEVB SMA_GND SMA_GND VCC VEE VCC VEE TOP LAYER BOTTOM LAYER Figure 2. Top & Bottom Layers (Top View) Figure 3. Evaluation Board Lay−up Connecting Power and Ground Planes The side launch 9 pin power supply connector is wired as shown in Figure 4. Test points can be soldered on the top of the PCB to accommodated easier connections. Exact values that need to be applied can be found in Table 1. Table 1. Power Supply Levels Power Supply Span VTT (Termination) VCC (Pin 8) VEE / GND (Pin 5) SMA_GND (PCB SMA Ground) 3.3 V 1.8 V 1.5 V −1.8 V 0V 3.3 V 2.5 V 0.8 V −2.5 V 0V 3.3 V 3.3 V 0V −3.3 V 0V http://onsemi.com 2 NB4N11MDTEVB SMA_GND SMA_GND NC NC VCC VCC VEE VEE VEE VCC C3 = 10 mF; C4 = 10 mF Figure 4. Power Supply Connector − 9 Pin Side View (Left) and PCB Top View (Right) Stimulus (Generator) Termination All ECL outputs need to be terminated to VTT (VTT = VCC – 2.0 V = GND) via a 50 W resistor. The current board design utilizes the space for placement of the external termination resistors. (More information on termination is provided in AN8020). The 0402 chip resistor pads are provided on the bottom side of the evaluation board. Solder the chip resistors to the bottom side of the board between the appropriate input of the device pin pads and the ground pads as shown in Figure 5 (for split power supply setup, PCB is assembled in this configuration). C1 = 0.01 mF R2 = 50 W R1 = 50 W C2 = 0.01 mF Figure 5. Expanded Bottom View Likewise for CML outputs, CML stimulus signal need to be terminated to VCC via a 50 W resistor. To accomplish this configuration the external termination resistor has to be moved from SMA_GND ring to VCC ring on the bottom of the board. For the LVDS configuration Input pin pads of the D0 or D1 input has to be shorted using 100 W resistor across differential lines. oscilloscope to be used as a termination of the signals (in split power supply setup SMA_GND as a system ground, VCC, and VEE are varied; see Table 1, Power Supply Levels). Board Components Configuration The NB4N11MDTEVB evaluation board requires six side SMA connectors. Placement locations are described in the Table 2 below. DUT Termination For standard lab setup and test, a split (dual) power supply is required enabling the 50 W internal impedance in the http://onsemi.com 3 NB4N11MDTEVB Table 2. SMA Connector and Jumper Placement Device J1/Q0 J2/Q0 J3/Q1 J4/Q1 J5 J6/D J7/D J8 1 2 3 4 5 6 7 8 Connector Yes Yes Yes Yes No Yes Yes No Resistor (bottom) 0402* 50 W 0402* 50 W 0402* 50 W 0402* 50 W 0402 0.01 mF 0402 50 W 0402 50 W 0402 0.01 mF No No No No to VEE No No to VCC Pin # Wire *Optional components for 25 W load. Not populated in production . Q0 Z = 50 W OUT2 Z = 50 W Z = 50 W Q0 D PIN 1 Z = 50 W IN2 Q1 D Z = 50 W OUT3 OUT4 IN3 SIGNAL GENERATOR OSCILLOSCOPE (50 W Scope Head) OUT1 Z = 50 W Q1 Figure 6. Lab Setup 1. Connect appropriate power supplies to VCC, VEE, and SMA_GND (See Table 1) 2. Connect a signal generator to the input SMA connectors via matched cables. Setup input signal according to the device data sheet C4 10 mF VCC Z = 50 W 1 SMA Q0 Z = 50 W 8 2 SMA 7 Z = 50 W 6 Z = 50 W D NB4N11M SMA Q1 Z = 50 W SMA 3 4 5 SMA Q1 Z = 50 W R2 50 W VEE C3 10 mF R1 50 W C1 0.01 mF Figure 7. PCB Schematic for 50 W Load (PCB is assembled in this configuration) http://onsemi.com 4 D SIGNAL GENERATOR OSCILLOSCOPE (50 W Scope Head) NOTE: The test measurement device must contain 50 W termination. C2 0.01 mF SMA Q0 3. Connect a test measurement device on the device output SMA connectors via matched cables. NB4N11MDTEVB SMA VCC 1 SMA Q0 8 SMA 2 Z = 50 W 7 Z = 50 W 6 Z = 50 W D NB4N11M SMA Q1 SMA 3 4 Z = 50 W 5 50 W SMA 50 W VEE 50 W* 50 W* 50 W* Z = 50 W 50 W* Q1 D SIGNAL GENERATOR OSCILLOSCOPE (50 W Scope Head) 10 mF 0.01 mF Z = 50 W Q0 10 mF 0.01 mF *50 W resistors must be added for 25 W load configuration Figure 8. PCB Schematic for 25 W Load (50 W output resistors (Q0, Q0, Q1, Q1) not assembled ) Table 3. Bill of Materials Components Manufacturer Description Part Number Qty. Web Site SMA Connector Johnson* SMA Connector − Side Launch 142−0701−851 6 http://www.johnsoncomponents.com 9 Pin D−Sub Receptacle Amphenol Connector, Female, 9−Pin, Right Angle 788796−1 1 http://www.amphenol.com Surface Mount Test Points{ Keystone* SMT Miniature Test Point 5015 3 http://www.keyelco.com SMT Compact Test Point 5016 http://www.avxcorp.com Chip Capacitor AVC Corporation* 0402 0.01 mF " 10% 04025C103KAT2A 2 10 mF " 10% T491C106K016AS 2 Chip Resistor Panasonic* 0402 50 W " 1% Precision Thick Film Chip Resistor ERJ−2RKF49R9X 2 http://www.panasonic.com Evaluation Board ON Semiconductor Micro−10 Evaluation Board N/A 1 http://www.onsemi.com Device Samples ON Semiconductor Micro−10 Package Device NB4N11MM 1 http://www.onsemi.com *Components are available through most distributors, i.e. www.newark.com, www.Digikey.com †Surface Mount Test Points can be used for power supply connection in place of power supply cable connector. See Figure 4 for test point placement. http://onsemi.com 5 NB4N11MDTEVB PACKAGE DIMENSIONS Micro−10 CASE 846B−03 ISSUE D NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION “A” DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION “B” DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. 846B−01 OBSOLETE. NEW STANDARD 846B−02 −A− −B− K D 8 PL 0.08 (0.003) PIN 1 ID G SEATING PLANE T B S A S DIM A B C D G H J K L C 0.038 (0.0015) −T− M H L J MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 0.95 1.10 0.20 0.30 0.50 BSC 0.05 0.15 0.10 0.21 4.75 5.05 0.40 0.70 SOLDERING FOOTPRINT* 10X 1.04 0.041 0.32 0.0126 3.20 0.126 8X 10X 4.24 0.167 0.50 0.0196 SCALE 8:1 5.28 0.208 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 6 INCHES MIN MAX 0.114 0.122 0.114 0.122 0.037 0.043 0.008 0.012 0.020 BSC 0.002 0.006 0.004 0.008 0.187 0.199 0.016 0.028 onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. The evaluation board/kit (research and development board/kit) (hereinafter the “board”) is not a finished product and is not available for sale to consumers. The board is only intended for research, development, demonstration and evaluation purposes and will only be used in laboratory/development areas by persons with an engineering/technical training and familiar with the risks associated with handling electrical/mechanical components, systems and subsystems. This person assumes full responsibility/liability for proper and safe handling. Any other use, resale or redistribution for any other purpose is strictly prohibited. THE BOARD IS PROVIDED BY ONSEMI TO YOU “AS IS” AND WITHOUT ANY REPRESENTATIONS OR WARRANTIES WHATSOEVER. WITHOUT LIMITING THE FOREGOING, ONSEMI (AND ITS LICENSORS/SUPPLIERS) HEREBY DISCLAIMS ANY AND ALL REPRESENTATIONS AND WARRANTIES IN RELATION TO THE BOARD, ANY MODIFICATIONS, OR THIS AGREEMENT, WHETHER EXPRESS, IMPLIED, STATUTORY OR OTHERWISE, INCLUDING WITHOUT LIMITATION ANY AND ALL REPRESENTATIONS AND WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON−INFRINGEMENT, AND THOSE ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE CUSTOM OR TRADE PRACTICE. onsemi reserves the right to make changes without further notice to any board. You are responsible for determining whether the board will be suitable for your intended use or application or will achieve your intended results. Prior to using or distributing any systems that have been evaluated, designed or tested using the board, you agree to test and validate your design to confirm the functionality for your application. Any technical, applications or design information or advice, quality characterization, reliability data or other services provided by onsemi shall not constitute any representation or warranty by onsemi, and no additional obligations or liabilities shall arise from onsemi having provided such information or services. onsemi products including the boards are not designed, intended, or authorized for use in life support systems, or any FDA Class 3 medical devices or medical devices with a similar or equivalent classification in a foreign jurisdiction, or any devices intended for implantation in the human body. You agree to indemnify, defend and hold harmless onsemi, its directors, officers, employees, representatives, agents, subsidiaries, affiliates, distributors, and assigns, against any and all liabilities, losses, costs, damages, judgments, and expenses, arising out of any claim, demand, investigation, lawsuit, regulatory action or cause of action arising out of or associated with any unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of any products and/or the board. This evaluation board/kit does not fall within the scope of the European Union directives regarding electromagnetic compatibility, restricted substances (RoHS), recycling (WEEE), FCC, CE or UL, and may not meet the technical requirements of these or other related directives. FCC WARNING – This evaluation board/kit is intended for use for engineering development, demonstration, or evaluation purposes only and is not considered by onsemi to be a finished end product fit for general consumer use. It may generate, use, or radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of this equipment may cause interference with radio communications, in which case the user shall be responsible, at its expense, to take whatever measures may be required to correct this interference. onsemi does not convey any license under its patent rights nor the rights of others. LIMITATIONS OF LIABILITY: onsemi shall not be liable for any special, consequential, incidental, indirect or punitive damages, including, but not limited to the costs of requalification, delay, loss of profits or goodwill, arising out of or in connection with the board, even if onsemi is advised of the possibility of such damages. In no event shall onsemi’s aggregate liability from any obligation arising out of or in connection with the board, under any theory of liability, exceed the purchase price paid for the board, if any. The board is provided to you subject to the license and other terms per onsemi’s standard terms and conditions of sale. For more information and documentation, please visit www.onsemi.com. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Email Requests to: orderlit@onsemi.com onsemi Website: www.onsemi.com ◊ TECHNICAL SUPPORT North American Technical Support: Voice Mail: 1 800−282−9855 Toll Free USA/Canada Phone: 011 421 33 790 2910 www.onsemi.com 1 Europe, Middle East and Africa Technical Support: Phone: 00421 33 790 2910 For additional information, please contact your local Sales Representative
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