Low VCE(sat) NPN
Transistors, 60 V, 1 A
NSS60101DMR6
ON Semiconductor’s e2 PowerEdge family of low VCE(sat)
transistors are miniature surface mount devices featuring ultra low
saturation voltage (VCE(sat)) and high current gain capability. These
are designed for use in low voltage, high speed switching applications
where affordable efficient energy control is important.
Typical applications are DC−DC converters and LED lightning,
power management…etc. In the automotive industry they can be used
in air bag deployment and in the instrument cluster. The high current
gain allows e2PowerEdge devices to be driven directly from PMU’s
control outputs, and the Linear Gain (Beta) makes them ideal
components in analog amplifiers.
Features
60 Volt, 1 Amp
NPN Low VCE(sat) Transistors
MARKING
DIAGRAM
SC−74
CASE 318F
6
• NSV Prefix for Automotive and Other Applications Requiring
•
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1
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
RAD MG
G
RAD = Specific Device Code
M = Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
MAXIMUM RATINGS (TA = 25°C)
Rating
Symbol
Max
Unit
Collector−Emitter Voltage
VCEO
60
Vdc
Collector−Base Voltage
VCBO
80
Vdc
Emitter−Base Voltage
VEBO
6
IC
ICM
Collector Current − Continuous
Collector Current − Peak
E 1
6 C
Vdc
B 2
5 B
1
A
C 3
4 E
2
A
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL CHARACTERISTICS
Characteristic
Thermal Resistance Junction−to−Ambient
(Notes 1 and 2)
Total Power Dissipation per Package @
TA = 25°C (Note 2)
Thermal Resistance Junction−to−Ambient
(Note 3)
Power Dissipation per Transistor @ TA = 25°C
(Note 3)
Junction and Storage Temperature Range
Symbol
Max
Unit
RqJA
234
°C/W
PD
0.53
W
RqJA
300
°C/W
PD
0.40
W
TJ, Tstg
−55 to
+150
February, 2020 − Rev. 3
6
1
5
2
4
3
ORDERING INFORMATION
Device
Package
Shipping†
SC−74
(Pb−Free)
3000/Tape &
Reel
NSS60101DMR6T1G
°C
1. Per JESD51−7 with 100 mm2 pad area and 2 oz. Cu (Dual Operation).
2. PD per Transistor when both are turned on is one half of Total PD or 0.53 Watts.
3. Per JESD51−7 with 100 mm2 pad area and 2 oz. Cu (Single−Operation).
© Semiconductor Components Industries, LLC, 2017
PIN CONNECTIONS
1
NSS60101DMR6T2G
NSV60101DMR6T1G
NSV60101DMR6T2G
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Publication Order Number:
NSS60101DMR6/D
NSS60101DMR6
Table 1. ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Symbol
Min
Collector−Emitter Breakdown Voltage (IC = 10 mA, IB = 0)
V(BR)CEO
60
V
Collector−Base Breakdown Voltage (Ic = 0.1 mA, IE = 0)
V(BR)CBO
80
V
Emitter−Base Breakdown Voltage (IE = 0.1 mA, IC = 0)
V(BR)EBO
6
Characteristic
Typ
Max
Unit
OFF CHARACTERISTICS
V
Collector Cutoff Current (VCB = 60 V, IE = 0)
ICBO
100
nA
Emitter Cutoff Current (VBE = 5.0 V)
IEBO
100
nA
ON CHARACTERISTICS
hFE
DC Current Gain (Note 4)
(IC = 100 mA, VCE = 2 V)
(IC = 500 mA, VCE = 2 V)
(IC = 1 A, VCE = 2 V)
(IC = 1 mA, VCE = 5 V)
(IC = 100 mA, VCE = 5 V)
(IC = 500 mA, VCE = 5 V)
(IC = 1 A, VCE = 5 V)
200
150
70
250
250
200
100
Collector−Emitter Saturation Voltage (Note 4)
(IC = 100 mA, IB = 1 mA)
(IC = 500 mA, IB = 50 mA)
(IC = 1 A, IB = 50 mA)
(IC = 1 A, IB = 100 mA)
VCE(sat)
Base*Emitter Saturation Voltage (Note 4)
(IC = 500 mA, IB = 50 mA)
(IC = 1 A, IB = 50 mA)
(IC = 1 A, IB = 100 mA)
VBE(sat)
Base−Emitter Turn−on Voltage (Note 4)
(IC = 1 mA, VCE = 1 V)
(IC = 500 mA, VCE = 2 V)
VBE(on)
320
290
110
335
335
310
295
V
0.080
0.078
0.170
0.143
0.200
0.150
0.250
0.200
0.87
0.91
0.94
1.50
1.50
1.60
V
V
0.27
0.57
0.76
0.90
DYNAMIC CHARACTERISTICS
Input Capacitance
(VEB = 1 V, f = 1.0 MHz)
Cibo
100
pF
Output Capacitance
(VCB = 10 V, f = 1.0 MHz)
Cobo
8.0
pF
fT
200
MHz
Delay Time (VCC = 10 V, IC = 0.5 A, IB1 = 25 mA, IB2 = −25 mA)
td
10
ns
ON Time (VCC = 10 V, IC = 0.5 A, IB1 = 25 mA, IB2 = −25 mA)
ton
28
ns
Cutoff Frequency
(IC = 50 mA, VCE = 2.0 V, f = 100 MHz)
SWITCHING TIMES
Rise Time (VCC = 10 V, IC = 0.5 A, IB1 = 25 mA, IB2 = −25 mA)
tr
18
ns
Storage Time (VCC = 10 V, IC = 0.5 A, IB1 = 25 mA, IB2 = −25 mA)
ts
622
ns
OFF Time (VCC = 10 V, IC = 0.5 A, IB1 = 25 mA, IB2 = −25 mA)
toff
709
ns
Fall Time (VCC = 10 V, IC = 0.5 A, IB1 = 25 mA, IB2 = −25 mA)
tf
87
ns
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Condition: Pulse Width = 300 msec, Duty Cycle ≤ 2%.
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2
NSS60101DMR6
TYPICAL CHARACTERISTICS
600
600
VCE = 2 V
hFE, DC CURRENT GAIN
500
125°C
400
85°C
300
25°C
200
−55°C
100
0
0.001
0.01
IC, COLLECTOR CURRENT (A)
1.8
0.1
1
25°C
200
−55°C
100
0
0.001
0.1
1
8.0 mA
6.0 mA
0.6
2.0 mA
0.4
0.2
1
2
3
4
10
10
IB = 20 mA
0.8
5
IC/IB = 10
1
150°C
125°C
85°C
0.1
25°C
−55°C
0.01
0.001
6
0.01
0.1
1
10
VCE, COLLECTOR EMITTER VOLTAGE (V)
IC, COLLECTOR CURRENT (A)
Figure 3. Collector Current as a Function of
Collector Emitter Voltage
Figure 4. Collector−Emitter Saturation Voltage
10
10
IC/IB = 20
VCE(sat), COLLECTOR−EMITTER
SATURATION (V)
VCE(sat), COLLECTOR−EMITTER
SATURATION (V)
0.01
Figure 2. DC Current Gain
4.0 mA
0
300
Figure 1. DC Current Gain
1.0
0
85°C
IC, COLLECTOR CURRENT (A)
10 mA
1.2
125°C
400
10
12 mA
1.4
500
IC, COLLECTOR CURRENT (A)
18 mA
14 mA 16 mA
1.6
VCE = 5 V
150°C
VCE(sat), COLLECTOR−EMITTER
SATURATION (V)
hFE, DC CURRENT GAIN
150°C
150°C
1
125°C
85°C
0.1
−55°C
0.01
0.001
0.01
0.1
25°C
1
IC/IB = 50
150°C
1
125°C
85°C
0.1
−55°C
0.01
0.001
10
IC, COLLECTOR CURRENT (A)
0.01
0.1
25°C
1
10
IC, COLLECTOR CURRENT (A)
Figure 5. Collector−Emitter Saturation Voltage
Figure 6. Collector−Emitter Saturation Voltage
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3
NSS60101DMR6
TYPICAL CHARACTERISTICS
IC/IB = 100
VBE(sat), BASE−EMITTER
SATURATION (V)
VCE(sat), COLLECTOR−EMITTER
SATURATION (V)
10
1
125°C
150°C
−55°C
0.1
85°C
25°C
1.0
−55°C
25°C
85°C
125°C
0.5
150°C
IC/IB = 10
0.01
0.001
0.01
0.1
1
0
10
0.001
0.01
IC, COLLECTOR CURRENT (A)
1.0
−55°C
25°C
85°C
125°C
150°C
IC/IB = 20
0
0.001
0.01
0.1
10
1
1.2
1.0
0.8 −55°C
25°C
0.6
85°C
125°C
0.4
150°C
0.2
0
VCE = 2 V
0.001
0.01
1
10
Figure 10. Base−Emitter “ON” Voltage
Figure 9. Base−Emitter Saturation Voltage
40
240
TA = 25°C
f = 1 MHz
200
Cobo, OUTPUT CAPACITANCE (pF)
Cibo, INPUT CAPACITANCE (pF)
0.1
IC, COLLECTOR CURRENT (A)
IC, COLLECTOR CURRENT (A)
160
120
80
40
10
Figure 8. Base−Emitter Saturation Voltage
VBE(on), BASE−EMITTER VOLTAGE (V)
VBE(sat), BASE−EMITTER
SATURATION (V)
Figure 7. Collector−Emitter Saturation Voltage
0.5
1
0.1
IC, COLLECTOR CURRENT (A)
0
1
2
3
4
5
6
30
25
20
15
10
5
0
7
TA = 25°C
f = 1 MHz
35
0
5
10
15
20
25
VEB, BASE−EMITTER VOLTAGE (V)
VCB, COLLECTOR−BASE REVERSE VOLTAGE (V)
Figure 11. Input Capacitance
Figure 12. Output Capacitance
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4
30
NSS60101DMR6
10
1000
TJ = 25°C
VCE = 2 V
ftest = 100 MHz
IC, COLLECTOR CURRENT (A)
fT, CURRENT GAIN BANDWIDTH PRODUCT (MHz)
TYPICAL CHARACTERISTICS
100
10
1
1
10
100
1s
10 ms
1 ms
1
0.01
0.001
0.1
1000
100ms
1
10
100
IC, COLLECTOR CURRENT (mA)
VCE, COLLECTOR EMITTER VOLTAGE (V)
Figure 13. fT, Current Gain Bandwidth Product
Figure 16. Safe Operating Area (TA = 255C)
R(t), EFFECTIVE TRANSIENT THERMAL
RESISTANCE (°C/W)
1000
Duty Cycle = 0.5
100 0.20
0.10
0.05
10 0.02
0.01
1
Single Pulse
0.1
0.00001
0.000001
0.0001
0.001
0.01
0.1
1
10
100
1000
10
100
1000
t, PULSE TIME (sec)
Figure 14. Thermal Resistance by Transistor
R(t), EFFECTIVE TRANSIENT THERMAL
RESISTANCE (°C/W)
1000
Duty Cycle = 0.5
100 0.20
0.10
0.05
10 0.02
0.01
1
0.1
0.000001
Single Pulse
0.00001
0.0001
0.001
0.01
0.1
1
t, PULSE TIME (sec)
Figure 15. Thermal Resistance for Both Transistors
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−74
CASE 318F−05
ISSUE N
6
DATE 08 JUN 2012
1
SCALE 2:1
D
6
HE
1
5
4
2
3
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
4. 318F−01, −02, −03, −04 OBSOLETE. NEW STANDARD 318F−05.
E
b
e
c
A
0.05 (0.002)
L
A1
q
DIM
A
A1
b
c
D
E
e
L
HE
q
MIN
0.90
0.01
0.25
0.10
2.90
1.30
0°
0.85
0.20
2.50
MILLIMETERS
NOM
MAX
1.00
1.10
0.06
0.10
0.37
0.50
0.18
0.26
3.00
3.10
1.50
1.70
10°
0.95
1.05
0.40
0.60
2.75
3.00
−
INCHES
NOM
0.039
0.002
0.015
0.007
0.118
0.059
0.037
0.016
0.108
−
MAX
0.043
0.004
0.020
0.010
0.122
0.067
10°
0.041
0.024
0.118
GENERIC
MARKING DIAGRAM*
SOLDERING FOOTPRINT*
2.4
0.094
XXX MG
G
0.95
0.037
1.9
0.074
XXX
M
G
0.95
0.037
0.7
0.028
1.0
0.039
MIN
0.035
0.001
0.010
0.004
0.114
0.051
0°
0.034
0.008
0.099
SCALE 10:1
= Specific Device Code
= Date Code
= Pb−Free Package
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
STYLE 1:
PIN 1. CATHODE
2. ANODE
3. CATHODE
4. CATHODE
5. ANODE
6. CATHODE
STYLE 2:
PIN 1. NO CONNECTION
2. COLLECTOR
3. EMITTER
4. NO CONNECTION
5. COLLECTOR
6. BASE
STYLE 3:
PIN 1. EMITTER 1
2. BASE 1
3. COLLECTOR 2
4. EMITTER 2
5. BASE 2
6. COLLECTOR 1
STYLE 4:
PIN 1. COLLECTOR 2
2. EMITTER 1/EMITTER 2
3. COLLECTOR 1
4. EMITTER 3
5. BASE 1/BASE 2/COLLECTOR 3
6. BASE 3
STYLE 5:
PIN 1. CHANNEL 1
2. ANODE
3. CHANNEL 2
4. CHANNEL 3
5. CATHODE
6. CHANNEL 4
STYLE 7:
PIN 1. SOURCE 1
2. GATE 1
3. DRAIN 2
4. SOURCE 2
5. GATE 2
6. DRAIN 1
STYLE 8:
PIN 1. EMITTER 1
2. BASE 2
3. COLLECTOR 2
4. EMITTER 2
5. BASE 1
6. COLLECTOR 1
STYLE 9:
PIN 1. EMITTER 2
2. BASE 2
3. COLLECTOR 1
4. EMITTER 1
5. BASE 1
6. COLLECTOR 2
STYLE 10:
PIN 1. ANODE/CATHODE
2. BASE
3. EMITTER
4. COLLECTOR
5. ANODE
6. CATHODE
STYLE 11:
PIN 1. EMITTER
2. BASE
3. ANODE/CATHODE
4. ANODE
5. CATHODE
6. COLLECTOR
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42973B
SC−74
STYLE 6:
PIN 1. CATHODE
2. ANODE
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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