NTTFS4941NTWG

NTTFS4941N MOSFET – Power, Single, N-Channel, m8FL 30 V, 46 A Features • • • • Low RDS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses Optimized Gate Charge to Minimize Switching Losses These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant http://onsemi.com V(BR)DSS RDS(on) MAX 6.2 mW @ 10 V 30 V 46 A 9.0 mW @ 4.5 V Applications • • • • ID MAX Low−Side DC−DC Converters Power Load Switch Notebook Battery Management Motor Control N−Channel MOSFET D (5−8) MAXIMUM RATINGS (TJ = 25°C unless otherwise stated) Parameter Drain−to−Source Voltage Gate−to−Source Voltage Continuous Drain Current RqJA (Note 1) TA = 25°C Power Dissipation RqJA (Note 1) TA = 25°C Continuous Drain Current RqJA ≤ 10 s (Note 1) TA = 25°C Power Dissipation RqJA ≤ 10 s (Note 1) Continuous Drain Current RqJA (Note 2) Symbol Value Unit VDSS 30 V VGS ±20 V ID 13.5 A TA = 85°C MARKING DIAGRAM PD ID 2.19 W A 19 13.7 TA = 25°C PD 4.42 W TA = 25°C ID 8.3 A TA = 85°C 6.0 Power Dissipation RqJA (Note 2) TA = 25°C PD 0.84 W Continuous Drain Current RqJC (Note 1) TC = 25°C ID 46 A Power Dissipation RqJC (Note 1) TC = 25°C PD 25.5 W TA = 25°C, tp = 10 ms IDM 140 A TJ, Tstg −55 to +150 °C IS 29 A Drain to Source dV/dt dV/dt 6.0 V/ns Single Pulse Drain−to−Source Avalanche Energy (TJ = 25°C, VDD = 50 V, VGS = 10 V, IL = 29 Apk, L = 0.1 mH, RG = 25 W) EAS 42 mJ TL 260 °C Pulsed Drain Current TC = 85°C Operating Junction and Storage Temperature Source Current (Body Diode) Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) S (1,2,3) 9.7 TA = 85°C Steady State G (4) 1 S S S G 1 WDFN8 (m8FL) CASE 511AB 4941 A Y WW G 4941 AYWWG G D D D D = Specific Device Code = Assembly Location = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) 33 ORDERING INFORMATION Device Package Shipping† NTTFS4941NTAG WDFN8 1500/Tape & Reel (Pb−Free) NTTFS4941NTWG WDFN8 5000/Tape & Reel (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. © Semiconductor Components Industries, LLC, 2011 June, 2019 − Rev. 2 1 Publication Order Number: NTTFS4941N/D NTTFS4941N 1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu. 2. Surface−mounted on FR4 board using the minimum recommended pad size. THERMAL RESISTANCE MAXIMUM RATINGS Symbol Value Unit Junction−to−Case (Drain) Parameter RqJC 4.9 °C/W Junction−to−Ambient – Steady State (Note 3) RqJA 57 Junction−to−Ambient – Steady State (Note 4) RqJA 148 Junction−to−Ambient – (t ≤ 10 s) (Note 3) RqJA 28.3 3. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu. 4. Surface−mounted on FR4 board using the minimum recommended pad size (40 mm2, 1 oz. Cu). ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter Symbol Test Condition Min Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 30 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/TJ Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current IDSS Gate−to−Source Leakage Current V 15 VGS = 0 V, VDS = 24 V mV/°C TJ = 25°C 1.0 TJ = 125°C 10 IGSS VDS = 0 V, VGS = ±20 V VGS(TH) VGS = VDS, ID = 250 mA mA ±100 nA 2.2 V ON CHARACTERISTICS (Note 5) Gate Threshold Voltage Negative Threshold Temperature Coefficient VGS(TH)/TJ Drain−to−Source On Resistance RDS(on) 4.3 VGS = 10 V VGS = 4.5 V Forward Transconductance gFS 1.2 ID = 20 A 4.8 ID = 10 A 4.8 ID = 20 A 7.0 ID = 10 A 7.0 VDS = 1.5 V, ID = 15 A mV/°C 6.2 mW 9.0 33 S 1619 pF CHARGES AND CAPACITANCES Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance VGS = 0 V, f = 1.0 MHz, VDS = 15 V 573 Crss 18 Total Gate Charge QG(TOT) 10.1 Threshold Gate Charge QG(TH) Gate−to−Source Charge QGS Gate−to−Drain Charge QGD Total Gate Charge QG(TOT) VGS = 4.5 V, VDS = 15 V, ID = 20 A nC 2.6 4.9 1.3 VGS = 10 V, VDS = 15 V, ID = 20 A 22.8 nC 11 ns SWITCHING CHARACTERISTICS (Note 6) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(on) tr td(off) VGS = 4.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 W tf 21 19 3.0 5. Pulse Test: pulse width = 300 ms, duty cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 NTTFS4941N ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter Symbol Test Condition Min Typ Max Unit SWITCHING CHARACTERISTICS (Note 6) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(on) tr td(off) ns 8.0 VGS = 10 V, VDS = 15 V, ID = 15 A, RG = 3.0 W tf 20 23 2.0 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time VSD TJ = 25°C 0.87 TJ = 125°C 0.75 tRR Charge Time ta Discharge Time tb Reverse Recovery Charge VGS = 0 V, IS = 20 A 1.2 ns 30 VGS = 0 V, dIS/dt = 100 A/ms, IS = 20 A V 16 14 QRR 22 nC Source Inductance LS 0.38 nH Drain Inductance LD Gate Inductance LG Gate Resistance RG PACKAGE PARASITIC VALUES TA = 25°C 0.054 1.3 1.1 5. Pulse Test: pulse width = 300 ms, duty cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 3 2.0 W NTTFS4941N TYPICAL CHARACTERISTICS 80 4.0 V 60 3.6 V 50 3.4 V 40 3.2 V 30 3.0 V 20 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 0 2.8 V 2.4 V 10 0 1 2 2.6 V 4 3 5 0.040 0.030 0.020 0.010 3 4 5 6 7 8 9 VGS, GATE−TO−SOURCE VOLTAGE (V) 0 1.0 0.5 1.5 TJ = −55°C 2.5 2.0 3.0 3.5 10 4.0 0.010 TJ = 25°C 0.009 0.008 0.007 VGS = 4.5 V 0.006 VGS = 10 V 0.005 0.004 10 20 30 40 50 60 70 80 90 100 110 ID, DRAIN CURRENT (A) Figure 3. On−Resistance vs. VGS Figure 4. On−Resistance vs. Drain Current and Gate Voltage 2.0 10,000 ID = 20 A VGS = 10 V IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) TJ = 125°C Figure 2. Transfer Characteristics 0.050 1.8 TJ = 25°C Figure 1. On−Region Characteristics ID = 20 A TJ = 25°C 2 VDS ≥ 10 V VGS, GATE−TO−SOURCE VOLTAGE (V) 0.060 0.000 65 60 55 50 45 40 35 30 25 20 15 10 5 0 VDS, DRAIN−TO−SOURCE VOLTAGE (V) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) ID, DRAIN CURRENT (A) 70 TJ = 25°C 4.5 V ID, DRAIN CURRENT (A) 10 V 1.6 VGS = 0 V TJ = 150°C 1000 1.4 1.2 1.0 TJ = 125°C 100 TJ = 85°C 0.8 0.6 −50 −25 0 25 50 75 100 125 150 10 5 10 15 20 25 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 4 30 NTTFS4941N TYPICAL CHARACTERISTICS 1800 C, CAPACITANCE (pF) VGS = 0 V TJ = 25°C Ciss 1600 VGS, GATE−TO−SOURCE VOLTAGE (V) 2000 1400 1200 1000 800 Coss 600 400 200 0 Crss 0 5 10 15 20 25 30 7 6 Qgd 5 Qgs 4 TJ = 25°C 3 VDD = 15 V VGS = 10 V ID = 20 A 2 1 0 0 2 6 4 8 10 12 14 16 18 20 24 22 Figure 7. Capacitance Variation Figure 8. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge 30 IS, SOURCE CURRENT (A) VGS = 0 V td(off) 100 t, TIME (ns) QT 8 Qg, TOTAL GATE CHARGE (nC) VDD = 15 V ID = 15 A VGS = 10 V tf tr td(on) 10 1 10 10 5 TJ = 25°C 0.5 0.6 0.7 0.8 0.9 1.0 Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current 10 ms 100 ms 1 ms 10 ms VGS = 20 V Single Pulse TC = 25°C dc RDS(on) Limit Thermal Limit Package Limit 0.1 1 10 EAS, SINGLE PULSE DRAIN−TO− SOURCE AVALANCHE ENERGY (mJ) 0.01 0.01 TJ = 125°C 15 VSD, SOURCE−TO−DRAIN VOLTAGE (V) 10 0.1 20 RG, GATE RESISTANCE (W) 100 1 25 0 0.4 100 1000 ID, DRAIN CURRENT (A) 9 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 1000 1 10 100 50 ID = 29 A 40 30 20 10 0 25 50 75 100 125 VDS, DRAIN−TO−SOURCE VOLTAGE (V) TJ, STARTING JUNCTION TEMPERATURE (°C) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature http://onsemi.com 5 150 NTTFS4941N TYPICAL CHARACTERISTICS 100 Duty Cycle = 50% R(t) (°C/W) 10 1 20% 10% 5% 2% 1% 0.1 Single Pulse 0.01 0.000001 0.00001 0.0001 0.001 0.1 0.01 PULSE TIME (sec) Figure 13. Thermal Response http://onsemi.com 6 1 10 100 1000 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS WDFN8 3.3x3.3, 0.65P CASE 511AB ISSUE D 1 SCALE 2:1 DATE 23 APR 2012 2X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS. 0.20 C D A D1 B 2X 0.20 C 8 7 6 5 4X E1 E q c 1 2 3 4 A1 TOP VIEW 0.10 C A e SIDE VIEW 0.10 8X b C A B 0.05 C 4X DETAIL A 8X e/2 1 0.42 4 INCHES NOM 0.030 −−− 0.012 0.008 0.130 BSC 0.116 0.120 0.078 0.083 0.130 BSC 0.116 0.120 0.058 0.063 0.009 0.012 0.026 BSC 0.012 0.016 0.026 0.032 0.012 0.017 0.002 0.005 0.055 0.059 0_ −−− MIN 0.028 0.000 0.009 0.006 MAX 0.031 0.002 0.016 0.010 0.124 0.088 0.124 0.068 0.016 0.020 0.037 0.022 0.008 0.063 12 _ 0.65 PITCH PACKAGE OUTLINE 4X 0.66 M E3 8 5 D2 BOTTOM VIEW 1 3.60 L1 GENERIC MARKING DIAGRAM* XXXXX A Y WW G MILLIMETERS MIN NOM MAX 0.70 0.75 0.80 0.00 −−− 0.05 0.23 0.30 0.40 0.15 0.20 0.25 3.30 BSC 2.95 3.05 3.15 1.98 2.11 2.24 3.30 BSC 2.95 3.05 3.15 1.47 1.60 1.73 0.23 0.30 0.40 0.65 BSC 0.30 0.41 0.51 0.65 0.80 0.95 0.30 0.43 0.56 0.06 0.13 0.20 1.40 1.50 1.60 0_ −−− 12 _ SOLDERING FOOTPRINT* L G SEATING PLANE DETAIL A K E2 C 6X 0.10 C DIM A A1 b c D D1 D2 E E1 E2 E3 e G K L L1 M q XXXXX AYWWG G 0.75 2.30 0.57 0.47 2.37 3.46 DIMENSION: MILLIMETERS = Specific Device Code = Assembly Location = Year = Work Week = Pb−Free Package *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. DOCUMENT NUMBER: DESCRIPTION: 98AON30561E WDFN8 3.3X3.3, 0.65P Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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