MN101C57D

MN101C57C, MN101C57D Type Internal ROM type ROM (byte) RAM (byte) Package (Lead-free) Minimum Instruction Execution Time 48K 2K QFP100-P-1818B 0.1 µs (at 4.5 V to 5.5 V, 20 MHz) 0.25 µs (at 2.7 V to 5.5 V, 8 MHz) 62.5 µs (at 2.0 V to 5.5 V, 32 kHz)* * The lower limit for operation guarantee for flash memory built-in type is 2.5 V. MN101C57C Mask ROM 64K MN101C57D MN101CF57D FLASH  Interrupts RESET, Watchdog, External 0 to 3, External 4 (key interrupt selectable), External 5 (key interrupt dedicated), External 6, External 7, Remote control, Timer 0 to 3, Timer 6, Timer 7 (2 systems), Timer 8 (2 systems), Time base, Serial 0 (2 systems), Serial 2, A/D conversion finish Timer counter 0 : 8-bit × 1 (square-wave/8-bit PWM output, event count, generation of remote control carrier, simple pulse width measurement) (square-wave/PWM output to large current terminal P50 possible) Clock source................ 1/2, 1/4 of system clock frequency; 1/1, 1/4, 1/16, 1/32, 1/64 of OSC oscillation clock frequency; 1/1 of XI oscillation clock frequency; external clock input Interrupt source ........... coincidence with compare register 0 Timer counter 1 : 8-bit × 1 (square-wave output, event count, synchronous output event) Clock source................ 1/2, 1/8 of system clock frequency; 1/1, 1/4, 1/16, 1/8192, 1/32768 of OSC oscillation clock frequency; 1/1 of XI oscillation clock frequency; external clock input Interrupt source ........... coincidence with compare register 1 Timer counter 0, 1 can be cascade-connected.  Timer Counter Timer counter 2 : 8-bit × 1 (square-wave output, additional pulse type 10-bit PWM output, event count, synchronous output event, simple pulse width measurement) (square-wave/PWM output to large current terminal P52 possible) Clock source................ 1/2, 1/4 of system clock frequency; 1/1, 1/4, 1/16, 1/32, 1/64 of OSC oscillation clock frequency; 1/1 of XI oscillation clock frequency; external clock input Interrupt source ........... coincidence with compare register 2 Timer counter 3 : 8-bit × 1 (square-wave output, event count, generation of remote control carrier, serial 0 baud rate timer) Clock source................ 1/2, 1/8 of system clock frequency; 1/1, 1/4, 1/16, 1/64, 1/128 of OSC oscillation clock frequency; 1/1 of XI oscillation clock frequency; external clock input Interrupt source ........... coincidence with compare register 3 Timer counter 2, 3 can be cascade-connected. Timer counter 6 : 8-bit freerun timer Clock source................ 1/1 of system clock frequency; 1/1, 1/4096, 1/8192 of OSC oscillation clock frequency; 1/1, 1/4096, 1/8192 of XI oscillation clock frequency Interrupt source ........... coincidence with compare register 6 Timer counter 7 : 16-bit × 1 (square-wave output, IGBT/16-bit PWM output (cycle / duty continuous variable), event count, synchronous output evevt, pulse width measurement, input capture) (square-wave/PWM output to large current terminal P51 possible) Clock source................ 1/1, 1/2, 1/4, 1/16 of system clock frequency; 1/1, 1/2, 1/4, 1/16 of OSC oscillation clock frequency; 1/1, 1/2, 1/4, 1/16 of external clock input frequency Interrupt source ........... coincidence with compare register 7 (2 lines) MAD00019HEM MN101C57C, MN101C57D Timer counter 8 : 16 bit × 1 (square-wave/16-bit PWM output [duty continuous variable], event count, pulse width measurement, input capture) (square-wave/PWM output to large current terminal P53 possible) Clock source................ 1/1, 1/2, 1/4, 1/16, 1/128 of system clock frequency; 1/1, 1/2, 1/4, 1/16, 1/128 of OSC oscillation clock frequency; 1/1, 1/2, 1/4, 1/16 of external clock input frequency Interrupt source ........... coincidence with compare register 8 (2 lines) Timer counters 7, 8 can be cascade-connected. (square-wave output, PWM, input capture, pulse width measurement is possible as a 32-bit timer.) Time base timer (one-minute count setting) Clock source................ 1/1 of OSC oscillation clock frequency; 1/1 of XI oscillation clock frequency Interrupt source ........... 1/128, 1/256, 1/512, 1/1024, 1/8192, 1/32768 of clock source frequency Watchdog timer Interrupt source ........... 1/65536, 1/262144, 1/1048576 of system clock frequency  Serial interface Serial 0 : synchronous type/UART (full-duplex) × 1 Clock source................ 1/2, 1/4 of system clock frequency; 1/2 of pulse output of timer counter 3 frequency ; 1/2, 1/4, 1/16, 1/64 of OSC oscillation clock frequency Serial 2 : synchronous type × 1 Clock source................ 1/2, 1/4 of system clock frequency; 1/2 of pulse output of timer counter 3 frequency; 1/2, 1/4, 1/16, 1/32 of OSC oscillation clock frequency  Remote Contorol Interface Remote control output : timer 0 and 3 output : the remote control carrier output of 1/2 and 1/3 duty. Remote control reception : correspondence with low speed clock waiting Correspondence with AEHA (Association for Electric Home Appliances) format (selection of a formart is available by the set-up)  I/O Pins I/O Input 77 6 Common use , Specified pull-up resistor available, Input/output selectable (bit unit) Common use , Specified pull-up resistor available  A/D converter 10-bit × 16-ch. (with S/H) LCD 47 segments × 4 commons (static, 1/2, 1/3, or 1/4 duty) LCD power supply separated from VDD (usable if VLCD ≤ VDD) LCD power shunt resistance contained Buzzer output, remote control carrier signal output, high-current drive port  Display control function  Special Ports  Electrical Charactreistics (Supply current) Parameter Symbol IDD1 Operating supply current IDD2 IDD3 Supply current at HALT Supply current at STOP IDD4 IDD5 IDD6 IDD7 Condition fosc = 20 MHz , VDD = 5 V fosc = 8 MHz , VDD = 5 V fx = 32 kHz , VDD = 3 V fx = 32 kHz , VDD = 3 V, Ta = 25°C fx = 32 kHz , VDD = 3 V , Ta = –40°C to +85°C VDD = 5 V , Ta = 25°C VDD = 5 V , Ta = –40°C to +85°C ( Limit min typ 15 8 30 4 max 30 16 60 (70) 8 30 2 50 Unit mA mA µA µA µA µA µA ) : Flash memory built-in type MAD00019HEM  Pin Assignment  Development tools In-circuit Emulator PX-ICE101C/D+PX-PRB101C57-QFP100-P-1818B-M P65, SEG20, A5 P66, SEG19, A6 P67, SEG18, A7 P70, SEG17, A8 P71, SEG16, A9 P72, SEG15, A10 P73, SEG14, A11 P74, SEG13, A12 P75, SEG12, A13 P76, SEG11, A14 P77, SEG10, A15 P35, SEG9, A16 P36, SEG8, A17 P87, SEG7, D7 P86, SEG6, D6 P85, SEG5, D5 P84, SEG4, D4 P83, SEG3, D3 P82, SEG2, D2 P81, SEG1, D1 P80, SEG0, D0 P90, COM0 P91, COM1 P92, COM2 P93, COM3 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 MN101C57C MN101C57D QFP100-P-1818B 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 PB0, SEG46, AN8 VREFPA7, AN7 PA6, AN6 PA5, AN5 PA4, AN4 PA3, AN3 PA2, AN2 PA1, AN1 PA0, AN0 VREF+ VDD P25, RMIRQ P24, IRQ4 P23, IRQ3 P22, IRQ2 P21, IRQ1, ACZ P20, IRQ0 P15, TM8IO P14, TM7IO P13, TM3IO P12, TM2IO P11, TM1IO P10, RMOUT, TM0IO P06, NDK, BUZZER VLC1 VLCIN2, VLC2 VLCIN3, VLC3 C1 C2 NWE, TM0O, LED0, P50 NRE, TM7O, LED1, P51 NCS, TM2O, LED2, P52 TM8O, LED3, P53 LED4, P54 VSS OSC1 OSC2 MMOD XI XO VDD NRST, P27 VDD KEY10, TXDA, SBO0A, PO0 KEY11, RXDA, SBI0A, PO1 KEY12, SBT0A, PO2 KEY13, SBO2, PO3 KEY14, SBI2, PO4 KEY15, SBT2, PO5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 75 74 73 72 71 70 769 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 P64, SEG21, A4 P63, SEG22, A3 P62, SEG23, A2 P61, SEG24, A1 P60, SEG25, A0 P47, SEG26, KEY7, SDO7 P46, SEG27, KEY6, SDO6 P45, SEG28, KEY5, SDO5 P44, SEG29, KEY4, SDO4 P43, SEG30, KEY3, SDO3 P42, SEG31, KEY2, SDO2 P41, SEG32, KEY1, SDO1 P40, SEG33, KEY0, SDO0 P34, SEG34 P33, SEG35 P32, SEG36 P31, SEG37, IRQ7 P30, SEG38, IRQ6 PB7, SEG39, AN15, SBT0B PB6, SEG40, AN14, SBI0B, RXDB PB5, SEG41, AN13, SBO0B, TXDB PB4, SEG42, AN12 PB3, SEG43, AN11 PB2, SEG44, AN10 PB1, SEG45, AN9 MAD00019HEM Request for your special attention and precautions in using the technical information and semiconductors described in this book (1) If any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and regulations of the exporting country, especially, those with regard to security export control, must be observed. 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