BD4155FV

Power Management Switch IC Series for PCs and Digital Consumer Product Power Switch IC for ExpressCardTM BD4155FV No.09029EAT10 ●Description TM BD4155FV is a power management switch IC for the next generation PC card (ExpressCard ) developed by the PCMCIA. TM TM Standard, ExpressCard Compliance Checklist, and ExpressCardTM It conforms to the PCMCIA ExpressCard Implementation Guideline. , and obtains the Compliance ID “EC100052” from PCMCIA. The power switch offers a number of functions - card detector, and system status detector - which are ideally suited for laptop and desktop computers. ●Features TM 1) Incorporates three low on-resistance FETs for ExpressCard . 2) Incorporates an FET for output discharge. 3) Incorporates under voltage lockout (UVLO) protection. 4) Employs an SSOP-B20 package. 5) Built-in thermal shutdown protector (TSD). 6) Built-in soft start function. 7) Incorporates an overcurrent protection (OCP). 8) Built-in enable signal for PLL TM 9) Built-in Pull up resistance for detecting ExpressCard TM 10) Conforms to the ExpressCard Standard. 11) Conforms to the ExpressCardTM Compliance Checklist. TM 12) Conforms to the ExpressCard Implementation Guideline. ●Applications TM Laptop and desktop computers, and other ExpressCard equipped digital devices. ●Product Lineup Parameter Package BD4155FV SSOP-B20 “ExpressCardTM” is a registered trademark registered of the PCMCIA (Personal Computer Memory Card International Association). www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 1/16 2009.05 - Rev.A BD4155FV ●Absolute Maximum Ratings Parameter Input Voltage Logic Input Voltage Logic Output Voltage Logic Output applied Voltage Output Voltage Output current 1 Output current 2 Output current 3 Power Dissipation 1 Power Dissipation 2 Operating Temperature Range Storage Temperature Range Maximum Junction Temperature Symbol V3AUX_IN, V3_IN, V15_IN CPPE#,CPUSB#,SYSR,EC_CLKREQ#, EC_CLKEN#,EC_RST#,PLT_RST# PERST# PLL_CLKREQ# V3AUX,V3, V15 IOV3AUX IOV3 IOV15 Pd1 Pd2 Topr Tstg Tjmax Limit -0.3～+5.0 *1 Technical Note Unit V V V V V A A A mW mW ℃ ℃ ℃ -0.3～V3AUX_IN+0.3 *1 -0.3～V3AUX_IN+0.3 -0.3～+5.0 -0.3～+5.0 *1 1.0 2.0 2.0 500 *2 812.5 *3 -40～+100 -55～+150 +150 *1 Not to exceed Pd. *2 Reduced by 4.0mW for each increase in Ta of 1℃ over 25℃ *3 Reduced by 6.5mW for each increase in Ta of 1℃ over 25℃(When mounted on a board 70mmx70mmx1.6mm Glass-epoxy PCB). ●Operating Conditions (Ta=25℃) Parameter Input Voltage 1 Input Voltage 2 Input Voltage 3 Logic Input Voltage Logic Output Voltage 1 Logic Output Voltage 2 Output current 1 Output current 2 Output current 3 Symbol V3AUX_IN V3_IN V15_IN CPPE#,CPUSB#,SYSR,EC_CLKREQ#, EC_CLKEN#,EC_RST#,PLT_RST# PERST# PLL_CLKREQ# IOV3AUX IOV3 IOV15 MIN 3.0 3.0 1.35 0 0 0 0 0 0 MAX 3.6 3.6 1.65 V3AUX_IN V3AUX_IN 3.6 275 1.3 650 Unit V V V V V V mA A mA * This product is not designed to offer protection against radioactive rays. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 2/16 2009.05 - Rev.A BD4155FV ●Electrical Characteristics (unless otherwise noted, Ta=25℃ V3AUX_IN =V3_IN=3.3V,V15_IN=1.5V) Standard Value Parameter Symbol MIN TYP MAX Standby current Icc1 120 250 Bias current Icc2 250 500 [Logic] High Level Enable Input Voltage VLHI 2.0 Low Level Enable Input Voltage VLLOW 0.8 0 1 ICPPE# 10 30 0 1 ICPUSB# 10 30 Input current ISYSR -1 0 1 IEC_CLKEN# 5 0 20 IEC_CLKREQ# -1 0 1 IEC_RST# -1 0 1 IPLT_RST# -1 0 1 [Switch V3AUX] On Resistance RV3AUX 120 220 Discharge On Resistance RV3AUXDis 60 150 [Switch V3] On Resistance RV3 42 100 Discharge On Resistance RV3Dis 60 150 [Switch V15] On Resistance RV15 60 100 Discharge On Resistance RV15Dis 60 150 [Over Current Protection] V3 Over current OCPV3 1.6 V3AUX Over current OCPV3AUX 0.35 V15 Over current OCPV15 0.8 [Low input miss operation prevent Block] V3_IN threshold voltage VUVLOV3_IN 2.70 2.80 2.90 V3_IN hysteresis Voltage ⊿VUVLOV3_IN 50 100 150 V3AUX_IN threshold voltage VUVLOV3AUX_IN 2.70 2.80 2.90 V3AUX_IN hysteresis Voltage ⊿VUVLOV3AUX_IN 50 100 150 V15_IN threshold voltage VUVLOV15_IN 1.15 1.20 1.25 V15_IN hysteresis Voltage ⊿VUVLOV15_IN 50 100 150 [POWER GOOD] V3 POWER GOOD Voltage PGV3 2.700 2.850 3.000 V3AUX POWER GOOD Voltage PGV3AUX 2.700 2.850 3.000 V15 POWER GOOD Voltage PGV15 1.200 1.275 1.350 PERST# LOW Voltage VPERST#Low 0.1 0.3 PERST# HIGH Voltage VPERST#HIGH 3.0 PERST Delay TPERST# 4 10 20 PLL_CLKREQ# Low Voltage VPLL 0.1 0.2 PLL_CLKREQ# Leak Current IPLL 1 [WAKE UP TIME] V3_IN to V3 TV3 0.1 3 V3AUX_IN to V3AUX TV3AUX 0.1 3 V15_IN to V15 TV15 0.1 3 * Design Guarantee Technical Note Unit µA µA V V µA µA µA µA µA µA µA µA µA mΩ Ω mΩ Ω mΩ Ω A A A V mV V mV V mV V V V V V ms V µA ms ms ms Condition VSYSR=0V VSYSR=3.3V CPPE#=3.6V CPPE#=0V CPUSB#=3.6V CPUSB#=0V SYSR=3.6V EC_CLKEN#=3.6V EC_CLKREQ#=3.6V EC_RST#=3.6V PLT_RST#=3.6V Tj=-10～100℃ * Tj=-10～100℃ * Tj=-10～100℃ * sweep up sweep down sweep up sweep down sweep up sweep down IPERST=0.5mA IPLL_CLKREQ#=0.5mA VPLL_CLKREQ#=3.6V www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 3/16 2009.05 - Rev.A BD4155FV ●Reference data Technical Note CPPE#(2V/div) V3(2V/div) CPPE#(2V/div) SYSR(2V/div) V3(2V/div) V3(2V/div) V3AUX(2V/div) RV3=3.3Ω RV3AUX=13.2Ω RV15=3Ω V3AUX(2V/div) V3AUX(2V/div) V15(1V/div) V15(1V/div) 5.0ms/div 5.0ms/div V15(1V/div) 5.0ms/div Fig.1 Card Assert/ De-assert (Active) Fig.2 Card Assert/De-assert (Standby) Fig.3 System Active⇔Standby ( Card Present) SYSR(2V/div) CPPE#(2V/div) CPUSB#(2V/div) V3(2V/div) V3(2V/div) V3(2V/div) V3AUX(2V/div) V3AUX(2V/div) V3AUX(2V/div) V15(1V/div) 5.0ms/div V15(1V/div) 500μs/div V15(1V/div) 500μs/div Fig.4 System Active⇔Standby (No Card) Fig.5 Wakeup Wave Form (Card Assert) Fig.6 Wakeup Wave Form (USB2.0 Assert) SYSR(2V/div) SPPE#(2V/div) CPUSB#(2V/div) V3(2V/div) V3(2V/div) V3(2V/div) V3AUX(2V/div) V3AUX(2V/div) V3AUX(2V/div) V15(1V/div) V15(1V/div) 500μs/div V15(1V/div) 500μs/div 500μs/div Fig.7 Wakeup Wave Form (Standby→Active) Fig.8 Power Down Wave Form (Card De-assert) Fig.9 Power Down Wave Form (USB2.0 De-assert) SYSR(2V/div) CPPE#(2V/div) V3(2V/div) CPPE#(2V/div) V3(2V/div) V3(2V/div) V3AUX(2V/div) V3AUX(2V/div) V3AUX(2V/div) V15(1V/div) 500μs/div PERST#(2V/div) 500μs/div PLL_CLKREQ(2V/div) Fig.10 Power Down Wave Form (Active→Standby) www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. Fig.11 PERST# Wave Form (Card Assert/ De-assert) Fig.12 PLL_CLKREQ# Wave Form (Card Assert/ De-assert) 5.0ms/div 4/16 2009.05 - Rev.A BD4155FV Technical Note PLT_RST#(2V/div) USB2.0(2V/div) V3(2V/div) CPUSB#(2V/div) V3(2V/div) EC_RST(2V/div) V3AUX(2V/div) V3AUX(2V/div) V3(2V/div) PLL_CLK#(2V/div) PERST#(2V/div) 5.0ms/div 5.0ms/div PERST#(2V/div) 5.0ms/div Fig.13 PERST# Wave Form (USB2.0 Assert/ De-assert) PLT_RST#(2V/div) Fig.14 PLL_CLKREQ# Wave Form (USB2.0 Assert/ De-assert) EC_CLKREQ#(2V/div) Fig.15 PERST# Wave Form (PLT_RST Input) EC_CLKREQ#(2V/div) EC_RST(2V/div) EC_CLKEN#(2V/div) EC_CLKEN#(2V/div) V3(2V/div) V3(2V/div) V3(2V/div) PERST#(2V/div) PLL_CLKREQ#(2V/div) 5.0ms/div 1.0ms/div PLL_CLKREQ#(2V/div) 1.0ms/div Fig.16 PERST# Wave Form (EC_RST Input) V3_IN(2V/div) Fig.17 PLL_CLKREQ# Wave Form (EC_CLKREQ# Input) Fig.18 PLL_CLKREQ# Wave Form (EC_CLKEN# Input) V3AUX_IN(2V/di V15_IN(2V/div) V3(2V/div) V3(2V/div) V3(2V/div) V3AUX(2V/div) V3AUX(2V/div) V3AUX(2V/div) V15(1V/div) V15(1V/div) V15(1V/div) 500μs/div 500μs/div 500μs/div Fig.19 Output Voltage (V3_IN:OFF→ON) Fig.20 Output Voltage (V3AUX_IN:OFF→ON) Fig.21 Output Voltage (V15_IN:OFF→ON) V3_IN(2V/div) V3AUX_IN(2V/div) V15_IN(2V/div) V3(2V/div) V3AUX(2V/div) RV3=3.3Ω RV3AUX=13.2Ω RV15=3Ω V15(1V/div) 500μs/div V3(2V/div) V3(2V/div) V3AUX(2V/div) V3AUX(2V/div) RV3=3.3Ω RV3AUX=13.2Ω RV15=3Ω RV3=3.3Ω RV3AUX=13.2Ω V15(1V/div) RV15=3Ω 500μs/div V15(1V/div) 500μs/div Fig.22 Output Voltage (V3_IN:ON→OFF) www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. Fig.23 Output Voltage (V3AUX_IN:ON→OFF) Fig.24 Output Voltage (V15_IN:ON→OFF) 5/16 2009.05 - Rev.A BD4155FV ●Reference data OUTPUT CONDITION LIST(Protect Circuit) Condition CPxx# H UVLO(V3/V15) ON L OFF UVLO(V3AUX) OFF ON OFF ON OFF Thermal V3/V15 L Hi-Z L H Hi-Z Technical Note Output V3AUX L H L H Hi-Z State OFF ON ↓ Stand-by Stand-by V3AUX_IN 0 1 1 ON 1 OUTPUT CONDITION LIST(Logic) Input V3_IN V15_IN SYSR CPPE# 0 0 0 x 1 x x x 1→0 0 1 x x 0 x 0 1 1 1 1 x 0 CPUSB# x 1 0 x 1 0 x 1 0 x V3/V15 OFF OFF OFF OFF OFF OFF OFF OFF ON ON Output V3AUX OFF OFF ON ON OFF OFF OFF OFF ON ON State OFF Stand-by V3AUX_IN 0 1 V3_IN 0 x OUTPUT CONDITION LIST(PERST#) Input POWER V15_IN SYSR CPPE# CPUSB# GOOD 0 0 x x x x 0 x x x 1 1 x 0 x NG 1 1 OK 0 1 x OK 0 x Output PLT_RST# EC_RST# x x x x 0 1 x x x x x 0 1 0 1 x PERST# L L L L L L L H L ON 1 1 State OFF Stand-by V3AUX_IN 0 1 V3_IN 0 x OUTPUT CONDITION LIST(PLL_CLKREQ#) Input POWER V15_IN SYSR CPPE# CPUSB# GOOD 0 0 x x x x 0 x x x 1 1 x 0 x NG 1 1 OK 0 1 x OK 0 x ON 1 1 Output EC_ EC_ PLL_ CLKREQ# CLKEN# CLKREQ# x x Hi-Z x x L x x H x x H 0 L 0 1 H 0 H 1 1 H x x H www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 6/16 2009.05 - Rev.A BD4155FV ●BLOCK DIAGRAM Technical Note V3_IN 4 3.3V 5 V3_IN2 TSD,CL,UVLO V3AUX_IN 18 3.3V TSD,CL,UVLO_AUX VD 17 VD 6 7 V3-1 3.3V/1.30A V3-2 3.3V AUX/275mA V3AUX V15_IN1 15 1.5V 16 V15_IN2 V15-1 1.5V/625mA 13 14 1 V3AUX_IN 2 VD 12 11 3 V3AUX_IN V3AUX_IN Input logic TSD,CL,UVLO Thermal protection Power good EN,SYSR CPUSB# CPPE# 20 9 CL EC_CLKEN#(from host) V15-2 PLT_RST#(from host) EC_RST#(from host) 8 PERST#(to card) 19 PLL_CLKREQ#(to PLL) (from card) CPPE# (from card) CPUSB# (from host) SYSR EC_CLKREQ#(from card) TSD V3_IN,V3AUX_IN,V15_IN V3,V3AUX,V15 UVLO UVLO_AUX Reference Block Charge Pump V3_IN V3AUX_IN V15_IN VD Under voltage lock out GND 10 ●Pin Configration ●Pin Function PIN No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 PIN NAME PLT_RST# EC_RST# SYSR V3_IN1 V3_IN2 V3_1 V3_2 PERST# EC_CLKEN# GND CPUSB# CPPE# V15_1 V15_2 V15_IN1 V15_IN2 V3AUX V3AUX_IN PLL_CLKREQ# EC_CLKREQ# PIN FUNCTION Logic input pin (from HOST) Logic input pin (from HOST) Logic input pin V3 input pin 1 V3 input pin 2 V3 output pin 1 V3 output pin 2 Logic output pin Logic input pin (from HOST) GND pin Logic input pin Logic input pin V15 output pin 1 V15 output pin 2 V15 input pin 1 V15 input pin 2 V3AUX output pin V3AUX input pin 1 Clock enable signal (to PLL) Logic input pin (from CARD) PLT_RST# EC_RST# SYSR V3_IN1 V3_IN2 V3_1 V3_2 PERST# EC_CLKEN# 1 2 3 4 5 6 7 8 9 20 EC_CLKREQ# 19 PLL_CLKREQ# 18 V3AUX_IN1 17 V3AUX 16 V15_IN2 15 V15_IN1 14 V15_2 13 V15_1 12 CPPE# 11 CPUSB# GND 10 SSOP-B20 Package www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 7/16 2009.05 - Rev.A BD4155FV Technical Note ●Description of block operation V3_IN, V15_IN, and V3AUX_IN These are the input terminals for each channel of a 3ch switch. V3_IN and V15_IN terminals have two pins each, which should be short-circuited on the pc board with a thick conductor. A large current runs through these three terminals : (V3_IN: 1.35A; V3AUX_IN: 0.275 A; and V15_IN: 0.625 A). In order to lower the output impedance of the connected power supply, it is recommended that ceramic capacitors (with B-type characteristics or better) be provided between these terminals and the ground. Specifically, the capacitors should be on the order of 1 μF between V3_IN and GND, and between V15_IN and GND; and on the order of 0.1 μF between V3AUX_IN and GND. V3, V15, and V3AUX These are the output terminals for each switch. The V3 and V15 terminals have two pins each, which should be short-circuited on the PC board and connected to an ExpressCard connector with a thick conductor, as short as possible. In order to stabilize the output, it is recommended that ceramic capacitors (with B-type characteristics or better) be provided between these terminals and the ground. Specifically, the capacitors should be on the order of 10 μF between V3 and GND, and between V15 and GND; and on the order of 1 μF between V3AUX and GND. CPPE# This pin is used to find whether or not a PCI-Express signal compatible card is present. Turns to “High” level with an input of 2.0 volts or higher, which means that no card is provided, while it turns to “Low” level when the input is lowered to 0.8 volts or less, which means that a card is provided. Controls the ON/OFF, switch selecting the proper mode based on the status of the system. Pull up resistance (100kΩ～200kΩ) is built into, so the number of components is reduced. CPUSB# This pin is used to find whether or not a USB2.0 signal compatible card is present. Turns to “High” level with an input of 2.0 volts or higher, which means that no card is provided, while it turns to “Low” level when the input is lowered to 0.8 volts or less, which means that a card is provided. Controls the ON/OFF switch, selecting the proper mode based on the system status. Pull up resistance (100kΩ～200kΩ) is built into, so the number of components is reduced. SYSR These pins are used to detect the system status. Turns to “High” level with an input of 2.0 volts or higher, which means that the system is activated, while it turns to “Low” level when the input is lowered to 0.8 volts or less, which means that the system is on standby. PLT_RST#, EC_RST# These pins are used to control the reset signal (PERST#) to a card from the system side. (Also referred to as “SysReset#” by PCMCIA.) Turns to “High” level with an input of 2.0 volts or higher, and sets PERST# to “High” AND with a “Power Good” output. Turns to “Low” level and sets PERST# to “Low” when the input falls to 0.8 volts or less. PERST# This pin is used to send a reset signal to a PCI-Express compatible card. Reset status is determined by the outputs, PLT_RST#, EC_RST#, CPPE# system status. Turns to “High” level and activates the PCI-Express compatible card only if each output is within the “Power Good” threshold, with the card inserted and PLT_RST#, EC_RST# turned to “High” level. EC_CLKEN#, EC_CLKREQ# These pins are used to control the enable signal (PLL_CLKREQ#) to the reference clock. Turns to “High” level and set PLL_CLKREQ# to “High” when the input rise to 2.0 volts or higher. Turns to “Low” level with an input of 0.8 volts or less, and sets PLL_CLKREQ# to “Low” or with a inverting “Power Good” output. PLL_CLKREQ# This pin is used to send an enable signal to the reference clock. Activation status is determined by the outputs, EC_CLKEN#, EC_CLKREQ#, CPPE# system status. Turns to “Low” level and activates the reference clock PLL only if each output is within the “Power Good” threshold, with the card kept inserted, and EC_CLKEN#, EC_CLKREQ# turned to “Low”level. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 8/16 2009.05 - Rev.A BD4155FV ●Timing Chart Power ON/OFF Status of ExpressCardTM System Status Primary OFF ON Auxiliary OFF ON ExpressCardTM Module Status Don’t care De-asserted Asserted De-asserted ON ON Asserted Before This Asserted After This Technical Note Power Switch Status Primary (+3.3V and +1.5V) OFF OFF ON OFF OFF OFF Auxiliary (3.3V Aux) OFF OFF ON OFF ON OFF ExpressCardTM States Transition Diagram SYSR=H⇔L CP#=H SYSR=H CP#=H→L SYSR=L→H CP#=L V3AUX=ON V15=V3=ON SYSR=H CP#=L→H SYSR=H→L CP#=L SYSR=L ⇔ CP#=L SYSR=H CP#=H SYSR=H→L CP#=L SYSR=L CP#=L→H SYSR=L CP#=H⇔L V3AUX=OFF V15=V3=OFF V3AUX=ON V15=V3=OFF SYSR=L→H CP#=L System Status Stand-by Status ON Status From ON to Stand-by Status From Stand-by to ON Status :SYSR=L :SYSR=H :SYSR=H→L :SYSR=L→H Card Status Card Asserted Status Card De-asserted Status From De-asserted to Asserted Status From Asserted to De-asserted Status :CP#=L :CP#=H :CP#=H→L :CP#=L→H www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 9/16 2009.05 - Rev.A BD4155FV ■ BD4155FV Evaluation Board U1 SW1 GND V3AUX_IN R1a R1 PLT_RST# V3AUX_IN SW2 R2a R2 EC_RST# V3AUX_IN SW3 R3a SYSR R3 GND V3_IN C4 GND C1 GND C2 GND C3 2 EC_RST# PLL_CLKREQ# 19 1 Technical Note BD4155FV PLT_RST# EC_CLKREQ# 20 C20 GND V3AUX_IN R20 R20a SW20 GND V3AUX_IN EC_CLKREQ# R19 PLL_CLKREQ# GND V3AUX_IN(S) 3 SYSR V3AUX_IN1 18 V3AUX(S) 4 V3_IN1 V3AUX 17 V15_IN(S) 5 V3_IN2 V15_IN2 16 V3AUX_IN V3AUX_IN C18 GND V3AUX C17 GND V15_IN C15 GND GND V3_IN(S) V3(S) V3 C6 GND 7 V3_2 V15_2 14 V15(S) 6 V3_1 V15_IN1 15 V15 C13 GND PERST # SW9 GND V3AUX_IN R9a EC_CLKEN# R9 C9 GND 8 PERST# V15_1 13 V3AUX_IN SW12 9 EC_CLKEN# CPPE# 12 C12 R12 R12a 10 GND CPUSB# 11 GND C11 GND V3AUX_IN CPPE# SW11 R11 R11a GND CPUSB# GND GND SSOP-B20 ■ BD4155FV Evaluation Board Application Components Part No Value Company Part Name R1 R1a R2 R2a R3 R3a R9 R9a R11 R11a R12 R12a R19 R20 R20a 0Ω 100kΩ 0Ω 100kΩ 0Ω 100kΩ 0Ω 100kΩ 0Ω 0Ω 10kΩ 0Ω 100kΩ ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM MCR03series MCR03series MCR03series MCR03series MCR03series MCR03series MCR03series MCR03series MCR03series MCR03series MCR03series MCR03series MCR03series Part No C1 C2 C3 C4 C6 C9 C11 C12 C13 C15 C17 C18 C20 Value 1μF 10μF 10μF 1μF 1μF 0.1μF - Company ROHM ROHM ROHM ROHM ROHM ROHM - Part Name MCH213CN105K MCH218CN106K MCH218CN 106K MCH213CN 105K MCH213CN 105K MCH182CN104K - www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 10/16 2009.05 - Rev.A BD4155FV ■ BD4155FV Evaluation Board Layout Silk Screen TOP Layer Technical Note Mid Layer 1 Mid Layer 2 Bottom Layer www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 11/16 2009.05 - Rev.A BD4155FV ●Application Circuit (Circuit for ExpressCardTM Compliance Checklist) Technical Note EC_CLKREQ#(20pin) CPPE#(1) CPPE#(12pin) EC_CLKEN #(9pin) CPUSB#(2) CPUSB#(11pin) V3_IN(4,5pin) 3.3V(7) 3.3V(3) V3(6,7pin) V3AUX_IN(18pin) 3.3Vaux(8) BD4155FV 3.3Vaux(4) V3AUX(17pin) V15_IN(15,16pin) 1.5V(9) 1.5V(5) V15(13,14pin) PLT_RST#(1pin) or EC_RST#(2pin) SysReset#(10) PERST#(6) V3AUX_IN PERST#(8pin) PLL_CLKREQ#(19pin) GND(10pin) SYSR(3pin) ●Heat loss Thermal design should allow the device to operate within the following conditions. Note that the temperatures listed are the allowed temperature limits. Thermal design should allow sufficient margin from these limits. 1. Ambient temperature Ta can be no higher than 100°C. 2. Chip junction temperature Tj can be no higher more than 150°C. Chip junction temperature Tj can be determined as follows: ①Chip junction temperature Tj is calculated from IC surface temperature TC under actual application conditions: Tj=TC+θj-c×W ＜Reference value＞ θj-c:SSOP-B20 35℃/W ②Chip junction temperature Tj is calculated from ambient temperature Ta: Tj=TC+θj-a×W ＜Reference value＞ θj-a:SSOP-B20 250℃/W (IC only) 153.8℃/W Single-layer substrate (substrate surface copper foil area: less than 3%) 3 Substrate size 70×70×1.6mm (thermal vias in the board.) Most of heat loss in the BD4155FV occurs at the output switch. The power lost is determined by multiplying the on-resistance by the square of output current of each switch. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 12/16 2009.05 - Rev.A BD4155FV ●Equivalent Circuit 1pin V3AUX_IN Technical Note 2pin V3AUX_IN 3pin V3AUX_IN 4,5pin 6,7pin V3_IN 8pin V3AUX_IN V3 9pin V3AUX_IN 11pin V3AUX_IN V3AUX_IN 12pin V3AUX_IN V3AUX_IN 13,14pin V3_IN 15,16pin 17pin V3AUX_IN V15 18pin 19pin 20pin V3AUX_IN V3AUX www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 13/16 2009.05 - Rev.A BD4155FV Technical Note ●Notes for use 1.Absolute maximum ratings Although quality is rigorously controlled, the device may be destroyed when applied voltage, operating temperature, etc. exceeds its absolute maximum rating. Because the source (short mode or open mode) cannot be identified once the IC is destroyed, it is important to take physical safety measures such as fusing when implementing any special mode that operates in excess of absolute rating limits. 2.Thermal design Consider allowable loss (Pd) under actual operating conditions and provide sufficient margin in the thermal design. 3.Terminal-to-terminal short-circuit and mis-mounting When the mounting the IC to a printed circuit board, take utmost care to assure the position and orientation of the IC are correct. In the event that the IC is mounted erroneously, it may be destroyed. The IC may also be destroyed when a short-circuit is caused by foreign matter introduced into the clearance between outputs, or between an output and power-GND. 4.Operation in strong electromagnetic fields Using the IC in strong electromagnetic fields may cause malfunctions. Exercise caution in respect to electromagnetic fields. 5.Built-in thermal shutdown protection circuit This IC incorporates a thermal shutdown protection circuit (TSD circuit). The working temperature is 175°C (standard value) with a -15°C (standard value) hysteresis width. When the IC chip temperature rises the TSD circuit is activated, while the output terminal is brought to the OFF state. The built-in TSD circuit is intended exclusively to shut down the IC in a thermal runaway event, and is not intended to protect the IC or guarantee performance in these conditions. Therefore, do not operate the IC after with the expectation of continued use or subsequent operation once this circuit is activated. 6.Capacitor across output and GND When a large capacitor is connected across the output and GND, and the V3AUX_IN is short-circuited with 0V or GND for any reason, current charged in the capacitor flows into the output and may destroy the IC. Therefore, use a capacitor smaller than 1000 μF between the output and GND. 7.Set substrate inspection Connecting a low-impedance capacitor to a pin when running an inspection with a set substrate may produce stress on the IC. Therefore, be certain to discharge electricity at each process of the operation. To prevent electrostatic accumulation and discharge in the assembly process, thoroughly ground yourself and any equipment that could sustain ESD damage, and continue observing ESD-prevention procedures in all handling, transfer and storage operations. Before attempting to connect the set substrate to the test setup, make certain that the power supply is OFF. Likewise, be sure the power supply is OFF before removing the substrate from the test setup. 8.IC terminal input + This integrated circuit is a monolithic IC, with P substrate and P isolation between elements. The P layer and N layer of each element form a, PN junction. When the potential relation is GND>terminal A>terminal B, the PN junction works as a diode, and when terminal B>GND terminal A, the PN junction operates as a parasitic transistor. Parasitic elements inevitably form, due to the nature of the IC construction. The operation of the parasitic element gives rise to mutual interference between circuits and results in malfunction, and eventually, breakdown. Consequently, take utmost care not to use the IC in a way that would cause the parasitic element to actively operate, such as applying voltage lower than GND (P substrate) to the input terminal. Resistor （PIN A） （PIN B） C NPN Transistor Structure (NPN) B E Parasitic diode GND N P+ N N P substrate N Parasitic diode GND Parasitic diode N P substrate GND Nearby other device Parasitic diode P P+ P+ N N C B E GND P P+ （PIN A） GND （PIN B） 9. GND wiring pattern If both a small signal GND and a high current GND are present, it is recommended that the patterns for the high current GND and the small signal GND be separated. Proper grounding to the reference point of the set should also be provided. In this way, the small signal GND voltage will by unaffected by the change in voltage stemming from the pattern wiring resistance and the high current. Also, pay special attention to avoid undesirable wiring pattern fluctuations in any externally connected GND component. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 14/16 2009.05 - Rev.A BD4155FV Technical Note 10. Electrical characteristics The electrical characteristics in the Specifications may vary, depending on ambient temperature, power supply voltage, circuit(s) externally applied, and/or other conditions. Therefore, please check all such factors, including transient characteristics, that could affect the electrical characteristics. 11. Capacitors applied to input terminals The capacitors applied to the input terminals (V3_IN, V3AUX_IN and V15_IN) are used to lower the output impedance of the connected power supply. An increase in the output impedance of the power supply may result in destabilization of input voltages (V3_IN, V3AUX_IN and V15_IN). It is recommended that a low-ESR capacitor be used, with a lower temperature coefficient (change in capacitance vs. change in temperature), Recommended capacitors are on the order of 0.1 μF for V3AUX_IN, and1 μF for V3_IN and V15_IN. However, they must be thoroughly checked at the temperature and with the load range expected in actual use, because capacitor selection depends to a significant degree on the characteristics of the input power supply to be used and the conductor pattern of the PC board. 12. Capacitors applied to output terminals Capacitors for the output terminals (V3, V3_AUX, and V15), should be connected between each of the output terminals and GND. A low-ESR, low temperature coefficient output capacitor is recommended-on the order of 1 μF for V3 and V15 terminals, and 1μF less for V3_AUX. However, they must be thoroughly checked at the temperature and with the load range expected in actual use, because capacitor selection depends to a significant degree on the temperature and the load conditions. 13. Not of a radiation-resistant design. 14. Allowable loss (Pd) With respect to the allowable loss, please refer to the thermal derating characteristics shown in the Exhibit, which serves as a rule of thumb. When the system design causes the IC to operate in excess of the allowable loss, chip temperature will rise, reducing the current capacity and decreasing other basic IC functionality. Therefore, design should always enable IC operation within the allowable loss only. 15. Operating range Basic circuit functions and operations are warranted within the specified operating range the working ambient temperature range. Although reference values for electrical characteristics are not warranted, no rapid or extraordinary changes in these characteristics are expected, provided operation is within the normal operating and temperature range. 16. The applied circuit example diagrams presented here are recommended configurations. However, actual design depends on IC characteristics, which should be confirmed before operation. Also, note that modifying external circuits may impact static, noise and other IC characteristics, including transient characteristics. Be sure to allow sufficient margin in the design to accommodate these factors. 17. Wiring to the input terminals (V3 IN, V3AUX IN, and V15 IN) and output terminals (V3, V3AUX and V15) of the built-in FET should be carried out with special care. Using unnecessarily long and/or thin conductors may decrease output voltage and degrade other characteristics. 18. Heatsink The heatsink is connected to the SUB, which should be short-circuited to the GND. Proper heatsink soldering to the PC board should enable lower thermal resistance. ●Power Dissipation Mounted on board 70mm×70mm×1.6mmglass-epoxy PCB θj-a=153.8℃ /W 812.5mW 800 Power Dissipation (Pd) W ithout heat sink θ j-a=250.0℃ /W 500mW 1 00℃ [mW] 1000 600 400 200 0 0 25 50 75 100 125 150 [ ℃] Ambient Temperature (Ta) www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 15/16 2009.05 - Rev.A BD4155FV ●Ordering part number Technical Note B D 4 1 5 5 F V - E 2 Part Number Part Number Package FV : SSOP-B20 Packaging and forming specification E2: Embossed tape and reel (SSOP-B20) SSOP-B20 6.5 ± 0.2 20 11 Tape Quantity 0.3Min. Embossed carrier tape 2500pcs E2 The direction is the 1pin of product is at the upper left when you hold 6.4 ± 0.3 4.4 ± 0.2 Direction of feed ( reel on the left hand and you pull out the tape on the right hand ) 1 10 0.15 ± 0.1 1.15 ± 0.1 0.1± 0.1 0.1 0.65 0.22 ± 0.1 1pin (Unit : mm) Direction of feed Reel ∗ Order quantity needs to be multiple of the minimum quantity. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 16/16 2009.05 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law. Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us. ROHM Customer Support System http://www.rohm.com/contact/ www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. R0039A