PDTC114ET-QR

PDTC114ET-Q 50 V, 100 mA NPN resistor-equipped transistor; R1 = 10 kΩ, R2 = 10 kΩ 7 October 2021 Product data sheet 1. General description NPN Resistor-Equipped Transistor (RET) in a small SOT23 Surface-Mounted Device (SMD) plastic package. PNP complement: PDTA114ET-Q 2. Features and benefits • • • • • • 100 mA output current capability Built-in bias resistors Simplifies circuit design Reduces component count Reduces pick and place costs Qualified according to AEC-Q101 and recommended for use in automotive applications 3. Applications • • • • Digital application in automotive and industrial segments Cost-saving alternative for BC847-Q series in digital applications Controlling IC inputs Switching loads 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VCEO collector-emitter voltage open base - - 50 V IO output current - - 100 mA R1 bias resistor 1 [1] 7 10 13 kΩ R2/R1 bias resistor ratio [1] 0.8 1 1.2 [1] See "Section 11: Test information" for resistor calculation and test conditions. PDTC114ET-Q Nexperia 50 V, 100 mA NPN resistor-equipped transistor; R1 = 10 kΩ, R2 = 10 kΩ 5. Pinning information Table 2. Pinning information Pin Symbol Description 1 I input (base) 2 GND ground (emitter) 3 O output (collector) Simplified outline Graphic symbol 3 O I R1 R2 1 2 GND SOT23 sym007 6. Ordering information Table 3. Ordering information Type number Package PDTC114ET-Q Name Description Version SOT23 plastic, surface-mounted package; 3 terminals; 1.9 mm pitch; 2.9 mm x 1.3 mm x 1 mm body SOT23 7. Marking Table 4. Marking codes Type number Marking code[1] PDTC114ET-Q %16 [1] % = placeholder for manufacturing site code PDTC114ET-Q Product data sheet All information provided in this document is subject to legal disclaimers. 7 October 2021 © Nexperia B.V. 2021. All rights reserved 2 / 13 PDTC114ET-Q Nexperia 50 V, 100 mA NPN resistor-equipped transistor; R1 = 10 kΩ, R2 = 10 kΩ 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VCBO collector-base voltage open emitter - 50 V VCEO collector-emitter voltage open base - 50 V VEBO emitter-base voltage open collector - 10 V VI input voltage positive - 40 V negative - -10 V - 100 mA - 250 mW IO output current Ptot total power dissipation Tj junction temperature - 150 °C Tamb ambient temperature -65 150 °C Tstg storage temperature -65 150 °C [1] Tamb ≤ 25 °C [1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided, 35 μm copper, tin-plated and standard footprint. aaa-032854 300 Ptot (mW) 200 100 0 -75 -25 25 75 125 175 Tamb (°C) FR4 PCB, single-sided, 35 μm copper, tin-plated and standard footprint Fig. 1. Power derating curve PDTC114ET-Q Product data sheet All information provided in this document is subject to legal disclaimers. 7 October 2021 © Nexperia B.V. 2021. All rights reserved 3 / 13 PDTC114ET-Q Nexperia 50 V, 100 mA NPN resistor-equipped transistor; R1 = 10 kΩ, R2 = 10 kΩ 9. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Rth(j-a) [1] Conditions thermal resistance from in free air junction to ambient [1] Min Typ Max Unit - - 500 K/W Device mounted on an FR4 PCB, single-sided, 35 μm copper, tin-plated and standard footprint. 006aac779 103 duty cycle = 1 Zth(j-a) (K/W) 0.75 102 0.33 0.5 0.2 0.1 0.05 10 0.02 0.01 0 1 10-5 10-4 10-3 10-2 10-1 1 10 102 tp (s) 103 FR4 PCB, single-sided, 35 µm copper, tin-plated and standard footprint. Fig. 2. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values PDTC114ET-Q Product data sheet All information provided in this document is subject to legal disclaimers. 7 October 2021 © Nexperia B.V. 2021. All rights reserved 4 / 13 PDTC114ET-Q Nexperia 50 V, 100 mA NPN resistor-equipped transistor; R1 = 10 kΩ, R2 = 10 kΩ 10. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit V(BR)CBO collector-base breakdown voltage IC = 100 µA; IE = 0 A; Tamb = 25 °C 50 - - V V(BR)CEO collector-emitter breakdown voltage IC = 2 mA; IB = 0 A; Tamb = 25 °C 50 - - V ICBO collector-base cut-off current VCB = 50 V; IE = 0 A; Tamb = 25 °C - - 100 nA ICEO collector-emitter cut-off VCE = 30 V; IB = 0 A; Tamb = 25 °C current VCE = 30 V; IB = 0 A; Tj = 150 °C - - 100 nA - - 5 µA IEBO emitter-base cut-off current VEB = 5 V; IC = 0 A; Tamb = 25 °C - - 400 µA hFE DC current gain VCE = 5 V; IC = 5 mA; Tamb = 25 °C 30 - - VCEsat collector-emitter saturation voltage IC = 10 mA; IB = 0.5 mA; Tamb = 25 °C - - 100 mV VI(off) off-state input voltage VCE = 5 V; IC = 100 µA; Tamb = 25 °C - 1.1 0.8 V VI(on) on-state input voltage VCE = 0.3 V; IC = 10 mA; Tamb = 25 °C 2.5 1.8 - V R1 bias resistor 1 [1] 7 10 13 kΩ R2/R1 bias resistor ratio [1] 0.8 1 1.2 Cc collector capacitance VCB = 10 V; IE = 0 A; ie = 0 A; f = 1 MHz; Tamb = 25 °C - - 2.5 pF fT transition frequency VCE = 5 V; IC = 10 mA; f = 100 MHz; Tamb = 25 °C - 230 - MHz [1] [2] [2] See "Section 11: Test information" for resistor calculation and test conditions. Characteristics of built-in transistor. 006aac768 103 hFE 0.60 mA 0.54 mA 0.48 mA IC (A) (1) (2) (3) 102 aaa-018663 0.1 0.08 0.42 mA 0.36 mA 0.06 0.30 mA 0.24 mA 0.04 0.18 mA 10 0.12 mA 0.02 1 10-1 1 10 IC (mA) 102 VCE = 5 V (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = -40 °C Fig. 3. 0 IB = 0.06 mA 0 1 2 3 4 VCE (V) 5 Tamb = 25 °C Fig. 4. Collector current as a function of collectoremitter voltage; typical values DC current gain as a function of collector current; typical values PDTC114ET-Q Product data sheet All information provided in this document is subject to legal disclaimers. 7 October 2021 © Nexperia B.V. 2021. All rights reserved 5 / 13 PDTC114ET-Q Nexperia 50 V, 100 mA NPN resistor-equipped transistor; R1 = 10 kΩ, R2 = 10 kΩ 006aac769 1 006aac770 10 VCEsat (V) VI(on) (V) (1) (2) 10-1 1 (1) (3) (2) (3) 10-2 1 10 IC (mA) 10-1 10-1 102 IC/IB = 20 (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = -40 °C Fig. 5. 1 10 IC (mA) 102 VCE = 0.3 V (1) Tamb = -40 °C (2) Tamb = 25 °C (3) Tamb = 100 °C Collector-emitter saturation voltage as a function of collector current; typical values Fig. 6. 006aac771 10 On-state input voltage as a function of collector current; typical values 006aac772 3 Cc (pF) VI(off) (V) 2 (1) (2) 1 (3) 1 10-1 10-1 1 IC (mA) 0 10 VCE = 5 V (1) Tamb = -40 °C (2) Tamb = 25 °C (3) Tamb = 100 °C Fig. 7. Product data sheet 10 20 30 40 50 VCB (V) f = 1 MHz Tamb = 25 °C Fig. 8. Off-state input voltage as a function of collector current; typical values PDTC114ET-Q 0 Collector capacitance as a function of collectorbase voltage; typical values All information provided in this document is subject to legal disclaimers. 7 October 2021 © Nexperia B.V. 2021. All rights reserved 6 / 13 PDTC114ET-Q Nexperia 50 V, 100 mA NPN resistor-equipped transistor; R1 = 10 kΩ, R2 = 10 kΩ 006aac757 103 fT (MHz) 102 10 10-1 1 10 IC (mA) 102 f = 100 MHz Tamb = 25 °C VCE = 5 V Fig. 9. Transition frequency as a function of collector current; typical values of built-in transistor PDTC114ET-Q Product data sheet All information provided in this document is subject to legal disclaimers. 7 October 2021 © Nexperia B.V. 2021. All rights reserved 7 / 13 PDTC114ET-Q Nexperia 50 V, 100 mA NPN resistor-equipped transistor; R1 = 10 kΩ, R2 = 10 kΩ 11. Test information Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in automotive applications. Resistor calculation • Calculation of bias resistor 1 (R1) • Calculation of bias resistor ratio (R2/R1) n.c. II1; II2 R1 II3; II4 R2 GND aaa-020082 Fig. 10. Per transistor: Resistor test circuit Resistor test conditions Table 8. Resistor test conditions Type number PDTC114ET-Q PDTC114ET-Q Product data sheet R1 (kΩ) 10 R2 (kΩ) 10 Test conditions II1 II2 II3 II4 350 μA 450 μA -350 μA -450 μA All information provided in this document is subject to legal disclaimers. 7 October 2021 © Nexperia B.V. 2021. All rights reserved 8 / 13 PDTC114ET-Q Nexperia 50 V, 100 mA NPN resistor-equipped transistor; R1 = 10 kΩ, R2 = 10 kΩ 12. Package outline 3.0 2.8 1.1 0.9 3 0.45 0.15 2.5 1.4 2.1 1.2 1 2 1.9 0.48 0.38 Dimensions in mm 0.15 0.09 18-03-12 Fig. 11. Package outline SOT23 PDTC114ET-Q Product data sheet All information provided in this document is subject to legal disclaimers. 7 October 2021 © Nexperia B.V. 2021. All rights reserved 9 / 13 PDTC114ET-Q Nexperia 50 V, 100 mA NPN resistor-equipped transistor; R1 = 10 kΩ, R2 = 10 kΩ 13. Soldering 3.3 2.9 1.9 solder lands 3 solder resist 2 1.7 solder paste occupied area 0.6 (3×) 0.7 (3×) Dimensions in mm 0.5 (3×) 0.6 (3×) 1 sot023_fr Fig. 12. Reflow soldering footprint for SOT23 2.2 1.2 (2×) 1.4 (2×) solder lands 4.6 solder resist 2.6 occupied area Dimensions in mm 1.4 preferred transport direction during soldering 2.8 4.5 sot023_fw Fig. 13. Wave soldering footprint for SOT23 PDTC114ET-Q Product data sheet All information provided in this document is subject to legal disclaimers. 7 October 2021 © Nexperia B.V. 2021. All rights reserved 10 / 13 PDTC114ET-Q Nexperia 50 V, 100 mA NPN resistor-equipped transistor; R1 = 10 kΩ, R2 = 10 kΩ 14. Revision history Table 9. Revision history Data sheet ID Release date Data sheet status Change notice Supersedes PDTC114ET-Q v.2 20211007 Product data sheet - PDTC114ET-Q v.1 Modification: • • • • • • • • • • PDTC114ET-Q v.1 20210625 PDTC114ET-Q Product data sheet Complete rework General description: added new line at the end Applications: Clarification updated Limiting values: deleted parameter ICM Characteristics: ICEO max limit is updated to 100 nA Characteristics: VCEsat limit is now updated to 100 mV Characteristics: added new graphics Characteristics: Updated the graphics conditions Characteristics: V(BR)EBO values is removed Test information: Included resistor calculation, resistor test circuit and resistor test condition Product data sheet - All information provided in this document is subject to legal disclaimers. 7 October 2021 - © Nexperia B.V. 2021. All rights reserved 11 / 13 PDTC114ET-Q Nexperia 50 V, 100 mA NPN resistor-equipped transistor; R1 = 10 kΩ, R2 = 10 kΩ equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. 15. Legal information Data sheet status Document status [1][2] Product status [3] Definition Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Objective [short] data sheet Development This document contains data from the objective specification for product development. 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In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. 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This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use in automotive applications — This Nexperia product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or PDTC114ET-Q Product data sheet All information provided in this document is subject to legal disclaimers. 7 October 2021 © Nexperia B.V. 2021. All rights reserved 12 / 13 PDTC114ET-Q Nexperia 50 V, 100 mA NPN resistor-equipped transistor; R1 = 10 kΩ, R2 = 10 kΩ Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Applications.................................................................. 1 4. Quick reference data....................................................1 5. Pinning information......................................................2 6. Ordering information....................................................2 7. Marking.......................................................................... 2 8. Limiting values............................................................. 3 9. Thermal characteristics............................................... 4 10. Characteristics............................................................ 5 11. Test information.......................................................... 8 12. Package outline.......................................................... 9 13. Soldering................................................................... 10 14. Revision history........................................................11 15. Legal information......................................................12 © Nexperia B.V. 2021. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 7 October 2021 PDTC114ET-Q Product data sheet All information provided in this document is subject to legal disclaimers. 7 October 2021 © Nexperia B.V. 2021. All rights reserved 13 / 13