74ALVCH16244

74ALVCH16244 LOW VOLTAGE CMOS 16-BIT BUS BUFFER (3-STATE) WITH 3.6V TOLERANT INPUTS AND OUTPUTS s s s s s s s s s 3.6V TOLERANT INPUTS AND OUTPUTS HIGH SPEED : tPD = 3.0 ns (MAX.) at VCC = 3.0 to 3.6V tPD = 3.7 ns (MAX.) at VCC = 2.3 to 2.7V tPD = 5.1 ns (MAX.) at VCC = 1.65V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3.0V |IOH| = IOL = 12mA (MIN) at VCC = 2.3V |IOH| = IOL = 4mA (MIN) at VCC = 1.65V OPERATING VOLTAGE RANGE: VCC(OPR) = 1.65V to 3.6V BUS HOLD PROVIDED ON DATA INPUTS PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 16244 LATCH-UP PERFORMANCE EXCEEDS 300mA (JESD 17) ESD PERFORMANCE: HBM > 2000V (MIL STD 883 method 3015); MM > 200V TSSOP ORDER CODES PACKAGE TSSOP TUBE T&R 74ALVCH16244TTR PIN CONNECTION DESCRIPTION The 74ALVCH16244 is a low voltage CMOS 16 BIT BUS BUFFER (NON INVERTED) fabricated with sub-micron silicon gate and five-layer metal wiring C2MOS technology. It is ideal for low power and very high speed 1.65 to 3.6V applications; it can be interfaced to 3.6V signal environment for both inputs and outputs. Any nG output control governs four BUS BUFFERS. Output Enable input (nG) tied together gives full 16-bit operation. When nG is LOW, the outputs are enabled. When nG is HIGH, the output are in high impedance state. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. This device is designed to be used with 3 state memory address drivers, etc. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. February 2003 1/10 74ALVCH16244 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1 2, 3, 5, 6 8, 9, 11, 12 13, 14, 16, 17 19, 20, 22, 23 24 25 30, 29, 27, 26 36, 35, 33, 32 41, 40, 38, 37 47, 46, 44, 43 48 4, 10, 15, 21, 28, 34, 39, 45 7, 18, 31, 42 SYMBOL 1G 1Y1 to 1Y4 2Y1 to 2Y4 3Y1 to 3Y4 4Y1 to 4Y4 4G 3G 4A1 to 4A4 3A1 to 3A4 2A1 to 2A4 1A1 to 1A4 2G GND VCC NAME AND FUNCTION Output Enable Input Data Outputs Data Outputs Data Outputs Data Outputs Output Enable Input Output Enable Input Data Outputs Data Outputs Data Outputs Data Outputs Output Enable Input Ground (0V) Positive Supply Voltage IEC LOGIC SYMBOLS TRUTH TABLE INPUTS G L L H X : Don‘t Care Z : High Impedance OUTPUT An L H X Yn L H Z 2/10 74ALVCH16244 ABSOLUTE MAXIMUM RATINGS Symbol VCC VI VO VO IIK IOK IO Supply Voltage DC Input Voltage DC Output Voltage (OFF State) DC Output Voltage (High or Low State) (note 1) DC Input Diode Current DC Output Diode Current (note 2) DC Output Current Parameter Value -0.5 to +4.6 -0.5 to +4.6 -0.5 to +4.6 -0.5 to VCC + 0.5 - 50 - 50 ± 50 ± 100 400 -65 to +150 300 Unit V V V V mA mA mA mA mW °C °C ICC or IGND DC VCC or Ground Current per Supply Pin Power Dissipation PD Tstg TL Storage Temperature Lead Temperature (10 sec) Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied 1) IO absolute maximum rating must be observed 2) VO < GND, VO > VCC RECOMMENDED OPERATING CONDITIONS Symbol VCC VI VO VO IOH, IOL IOH, IOL IOH, IOL Top dt/dv Supply Voltage Input Voltage Output Voltage (OFF State) Output Voltage (High or Low State) High or Low Level Output Current (VCC = 3.0 to 3.6V) High or Low Level Output Current (VCC = 2.3 to 2.7V) High or Low Level Output Current (VCC = 1.65V) Operating Temperature Input Rise and Fall Time (note 1) Parameter Value 1.65 to 3.6 -0.3 to 3.6 0 to 3.6 0 to VCC ± 24 ± 12 ±4 -55 to 125 0 to 10 Unit V V V V mA mA mA °C ns/V 1) VIN from 0.8V to 2V at VCC = 3.0V 3/10 74ALVCH16244 DC SPECIFICATIONS Test Condition Symbol Parameter VCC (V) 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 1.65 to 3.6 1.65 2.3 2.3 2.7 3.0 3.0 VOL Low Level Output Voltage 1.65 to 3.6 1.65 2.3 2.3 2.7 3.0 II IIHOLD Input Leakage Current Input Hold Current 3.6 1.65 1.65 2.3 2.3 3.0 3.0 3.6 Ioff IOZ Power Off Leakage Current High Impedance Output Leakage Current Quiescent Supply Current ICC incr. per Input 0 3.6 IO=-100 µA IO=-4 mA IO=-6 mA IO=-12 mA IO=-12 mA IO=-12 mA IO=-24 mA IO=100 µA IO=4 mA IO=6 mA IO=12 mA IO=12 mA IO=24 mA VI = 0 or 3.6V VI =0.58 V VI =1.07 V VI =0.7 V VI =1.7 V VI =0.8 V VI =2 V VI = 0 to 3.6V VI or VO = 3.6V VI = VIH or VIL VO = 0 to VCC VI = VCC or GND IO= 0 VIH = VCC - 0.6V + 25 - 25 + 45 - 45 + 75 - 75 ± 500 10 ±5 -40 to 85 °C Min. 0.65 Vcc 1.7 2.0 0.35 Vcc 0.7 0.8 VCC-0.2 1.2 2.0 1.7 2.2 2.4 2.0 0.2 0.45 0.4 0.7 0.4 0.55 ±5 + 25 - 25 + 45 - 45 + 75 - 75 ± 500 20 ± 10 µA µA µA µA µA VCC-0.2 1.2 2.0 1.7 2.2 2.4 2.0 0.2 0.45 0.4 0.7 0.4 0.55 ±5 µA V V Max. Value -55 to 125 °C Min. 0.65 Vcc 1.7 2.0 0.35 Vcc 0.7 0.8 Max. Unit VIH High Level Input Voltage Low Level Input Voltage High Level Output Voltage VIL V VOH ICC ∆ICC 3.6 3.0 to 3.6 20 500 40 750 4/10 74ALVCH16244 AC ELECTRICAL CHARACTERISTICS Test Condition Symbol Parameter VCC (V) 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 CL (pF) 30 30 50 50 30 30 50 50 30 30 50 50 RL (Ω) 1000 500 500 500 1000 500 500 500 1000 500 500 500 ts = tr (ns) 2.0 2.0 2.5 2.5 2.0 2.0 2.5 2.5 2.0 2.0 2.5 2.5 -40 to 85 °C Min. 1 1 1 1 1 1 1 1 1 1 1 1 Max. 5.1 3.7 3.6 3.0 7.1 5.7 5.4 4.4 6.5 5.2 4.6 4.1 Value -55 to 125 °C Min. 1 1 1 1 1 1 1 1 1 1 1 1 Max. 5.1 3.7 3.6 3.0 7.1 5.7 5.4 4.4 6.5 5.2 4.6 4.1 Unit tPLH tPHL Propagation Delay Time tPZL tPZH Output Enable Time ns tPLZ tPHZ Output Disable Time 1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either HIGH or LOW (tOSLH = | tPLHm - tPLHn|, tOSHL = | tPHLm - tPHLn|) 2) Parameter guaranteed by design CAPACITIVE CHARACTERISTICS Test Condition Symbol Parameter VCC (V) 3.3 3.3 3.3 3.3 2.5 3.3 2.5 VIN =VCC or GND VIN =VCC or GND VIN = 0 to VCC fIN = 10MHz CL=50pF VIN = 0 or VCC Value TA = 25 °C Min. Typ. 3 6 7 19 16 5 4 Max. pF pF pF Unit CIN CIN COUT CPD CPD Input Capacitance Control Inputs Input Capacitance Data Inputs Output Capacitance Power Dissipation Capacitance Output enabled (note 1) Power Dissipation Capacitance Output disabled (note 1) pF 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/16 (per circuit) 5/10 74ALVCH16244 TEST CIRCUIT TEST tPLH, tPHL tPZL, tPLZ (VCC = 3.0 to 3.6V) tPZL, tPLZ (VCC = 2.3 to 2.7V) tPZH, tPHZ RT = ZOUT of pulse generator (typically 50Ω) SWITCH Open 6V 2VCC GND TEST CIRCUIT AND WAVEFORM SYMBOL VALUE Symbol 3.0 to 3.6V VIH VM VX VY CL RL=R1 tr = tr 2.7V 1.5V VOL +0.3V VOH -0.3V 50pF 500Ω