74V1T77CTR

74V1T77 SINGLE D-TYPE LATCH s s s s s s s s HIGH SPEED: tPD = 4.7ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8mA (MIN) at VCC = 4.5V BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 4.5V to 5.5V IMPROVED LATCH-UP IMMUNITY SOT23-5L SOT323-5L ORDER CODES PACKAGE SOT23-5L SOT323-5L T&R 74V1T77STR 74V1T77CTR DESCRIPTION The 74V1T77 is an advanced high-speed CMOS SINGLE D-TYPE LATCH fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is designed to operate from 4.5V to 5.5V, making this device ideal for portable applications. The single D-Type latch is controlled by an Latch Enable Input (LE). While the LE input is held at a high level, the Q output will follow the data input precisely. When the LE input is taken low the Q output is latched precisely at the logic level of D data input. Power down protection is provided on inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. It’s available in the commercial and extended temperature range. All inputs and output are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS July 2001 1/10 74V1T77 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1 2 4 3 5 SYMBOL D LE Q GND VCC NAME AND FUNCTION Data Input Latch Enable Input Data Output Ground (0V) Positive Supply Voltage TRUTH TABLE D L H L H LE L L H H Q No Change * No Change * L H (*) Q output is latched at the time when the LE input is taken low logic level. ABSOLUTE MAXIMUM RATINGS Symbol VCC VI VO IIK IOK IO Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Parameter Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC + 0.5 - 20 ± 20 ± 25 ± 50 -65 to +150 300 Unit V V V mA mA mA mA °C °C ICC or IGND DC VCC or Ground Current Tstg Storage Temperature TL Lead Temperature (10 sec) Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied RECOMMENDED OPERATING CONDITIONS Symbol VCC VI VO Top dt/dv Supply Voltage Input Voltage Output Voltage Operating Temperature Input Rise and Fall Time (note 1) (VCC = 5.0 ± 0.5V) Parameter Value 4.5 to 5.5 0 to 5.5 0 to VCC -55 to 125 0 to 20 Unit V V V °C ns/V 1) VIN from 0.8V to 2V 2/10 74V1T77 DC SPECIFICATIONS Test Condition Symbol Parameter VCC (V) 4.5 to 5.5 4.5 to 5.5 4.5 4.5 4.5 4.5 0 to 5.5 5.5 5.5 IO=-50 µA IO=-8 mA IO=50 µA IO=8 mA VI = 5.5V or GND VI = VCC or GND One Input at 3.4V, other input at VCC or GND TA = 25°C Min. 2 0.8 4.4 3.94 0.0 0.1 0.36 ± 0.1 1 1.35 4.5 4.4 3.8 0.1 0.44 ± 1.0 10 1.5 Typ. Max. Value -40 to 85°C Min. 2 0.8 4.4 3.7 0.1 0.55 ± 1.0 20 1.5 µA µA mA V Max. -55 to 125°C Min. 2 0.8 Max. V V V Unit VIH VIL VOH VOL II ICC High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Leakage Current Quiescent Supply Current Additional Worst Case Supply Current ICC AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3ns) Test Condition Symbol Parameter VCC (V) 5.0 5.0 5.0 5.0 (*) (*) (*) (*) CL (pF) 15 50 15 50 3.0 2.0 1.0 TA = 25°C Min. Typ. 4.4 4.8 4.7 5.3 Max. 6.5 7.0 6.5 7.0 Value -40 to 85°C Min. 1.0 1.0 1.0 1.0 3.0 2.0 1.0 Max. 7.5 8.0 7.5 8.0 -55 to 125°C Min. 1.0 1.0 1.0 1.0 3.0 2.0 1.0 Max. 8.5 9.0 8.5 9.0 ns ns ns ns ns Unit tPLH tPHL Propagation Delay Time LE to Q tPLH tPHL Propagation Delay Time D to Q tW ts th LE Pulse Width, HIGH Setup Time D to LE, HIGH or LOW Hold Time D to LE, HIGH or LOW 5.0 (*) 5.0 (*) 5.0 (*) (*) Voltage range is 5.0V ± 0.5V CAPACITIVE CHARACTERISTICS Test Condition Symbol Parameter Min. CIN CPD Input Capacitance Power Dissipation Capacitance (note 1) TA = 25°C Typ. 4 8 Max. 10 Value -40 to 85°C Min. Max. 10 -55 to 125°C Min. Max. 10 pF pF Unit 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC 3/10 74V1T77 TEST CIRCUIT CL = 15/50pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50Ω) WAVEFORM 1: LE TO Qn PROPAGATION DELAYS, LE MINIMUN PULSE WIDTH, Dn TO LE SETUP AND HOLD TIMES (f=1MHz; 50% duty cycle) 4/10 74V1T77 WAVEFORM 2: PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle) 5/10 74V1T77 SOT23-5L MECHANICAL DATA mm. DIM. MIN. A A1 A2 b C D E E1 e e1 L 0.35 0.90 0.00 0.90 0.35 0.09 2.80 2.60 1.50 0.95 1.9 0.55 13.7 TYP MAX. 1.45 0.15 1.30 0.50 0.20 3.00 3.00 1.75 MIN. 35.4 0.0 35.4 13.7 3.5 110.2 102.3 59.0 37.4 74.8 21.6 TYP. MAX. 57.1 5.9 51.2 19.7 7.8 118.1 118.1 68.8 mils 6/10 74V1T77 SOT323-5L MECHANICAL DATA mm. DIM. MIN. A A1 A2 b C D E E1 e e1 L 0.10 0.80 0.00 0.80 0.15 0.10 1.80 1.80 1.15 0.65 1.3 0.30 3.9 TYP MAX. 1.10 0.10 1.00 0.30 0.18 2.20 2.40 1.35 MIN. 31.5 0.0 31.5 5.9 3.9 70.9 70.9 45.3 25.6 51.2 11.8 TYP. MAX. 43.3 3.9 39.4 11.8 7.1 86.6 94.5 53.1 mils 7/10 74V1T77 Tape & Reel SOT23-xL MECHANICAL DATA mm. DIM. MIN. A C D N T Ao Bo Ko Po P 3.13 3.07 1.27 3.9 3.9 3.23 3.17 1.37 4.0 4.0 12.8 20.2 60 14.4 3.33 3.27 1.47 4.1 4.1 0.123 0.120 0.050 0.153 0.153 0.127 0.124 0.054 0.157 0.157 13.0 TYP MAX. 180 13.2 0.504 0.795 2.362 0.567 0.131 0.128 0.0.58 0.161 0.161 0.512 MIN. TYP. MAX. 7.086 0.519 inch 8/10 74V1T77 Tape & Reel SOT323-xL MECHANICAL DATA mm. DIM. MIN. A C D N T Ao Bo Ko Po P 3.98 3.98 2.25 2.7 1.2 4 4 4.2 4.2 0.156 0.156 175 12.8 20.2 59.5 60 60.5 14.4 0.088 0.106 0.047 0.157 0.157 0.165 0.165 TYP 180 13 MAX. 185 13.2 MIN. 6.889 0.504 0.795 2.362 0.567 TYP. 7.086 0.512 MAX. 7.283 0.519 inch 9/10 74V1T77 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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