E-L4973V3.3

L4973 3.5 A step down switching regulator Features ■ Up to 3.5 A step down converter ■ Operating input voltage from 8 V to 55 V ■ 3.3 V and 5.1 V (±1%) fixed output, and adjustable outputs from: – 0.5 V to 50 V (3.3 type) – 5.1 V to 50 V (5.1 type) DIP-18 (12+3+3) Description ■ Frequency adjustable up to 300 kHz ■ Voltage feed forward ■ Zero load current operation (min. 1 mA) ■ Internal current limiting (pulse by pulse and HICCUP mode) ■ Precise 5.1 V (1.5%) reference voltage externally available ■ Input/output synchronization function ■ Inhibit for zero current consumption (100 mA typ. at VCC = 24 V) ■ Protection against feedback disconnection ■ Thermal shutdown ■ Output over voltage protection ■ Soft-start function Figure 1. The L4973 is a step down monolithic power switching regulator delivering 3.5 A at fixed voltages of 3.3 V or 5.1 V and using a simple external divider output adjustable voltage up to 50V. Realized in BCD mixed technology, the device uses an internal power D-MOS transistor (with a typical RDS(on) of 0.15 Ω) to obtain very high efficiency and very fast switching times. Switching frequency up to 300 kHz are achievable (the maximum power dissipation of the packages must be observed). A wide input voltage range between 8 V to 55 V and output voltages regulated from 3.3 V to 40 V cover the majority of the today applications. Features of this new generation of DC-DC converter includes pulse by pulse current limit, hiccup mode for output short circuit protection, voltage feed forward regulation, soft-start, input/output synchronization, protection against feedback loop disconnection, inhibit for zero current consumption and thermal shutdown. Packages available are in plastic dual in line, DIP18 (12+3+3) for standard assembly, and SO20 (12+4+4) for SMD assembly. Internal schematic diagram VCC (8V to 55V) 7 C2 CBOOT 12 8 ROSC CIN SO-20 (12+4+4) 9 1 4,5,6,10 13,14,15 L4973 16 3 11 17 2 VO(3.3V or 5.1V) L1 RCOMP COSC CSS D1 COUT CCOMP D97IN554A February 2009 Rev 18 1/28 www.st.com 28 Contents L4973 Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3 2.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 Evaluation board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6 Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 7 Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 8 Application ideas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 9 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 10 Order code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 2/28 L4973 1 Block diagram Block diagram Figure 2. Block diagram INH VCC V5.1 10(11) 16(18) VCC 7(8) 8(9) CBOOT CHARGE ZERO CURRENT INHIBIT VREF GOOD 5.1V INTERNAL REFERENCE INTERNAL SUPPLY 5.1V 3.3V 17(19) SS COMP HICCUP CURRENT LIMITING SOFT START 11(12) CURRENT LIMITING THERMAL SHUTDOWN 5.1V 3.3V VFB 12(13) SYNC + E/A - PWM + R Q S Q 9(10) BOOT OSCILLATOR 18(20) DRIVER 4,5,6,13,14,15 (4,5,6,7,14,15,16,17) 1(1) OSC 2(2) GND OUT 3(3) OUT D94IN161B Pin x = Powerdip Pin (x) = S020 2 Pin settings 2.1 Pin connection Figure 3. Pin connection (top view) OSC 1 18 SYNC OUT 2 17 SS OUT 3 16 V5.1 GND 4 15 GND GND 5 14 GND GND 6 13 GND VCC 7 12 VFB VCC 8 11 COMP BOOT 9 10 INH OSC 1 20 SYNC OUT 2 19 SS OUT 3 18 V5.1 GND 4 17 GND GND 5 16 GND GND 6 15 GND GND 7 14 GND VCC 8 13 VFB VCC 9 12 COMP 10 11 INH BOOT D94IN162A D94IN163A DIP -18 (12+3+3) SO20 (12+4+4) 3/28 Pin settings 2.2 L4973 Pin description Table 1. Pin description N° Pin Name SO-20 11 12 COMP 10 11 INH 9 10 BOOT A capacitor connected between this pin and the output allows to drive the internal D-MOS. 18 20 SYNC Input/Output synchronization. 7,8 8,9 VCC Unregulated DC input voltage 2,3 2,3 OUT Stepdown regulator output. 4/28 1 E/A output to be used for frequency compensation A logic signal (active high) disables the device (sleep mode operation). If not used it must be connected to GND; if floating the device is disabled. 12 13 VFB Stepdown feedback input. Connecting the output directly to this pin results in an output voltage of 3.3 V for the L4973V3.3 and 5.1 V for L4973V5.1. An external resistive divider is required for higher output voltages. For output voltage resistive divider is required for higher output voltages. For output voltage less than 3.3 V, see Note: 1 and Figure 33. 16 18 V5.1 Reference voltage externally available. 4,5,6 13,14,15 4,5,6,7 14,15,16,17 GND Signal ground OSC An external resistor connected between the unregulated input voltage and Pin 1 and a capacitor connected from Pin 1 to ground fixes the switching frequency. (Line feed forward is automatically obtained) 1 Note: Description DIP-18 1 The maximum power dissipation of the package must be observed. L4973 Electrical data 3 Electrical data 3.1 Maximum ratings Table 2. Absolute maximum ratings Symbol Parameter DIP-18 S0-20 V7,V8 V9,V8 V2,V3 V2,V3 I2,I3 I2,I3 V9-V8 V10-V8 V9 V10 V11 Unit Input voltage 58 V Output DC voltage Output peak voltage at t = 0.1 μs f = 200 kHz -1 -5 V V Maximum output current int. limit. 14 V Bootstrap voltage 70 V V12 Analogs input voltage (VCC = 24 V) 12 V V17 V19 Analogs input voltage (VCC = 24 V) 13 V V12 V13 (VCC = 20 V) 6 -0.3 V V V18 V20 (VCC = 20 V) 5.5 0.3 V V V10 V11 Inhibit VCC -0.3 V V 5 1.3 2 W W W SO-20 Power dissipation a Tpins = 90 °C 4 W Junction and storage temperature -40 to 150 °C DIP 12+3+3 Power dissipation a Tpins ≤ 90 °C (TA = 70 °C no copper area) (TA = 70 °C 4 cm copper area on PCB) Ptot TJ,TSTG 3.2 Value Thermal data Table 3. Thermal data Symbol Parameter RthJP Maximum thermal resistance junction-pin RthJA Maximum thermal resistance junction-ambient DIP-18 SO-20 Unit 12 15 °C/W 60 (1) 80 (1) °C/W 1. Package mounted on board 5/28 Electrical characteristics 4 L4973 Electrical characteristics Table 4. Symbol Electrical characteristics (Refer to the test circuit,VCC = 24 V; TJ = 25 °C, COSC = 2.7 nF; ROSC = 20 kΩ; unless otherwise specified) Parameter Test condition Min Typ Max Unit 55 V Dynamic characteristics Input voltage range (1) VO = VREF to 40 V; IO = 3.5A (2) IO = 1 A Output voltage L4973V5.1 IO = 0.5 A to 3.5 A VCC = 8 V to 55 V (2) IO = 1 A Output voltage L4973V3.3 RDS(on ) Maximum limiting current η Efficiency IO = 0.5 A to 3.5 A VCC = 8 V to 40 V VCC = 10.5 V IO = 3.5 A (2) 8 5.05 5.1 5.15 V 5.00 5.1 5.20 V 4.95 5.1 5.25 V 3.326 3.36 3.393 V 3.292 3.36 3.427 V 3.26 3.36 3.46 V 0.15 0.22 Ω 0.35 Ω (2) (2) VCC = 8 V to 55 V 3.8 4.5 5.5 A 4 4.5 5.5 A VO = 5.1 V; IO = 3.5 A VO = 3.3 V; IO = 3.5 A (2) Switching frequency Δfsw Supply voltage ripple rejection Vi = VCC+2 VRMS VO = Vref; IO = 1 A; fripple = 100 Hz Switching frequency stability vs., supply voltage VCC = 8 V to 55 V 90 90 % 85 % 100 110 60 kHz dB 2 5 % 5.025 5.1 5.175 V 4.950 5.1 5.250 V Reference section Reference voltage (2) Line regulation Iref = 0 mA; VCC = 8 to 55 V 5 10 mV Load regulation Vref = 0 to 5 mA; VCC = 0 to 20 mA 2 6 10 25 mV mV 65 100 mA Short circuit current 6/28 Iref = 0 to 20 mA; VCC = 8 to 55 V 30 L4973 Electrical characteristics Table 4. Electrical characteristics (continued) (Refer to the test circuit,VCC = 24 V; TJ = 25 °C, COSC = 2.7 nF; ROSC = 20 kΩ; unless otherwise specified) Symbol Parameter Test condition Min Typ Max Unit Soft-start charge current 30 45 60 μA Soft-start discharge current 15 22 30 μA Soft-start Inhibit High level voltage (2) Low level voltage (2) Isource high level Isource low level 3.0 V 0.8 V VINH = 3 V (2) 10 16 50 μA VINH = 0.8 V (2) 10 15 50 μA 4 6 mA 2.7 4 mA 100 200 μA 150 300 μA DC characteristics Total operating quiescent current Duty cycle = 50 % Quiescent current Duty cycle = 0 Total stand-by quiescent VCC = 24 V; VINH = 5 V current VCC = 55 V; VINH = 5 V Error amplifier High level output voltage 11.0 V Low level output voltage 0.65 V 1 2 3 μA Source output current 200 300 600 μA Sink output current 200 300 μA Source bias current Supply voltage ripple rejection VCOMP = VFB CREF = 4.7 μF 1-5 mA load current 60 80 dB DC open loop gain RL = ∞ 50 60 dB Transconductance Icomp = -0.1 to 0.1 mA; Vcomp = 6 V 2.5 mS Oscillator section Ramp valley Ramp peak Maximum duty cycle VCC = 8 V VCC = 55 V 0.78 0.85 0.92 V 1.9 9 2.1 9.6 2.3 10.2 V V 95 97 % 7/28 Electrical characteristics Table 4. L4973 Electrical characteristics (continued) (Refer to the test circuit,VCC = 24 V; TJ = 25 °C, COSC = 2.7 nF; ROSC = 20 kΩ; unless otherwise specified) Symbol Parameter Maximum frequency Test condition Min Typ Duty cycle = 0%; ROSC =13 kΩ; COSC = 820 pF; Max Unit 300 kHz Sync function High input voltage VCC = 8 V to 55 V Low input voltage VCC = 8 V to 55 V Slave sink current Master output amplitude Isource = 3 mA Output pulse width No load, Vsync = 4.5 V 1. Pulse testing with a low duty cycle 2. Specifications referred to TJ from -40 °C to 125 °C. 8/28 3.5 V 0.9 V 0.45 mA 0.15 0.25 4 4.5 V 0.20 0.35 μs L4973 Evaluation board Figure 4. Evaluation board circuit SYNCH R6 NM JP1 3 1 C8 16 BOOT 9 18 220n L1 OUT OUT OSC R7 NM SS V5.1 Vout 15 14 13 6 5 4 Q2 NM D1 STPS5L60 C7 NM C6 NM C11 150u 50v C12 150u 50v R3 2.7k C13 NM C14 NM R4 4.99k signal GND 12 L4973 DIP 18 VFB COMP C9 220n GND GND GND GND GND GND 68uH 2 3 1 1 17 C10 470u 63v INH VCC VCC R1 15k SYNC 7 8 U1 10 2 2 Vin 11 5 Evaluation board C4 22n C1 2.7n GND C2 470n C3 NM C3A 1u R5 NM R2 15k C5 150p signal GND GND GND plane Table 5. Component list (fsw = 150 kHz, VOUT = 5 V) Reference Description R1 Resistor 15 kΩ 1% R2 Resistor 15 kΩ 1% R3 Resistor 2.7 kΩ 1% R4 Resistor 4.99 kΩ 1% R5 Not mounted R6 Not mounted R7 Not mounted C1 Capacitor 2.7 nF 5% C2 Capacitor 470 nF 5% C3 Capacitor 1 μF 5% C4 Capacitor 22 nF 5% C5 Capacitor 150 pF 5% C6 Not mounted C7 Not mounted C8 Capacitor 220 nF 5% C9 Capacitor 220 nF 5% C10 Capacitor 470 μF 63V Part number Manufacturer EKY-630ELL471ML20S Nippon Chemi-con 9/28 Evaluation board L4973 Table 5. Component list (fsw = 150 kHz, VOUT = 5 V) (continued) Reference Description Part number Manufacturer C11 Capacitor 150 μF 35 V EKY-350ELL151MHB5D Nippon Chemi-con C11 Capacitor 150 μF 35 V EKY-350ELL151MHB5D Nippon Chemi-con C13 Capacitor 100 nF 5 % C14 Not mounted L1 68 μH IRMS = 3.4 A ISAT = 6.7 A DO5040H-683MLD Coilcraft L4973V3.3 STMicroelectronics Part number Manufacturer Part number Manufacturer U1 Table 6. Reference Description R3 Resistor 2.7 kΩ 1% R4 Resistor 1 kΩ 1% Table 7. 10/28 Resistor divider for VOUT = 12 V Resistor divider for VOUT = 3.3 V Reference Description R3 Resistor 2.7 kΩ 1% R4 Not mounted L4973 Evaluation board Figure 5. Evaluation board (components side) Figure 6. Evaluation board (solder side) 11/28 Application circuit 6 L4973 Application circuit Figure 7. Application circuit (see Figure 4 part list) VCC R2 INH SYNC 10 18 7,8 9 C8 1 L4973V5.1 17 C1 C2 C7 C3 16 C4 4,5,6 13,14,15 11 C5 L1 12 Vo 2,3 3x C0 D1 R1 C12 C6 D97IN665A Figure 8. Application circuit (see Figure 4 part list) VCC R2 7,8 INH SYNC 10 18 9 C8 1 L4973V3.3 17 C1 C2 C7 C3 16 C4 C5 4,5,6 13,14,15 11 R1 C6 D97IN664A 12/28 L1 12 Vo 2,3 D1 3x C0 C12 L4973 7 Typical characteristics Typical characteristics Figure 9. Quiescent drain current vs. Figure 10. Quiescent drain current vs. input voltage (0% duty cycle) junction temperature Ibias (mA) D97IN633A Ibias (mA) D97IN634 200KHz-R2=22K C7=1.2nF 5.0 Tamb=25˚C 0% DC 200KHz-R2=22K C7=1.2nF 4.0 4.5 100KHz-R2=20K C7=2.7nF 4.0 100KHz-R2=20K C7=2.7nF 3.5 3.5 0% DC VCC = 35V 0Hz 3.0 3.0 0Hz 2.5 2.0 0 10 20 30 40 50 VCC(V) Figure 11. Stand by drain current vs. input voltage Ibias (μA) D97IN635A 2.5 -50 0 50 100 Tj(˚C) Figure 12. Reference voltage vs. junction temperature (pin 16) VREF (V) D97IN637 Pin 16 Vinh = 5V 5.15 150 Vcc=35V 25˚C 5.1 100 125˚C 5.05 50 0 10 20 30 40 50 VCC(V) 5.0 -40 -20 0 20 40 60 80 100 Tj(˚C) 13/28 Typical characteristics L4973 Figure 13. Reference voltage vs. input voltage (pin 16) VREF (V) D97IN636A Tj=25˚C Pin 16 Figure 14. Reference voltage vs. reference input current VREF (V) 5.15 5.2 5.1 5.1 D97IN638 Vcc=40V Vcc=10V 5.0 5.05 Tj=25˚C 4.9 5.0 0 10 20 30 40 Figure 15. Inhibit current vs. inhibit voltage (pin 10) Iinh (μA) D97IN651 Vcc=35V Pin 10 0 50 VCC(V) 10 20 30 40 50 IREF(mA) Figure 16. Line regulation (see Figure 7) VO (V) D97IN639A Tj=0˚C 5.12 100 Tj=125˚C ˚C 5 =2 Tj Tj=25˚C 5.1 50 Tj=125˚C 5.08 0 5.06 -50 0 14/28 IO = 1A 5 10 15 Vinh(V) 0 10 20 30 40 50 VCC(V) L4973 Typical characteristics Figure 17. Load regulation (see Figure 7) VO (V) Figure 18. Line regulation (see Figure 8) D97IN640 VO (V) D97IN660A 3.35 VCC = 35V 5.15 Tj=125˚C 3.34 Tj=125˚C Tj=25˚C 3.33 5.1 Tj=25˚C 3.32 5.05 IO = 1A 3.31 3.3 5.0 0 1 2 3 Figure 19. Load regulation (see Figure 4) VO (V) 0 IO(A) 10 20 30 40 50 VCC(V) Figure 20. Switching frequency vs. R2 and C7 (Figure 4) D97IN661 fsw (KHz) D97IN630 500 VCC = 35V 3.35 Tamb=25˚C 0.8 2nF 200 3.34 1.2 Tj=125˚C nF 100 2.2 3.33 nF 50 3.3n F Tj=25˚C 3.32 4.7n F 20 5.6n F 3.31 10 5 3.3 0 1 2 3 IO(A) 0 20 40 60 80 R2(KΩ) 15/28 Typical characteristics L4973 Figure 21. Switching frequency vs. input voltage fsw (KHz) D97IN631 Figure 22. Switching frequency vs. junction temperature (see Figure 4) fsw (KHz) D97IN632 Tamb=25˚C 105 105 100 100 95 95 90 90 0 10 20 30 40 -50 50 VCC(V) 0 50 100 Tj(˚C) Figure 23. Dropout voltage between pin Figure 24. Efficiency vs. output voltage 7,8 and 2,3 (see Figure 6) ΔV (V) D97IN643 D97IN641 98 Tj=125˚C 0.6 η (%) 100KHz C 5˚ =2 Tj 96 94 200KHz 0.4 92 Tj=0˚C 90 0.2 IO = 3A VCC = 50V 88 86 0 0 16/28 1 2 3 IO(A) 0 10 20 30 40 VO(V) L4973 Typical characteristics Figure 25. Dropout voltage between pin Figure 26. Efficiency vs. output voltage 7,8 and 2,3 (see Figure 4) ΔV (V) D97IN643 D97IN641 98 Tj=125˚C 0.6 η (%) 100KHz C 5˚ 96 =2 Tj 94 200KHz 0.4 92 Tj=0˚C 90 0.2 IO = 3A VCC = 50V 88 86 0 0 1 2 3 0 IO(A) Figure 27. Efficiency vs. output voltage (Diode STPS745D) η (%) D97IN642 10 20 30 40 VO(V) Figure 28. Efficiency vs. output current (see Figure 7) η (%) D97IN645 98 VO = 5.1V fsw = 100KHz 100KHz 95 96 Vcc=12V 94 200KHz 90 92 Vcc=24V 90 Vcc=48V 85 IO = 3A VCC = 35V 88 86 80 0 5 10 15 20 25 30 VO(V) 0 1 2 3 IO(A) 17/28 Typical characteristics L4973 Figure 29. Efficiency vs. output current (see Figure 7) η (%) D97IN646 Figure 30. Efficiency vs. output current (see Figure 8) η (%) D97IN644 VO = 3.3V fsw = 100KHz Vcc=12V 90 90 Vcc=12V Vcc=24V 85 85 Vcc=24V Vcc=48V 80 80 VO = 5.1V fsw = 200KHz Vcc=48V 75 75 0 1 2 3 Figure 31. Efficiency vs. output current (see Figure 8) η (%) D97IN662 VO = 3.3V fsw = 200KHz 90 0 IO(A) Vcc=12V 1 2 3 IO(A) Figure 32. Power dissipation vs. input voltage (device only) (see Figure 7) Pdiss (W) D97IN647A VO = 5.1V fsw = 100KHz 1.5 IO=3.5A 85 Vcc=24V IO=3A 1.0 80 IO=2.5A Vcc=48V 0.5 75 0 70 0 18/28 IO=2A 0.5 1 1.5 2 2.5 3 3.5 IO(A) 0 10 20 30 40 50 Vcc(V) L4973 Typical characteristics Figure 33. Power dissipation vs. output Figure 34. Pulse by pulse limiting voltage (device only) current vs. junction temperature Pdiss (W) Ilim (A) D97IN648 3.0 VCC = 35V fsw = 100KHz D97IN652 5.2 IO=3.5A 2.5 5 2.0 IO=3A 1.5 IO=2.5A 4.8 Vcc=35 4.6 1.0 IO=2A 0.5 IO=1A 4.4 4.2 -40 -20 0 0 0 5 10 15 20 25 30 VO(V) Figure 35. Load transient IO (A) VCC (V) D97IN649 30 2 20 D97IN650 10 T VO (mV) 2 VO (mV) 1 200μs/DIV IO = 1A fsw = 100KHz 100 1 Tj(˚C) Figure 36. Line transient 3 1 20 40 60 80 100 120 T 0 VCC = 35V fsw = 100KHz -100 2 100 0 -100 1ms/DIV 19/28 Typical characteristics L4973 Figure 37. Source current rise and fall time, pin 2, 3 (see Figure 4) Figure 38. Soft-start capacitor selection vs. inductor and VCC max (ref. AN938) Lomax (μH) D97IN653 Css=1μF Css=820nF 300 fsw = 100KHz 250 Css=680nF 200 Css=470nF 150 100 Css=220nF Css=100nF 50 0 25 30 35 40 45 50 Vi(V) Figure 39. Soft-start capacitor selection Figure 40. Open loop frequency and vs. inductor and VCC max (ref. phase of error amplifier AN938) Lomax (μH) D97IN663 Phase 56 s= s=6 50 Cs Cs fsw = 200KHz GAIN (dB) nF 8nF D97IN654 GAIN 0 0 -50 45 Cs s= 47 nF 150 100 F n 33 s= Cs 50 Phase 2 s= Cs 135 -150 -200 0 15 20/28 90 -100 F 2n 20 25 30 35 40 45 50 Vi(V) 10 102 103 104 105 106 107 108 f(Hz) L4973 8 Application ideas Application ideas Figure 41. 3.5 A at VO < 3.3 V (see part list Figure 4) VCC R2 7,8 INH SYNC 10 18 9 C7 11 R1 C5 D1 C4 C6 1.5 2K 2K 2 4.7K 3.6K 2.5 7.5K 3.6K 3 5.1K 1K VO=3.36-1.74• R3 R5 Vo 12 R5 C3 4.7K 2,3 4,5,6 13,14,15 16 R3 3.6K L1 L4973V3.3 17 C2 R5 1 C8 1 C1 VP R3 3x C0 D97IN666A Figure 42. 12 V to 3.3 V high performance buck converter (fsw = 200 kHz) VCC 12V±5% R2 22k 7,8 INH SYNC 10 18 16 C2 220nF C3 33nF L4973V3.3 17 C7 1.2nF C1 560uF-25V HFQ Panasonic C4 1uF C5 220pF 4,5,6 13,14,15 11 R1 9k1 C6 22nF η (%) C8 220nF 9 1 92 L1 2,3 90 12 Vo=3.33V Io=3.5A D1 C9 470uF-25V HFQ Panasonic 88 86 84 82 L1 D1 KoolMm 77120- 24 Turns- 0.9mm STPS1025 D97IN668A 80 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 Io(A) 21/28 Application ideas L4973 Figure 43. Synchronization example VCC2 VCC1 7,8 7,8 1 VCC L4973 18 18 4,5,6 13,14,15 L4973 7,8 1 1 18 7,8 L4973 L4973 4,5,6 13,14,15 4,5,6 13,14,15 18 4,5,6 13,14,15 1 D97IN669 Figure 44. Multi output not isolated (pin out referred to DIP12+3+3) VCC INH SYNC 10 18 7,8 Vo2 D2 C8 R2 9 1 C1 C2 C7 C3 C4 C5 17 L4973 16 4,5,6 13,14,15 11 R1 C6 VO2 = VO1 n1 + n2 n1 PO2 < 20% PO1 22/28 D97IN667A n2 12 2,3 L1 Vo1 n1 D1 C9 C10 C11 L4973 9 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 23/28 Package mechanical data Table 8. L4973 DIP-18 mechanical data mm. inch Dim. Min a1 0.51 B 0.85 b b1 Typ Min Typ Max 0.020 1.40 0.033 0.50 0.38 0.055 0.020 0.50 D 0.015 0.020 24.80 0.976 E 8.80 0.346 e 2.54 0.100 e3 20.32 0.800 F 7.10 0.280 I 5.10 0.201 L 3.30 Z Figure 45. Package dimensions 24/28 Max 0.130 2.54 0.100 L4973 Package mechanical data Table 9. SO-20 mechanical data mm. inch Dim. Min Typ Max Min Typ Max A 2.35 2.65 0.093 0.104 A1 0.10 0.30 0.004 0.012 B 0.33 0.51 0.013 0.200 C 0.23 0.32 0.009 0.013 D (1) 12.60 13.00 0.496 0.512 E 7.40 7.60 0.291 0.299 e 1.27 0.050 H 10.0 10.65 0.394 0.419 h 0.25 0.75 0.010 0.030 L 0.40 1.27 0.016 0.050 k ddd 0° (min.), 8° (max.) 0.10 0.004 Figure 46. Package dimensions 25/28 Order code 10 L4973 Order code Table 10. 26/28 Order code Part number Package Packaging L4973D3.3, E-L4973D3.3 SO-20 Tube L4973D3.3-013TR, E-L4973D3.3-TR SO-20 Tape and reel L4973D5.1 SO-20 Tube L4973D5.1-013TR SO-20 Tape and reel L4973V3.3, E-L4973V3.3 DIP-18 Tube L4973V5.1, E-L4973V5.1 DIP-18 Tube L4973 11 Revision history Revision history Table 11. Document revision history Date Revision Changes 12-Sep-2001 13 First Issue 07-May-2005 14 Updated the Layout look & feel. Changed name of the D1 on the fig. 5. 14-Dec-2005 15 Added the ECOPACK part numbers in the Table 1. Order Codes. 06-Dec-2006 16 The document has been reformatted, and order codes updated 07-May-2007 17 New data on Table 4 26-Feb-2009 18 Updated Section 5: Evaluation board on page 9 27/28 L4973 Please Read Carefully: Information in this document is provided solely in connection with ST products. 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