AN3028
Application note
EVLVIP16L-4WFN: 16 V / 4.5 W, 60 kHz non-isolated flyback
demonstration board using the VIPer16LN
Introduction
This document describes a 16 V - 280 mA power supply set in non-isolated flyback topology
with the VIPer16LN, a new offline high-voltage converter by STMicroelectronics.
The features of the device include an 800 V avalanche rugged power section, PWM
operation at 60 kHz with frequency jittering for lower EMI, current limiting with adjustable
setpoint, on-board soft-start, and safe auto-restart after a fault condition.
Moreover, the VIPer16LN can work with or without the auxiliary winding. Operating with the
auxiliary winding, it can attain very low standby consumption. Operating without the auxiliary
winding, the IC is supplied by an internal current generator, thus saving the cost of the
transformer’s auxiliary winding. Both possibilities are discussed in this application note.
The protections available include a thermal shutdown with hysteresis, delayed overload
protection, and open-loop failure protection (available only if the auxiliary winding is used).
Figure 1.
August 2011
EVLVIP16L- 4WFN demonstration board
Doc ID 16135 Rev 1
1/37
www.st.com
Contents
AN3028
Contents
1
Adapter features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2
Circuit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
Transformer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4
Testing the board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.1
Typical waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5
Line-load regulation and output voltage ripple . . . . . . . . . . . . . . . . . . 12
6
Burst mode and output voltage ripple . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7
8
6.1
Efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
6.2
Light-load performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
IC features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7.1
Soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7.2
Overload protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Guidelines for feedback loop calculation . . . . . . . . . . . . . . . . . . . . . . . 25
8.1
Transfer function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
8.2
Compensation procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
9
Thermal measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
10
EMI measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
11
Board layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
12
Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Appendix A Test equipment and measurement of efficiency and low-load
performance32
A.1
2/37
Measuring input power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Doc ID 16135 Rev 1
AN3028
Contents
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Doc ID 16135 Rev 1
3/37
List of figures
AN3028
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
4/37
EVLVIP16L- 4WFN demonstration board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
VDD waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Transformer size and pin diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Transformer size . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Drain current and voltage at max load 115 Vac . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Drain current and voltage at max load 230 Vac . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Drain current and voltage at max load 90 Vac . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Drain current and voltage at max load 265 Vac . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Line regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Load regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Output voltage ripple 115VINAC full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Output voltage ripple 230VINAC full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Output voltage ripple at 115 VINAC no load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Output voltage ripple at 230 VINAC no load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Output voltage ripple at 115VINAC 25 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Output voltage ripple at 230VINAC 25 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Efficiency vs. VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Efficiency vs. load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Active mode efficiency vs. VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Input voltage averaged efficiency vs. load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
ENERGY STAR® efficiency criteria . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
PIN vs. VIN at POUT = 0; 25 mW; 50 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
POUT at PIN = 1 W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Output short applied and OLP in steady-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
OLP in steady-state and output short removed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Control loop block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Thermal measurements at 115Vac, no self-supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Thermal measurements at 115Vac, self-supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Quasi-peak measurement at 230Vac, full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Average measurement at 230Vac, full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Bottom layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Connections of the UUT to the wattmeter for power measurements . . . . . . . . . . . . . . . . . 33
Switch in position 1 - setting for standby measurements . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Switch in position 2 - setting for efficiency measurements . . . . . . . . . . . . . . . . . . . . . . . . . 34
Doc ID 16135 Rev 1
AN3028
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Electrical specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Bill of material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Transformer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Output voltage line-load regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Output voltage ripple at half and full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Output voltage ripple at no load and light load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Active mode efficiencies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Line voltage averaged efficiency vs. load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Energy efficiency criteria for standard models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Energy efficiency criteria for low-voltage models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
No-load input power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Energy consumption criteria for no load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Low-load performance, POUT = 25 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Low-load performance, POUT = 50 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
POUT at PIN = 1 W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Temperature of key components at 115 Vac full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Doc ID 16135 Rev 1
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Adapter features
1
AN3028
Adapter features
The electrical specifications of the demonstration board are listed in Table 1.
Table 1.
Electrical specifications
Symbol
VIN
Input voltage range
Value
[90VRMS; 265VRMS]
VOUT
Output voltage
IOUT
Max output current
0.28 A
ΔVOUT_LF Precision of output regulation
±5%
16 V
ΔVOUT_HF High-frequency output voltage ripple
50 mV
Max ambient operating temperature
60 ºC
TA
6/37
Parameter
Doc ID 16135 Rev 1
AN3028
2
Circuit description
Circuit description
The power supply is set in flyback topology. The schematic is given in Figure 2, the bill of
materials in Table 2. The input section includes a resistor R1 for inrush current limiting, a
diode bridge (D0) and a Pi filter for EMC suppression (C1, L1, C2). The transformer core is
a standard E16. A transil clamp network (D1, D4) is used for leakage inductance
demagnetization.
The output voltage value is set simply through the R5-R6 voltage divider between the output
terminal and the FB pin, according to the following formula:
Equation 1
⎛ R6 ⎞
VOUT = 3.3V ⋅ ⎜1+
⎟
⎝ R5 ⎠
The FB pin is the inverting input of an error amplifier whose non-inverting input is an
accurate 3.3 V voltage reference. In the schematic the resistor R5 has been split into R5a
and R5b in order to allow better tuning of the output voltage value. The compensation
network is connected between the COMP pin (which is the output of the error amplifier) and
the GND pin and is made up of C7, C8 and R7.
The output rectifier D3 has been selected according to the calculated maximum reverse
voltage, forward voltage drop and power dissipation and is a power Schottky.
The LIM pin has been left open, thus the current limitation is set to the default value, IDLIM. If
a lower current limitation is required, a resistor of an appropriate value should be connected
between the LIM and GND pins, according to the IDLIM vs. RLIM graphic shown in the
VIPer16LN datasheet.
A small LC filter has been added at the output in order to filter the high-frequency ripple
without increasing the size of the output capacitors and a 100 nF capacitor has been placed
very close to the output connector solder points in order to limit the spike amplitude.
At power-up the DRAIN pin supplies the internal HV startup current generator which
charges the C3 capacitor up to VDDon. At this point the power MOSFET starts switching, the
generator is turned off, and the IC is powered by the energy stored in C3.
If both the jumpers J and J1 are left open, the VIPer16LN is self-supplied through the
internal high-voltage startup current generator, which is turned on as the VDD voltage falls
down to VDDcs_on and is switched off as it reaches VDDon.
If the jumper J is selected, the IC is supplied by the auxiliary winding, through D2 and R3. In
this case the VDD voltage increases with the load on the regulated output. In order to avoid
exceeding the VDD operating range, an external clamp (Dz, Rz) has been added.
If the jumper J2 is selected, the VIPer16LN is supplied from the output through D6. In
Figure 3 the VDD waveforms for both cases (self-supply and supply from the output) are
shown. It is worth noting that in the latter case the self-supply is excluded by keeping the
VDD voltage always above the VDDcs_on value. This is achievable only if the output voltage is
high enough, thus the minimum value which allows this setting to be used is VOUT ≥
VDDcs_on + Vy6 ≈ 12 V. If the value of VOUT is lower, the self-supply can be excluded only
through the auxiliary winding.
Doc ID 16135 Rev 1
7/37
Circuit description
AN3028
Application schematic
Figure 2.
!#) .
$
,
4
2
#
$
#
#
$
$
,
6/54
#
#
#
$
2
$
*
*
#/-0
,)-
6)0%2,.
$2!).
6$$
#
#/.42/,
2
#
'.$
&"
2
2
2
#
$
#
#
2A
2B
!-V
Table 2.
Reference
Bill of material
Part
C1, C2
C3
C4, C11
8/37
Manufacturer
4.7 µF, 400 V NHG serie electrolytic capacitor
Panasonic
10 µF, 35 V GA serie electrolytic capacitor
Panasonic
100 nF, 50 V RPER7 serie ceramic capacitor
C5
C6
Description
150 pF, 100 V 682 serie ceramic capacitor
Murata
AVX
Not mounted
C7
4.7 nF, 50 V B3798x serie ceramic capacitor
EPCOS
C8
150 nF, 50 V B3798x serie ceramic capacitor
EPCOS
C9
470 µF, 25 V ZL serie ultra-low ESR electrolytic
capacitor
Rubycon
C10
100 µF, 25 V VR serie electrolytic capacitor
Nichicon
D0
DF06M
D1
STTH1L06
D2
BAT46
600 V 1 A diode bridge
Vishay
Clamp diode
STMicroelectronics
Small signal diode
STMicroelectronics
Doc ID 16135 Rev 1
AN3028
Circuit description
Table 2.
Bill of material (continued)
Reference
Part
D3
STPS2H100
D4
Manufacturer
Output diode 2 A, 100 V
STMicroelectronics
P6KE300A
Transil
STMicroelectronics
D5
BZX79-C18
18 V Zener diode
D6
Not mounted
Small signal diode (1N4148)
R1
4.7 Ω 3/4 W resistor
R3
15 Ω 1/4W resistor
R4
NXP
Not mounted
R5a
10 kΩ 1% 1/4W resistor
R5b
2.2 kΩ 1% 1/4W resistor
R6
47 kΩ 1% 1/4W resistor
R7
33 kΩ 1/4W resistor
R8
68 kΩ1/4W resistor
L2
RFB0807-2R2L 2.2 µH power inductor
J,J2
Figure 3.
Description
Coilcraft
jumpers
T1
1335.0062
IC
VIPer16LN
Transformer
MAGNETICA
STMicroelectronics
VDD waveforms
a) without self-supply (J2 selected)
b) with self-supply (J and J2 not selected)
Doc ID 16135 Rev 1
9/37
Transformer
3
AN3028
Transformer
The characteristics of the transformer are listed in the table below
Table 3.
Transformer characteristics
Parameter
Test conditions
Manufacturer
MAGNETICA
Part number
1335.0062
Primary inductance
Measured at 1 kHz 0.1 V
1.2 mH ±15%
Leakage inductance
Measured at 10 kHz 0.1 V
2.9%
Primary to secondary turn ratio (4 - 5)/(7, 8)
Measured at 10 kHz 0.1 V
7.85 ±5%
Primary to auxiliary turn ratio (4 - 5)/(1 - 2)
Measured at 10 kHz 0.1 V
7.33 ±5%
The figures below show the size and pin distances (mm) of the transformer.
Figure 4.
Transformer size and pin diagram
(a) Pin distances
Figure 5.
(b) Electrical diagram
Transformer size
(a) Side view
10/37
Value
(b) Terminal view
Doc ID 16135 Rev 1
AN3028
Testing the board
4
Testing the board
4.1
Typical waveforms
Drain voltage and current waveforms in full-load condition are shown for the two nominal
input voltages in Figure 6 and 7, and for minimum and maximum input voltage in Figure 8
and 9 respectively.
Figure 6.
Drain current and voltage at max
load 115 Vac
Figure 7.
Drain current and voltage at max
load 230 Vac
Figure 8.
Drain current and voltage at max
load 90 Vac
Figure 9.
Drain current and voltage at max
load 265 Vac
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Line-load regulation and output voltage ripple
5
AN3028
Line-load regulation and output voltage ripple
The output voltage of the board has been measured in different line and load conditions.
The results are shown in Table 4. The output voltage is practically not affected by the line
condition and by the IC biasing (self-supply or not).
Table 4.
Output voltage line-load regulation
Vout
No load
VINAC
(V)
50% load
75% load
100% load
With
With
With
With
Without
Without
Without
Without
self-supply self-supply self-supply self-supply self-supply self-supply self-supply self-supply
90
15.91
15.91
15.72
15.73
15.74
15.75
15.76
15.76
115
15.91
15.92
15.71
15.71
15.72
15.73
15.74
15.73
150
15.91
15.92
15.70
15.70
15.72
15.71
15.72
15.71
180
15.91
15.92
15.69
15.69
15.71
15.70
15.69
15.67
230
15.91
15.92
15.69
15.69
15.67
15.67
15.66
15.65
265
15.91
15.92
15.69
15.69
15.69
15.66
15.65
15.65
Figure 11. Load regulation
6OUT;6=
6OUT;6=
Figure 10. Line regulation
6IN;6=
!-V
)OUT;!=
!-V
The ripple at the switching frequency superimposed at the output voltage has also been
measured and the results are shown in Table 5. The board is provided with an LC filter to
better filter the voltage ripple.
12/37
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Line-load regulation and output voltage ripple
Table 5.
Output voltage ripple at half and full load
VOUT (mV)
VINAC (V)
Half load
Full load
90
40
70
115
32
65
230
32
45
265
32
40
Figure 12. Output voltage ripple 115VINAC full Figure 13. Output voltage ripple 230VINAC full
load
load
Doc ID 16135 Rev 1
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Burst mode and output voltage ripple
6
AN3028
Burst mode and output voltage ripple
When the converter is lightly loaded, the COMP pin voltage decreases. As it reaches the
shutdown threshold, VCOMPL (1.1 V, typical), the switching is disabled and no more energy is
transferred to the secondary side. So, the output voltage decreases and the regulation loop
makes the COMP pin voltage increase again. As it rises 40mV above the VCOMPL threshold,
the normal switching operation is resumed. This results in a controlled on/off operation
(referred to as “burst mode) as long as the output power is low enough to require a turn-on
time lower than the minimum turn-on time of the VIPer16LN. This mode of operation keeps
the frequency-related losses low when the load is very light or disconnected, making it
easier to comply with energy-saving regulations.
The figures below show the output voltage ripple when the converter is not loaded or lightly
loaded and supplied with 115 VAC and with 230 VAC respectively.
Figure 14. Output voltage ripple at 115 VINAC
no load
Figure 15. Output voltage ripple at 230 VINAC
no load
Figure 16. Output voltage ripple at 115VINAC
25 mA
Figure 17. Output voltage ripple at 230VINAC
25 mA
Table 6 shows the measured value of the burst mode frequency ripple measured in different
operating conditions. The output voltage ripple in burst mode operation is very low.
14/37
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Burst mode and output voltage ripple
Table 6.
Output voltage ripple at no load and light load
VOUT (mV)
VINAC (V)
6.1
No load
25 mA load
90
2
7
115
2
7
230
4
8
265
4
9
Efficiency
The efficiency of the converter has been measured in different load and line voltage
conditions, both with and without the self-supply function.
According to the ENERGY STAR® average active mode testing efficiency method, the
efficiency measurements have been done at full load and at 75%, 50% and 25% of full load
for different input voltages. The results are given in Table 7.
Table 7.
Efficiency
Efficiency (%)
VINAC
(V)
Full load
75% load
50% load
25% load
With
Without
With
Without
selfsupply
Without
selfsupply
With
selfsupply
selfsupply
selfsupply
With
selfsupply
Without
selfsupply
selfsupply
90
77.94
75.38
79.83
76.85
81.20
76.22
81.59
72.25
115
80.20
77.31
81.43
77.81
81.15
76.16
81.89
70.63
150
81.59
77.98
81.94
77.31
81.94
74.84
80.63
67.63
180
81.70
77.51
82.11
76.61
81.10
73.22
78.62
64.68
230
81.32
76.14
81.06
74.58
79.80
70.18
74.82
59.82
265
80.81
74.94
79.95
72.89
78.50
67.96
72.07
56.32
For better visibility of the results they have also been plotted in the following figures. In
Figure 18 the efficiency versus VIN for the four different load values is plotted. In Figure 19
the efficiency as a function of the load is shown for different values of the input voltage.
Doc ID 16135 Rev 1
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Burst mode and output voltage ripple
AN3028
Figure 18. Efficiency vs. VIN
b) with self-supply (J and J2 not selected)
HII>@
EFF;=
a) without self-supply (J2 selected)
6IN;6AC=
9LQ>9DF@
!-V
!-V
Figure 19. Efficiency vs. load
b) with self-supply (J and J2 not selected)
HII>@
HII>@
a) without self-supply (J2 selected)
,RXW>$@
!-V
,RXW>$@
!-V
The active mode efficiency is defined as the average of the efficiencies measured at 25%,
50%, 75% and 100% of maximum load. Table 8 gives the active mode efficiency calculated
from the values in Table 7. For clarity the values from Table 8 are plotted in Figure 20.
16/37
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Burst mode and output voltage ripple
Table 8.
Active mode efficiencies
Active mode efficiency (%)
VINAC (VRMS)
Without self-supply
With self-supply
90
79.72
75.18
115
80.75
75.48
150
81.09
74.44
180
80.46
73.00
230
78.83
70.18
265
77.42
68.03
Figure 20. Active mode efficiency vs. VIN
b) with self-supply (J and J2 not selected)
HII>@
HII>@
a) without self-supply (J2 selected)
9LQ>9@
!-V
9LQ>9@
!-V
In Table 9 and Figure 21 the averaged value of the efficiency versus load is given (the
average has been done considering the efficiency at different values of the input voltage).
Table 9.
Line voltage averaged efficiency vs. load
Efficiency (%)
Load (% of full load)
Without self-supply
With self-supply
100
79.43
75.94
75
80.57
75.53
50
79.12
72.63
25
77.59
64.76
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Burst mode and output voltage ripple
AN3028
Figure 21. Input voltage averaged efficiency vs. load
b) with self-supply (J and J2 not selected)
HII>@
HII>@
a) without self-supply (J2 selected)
,RXW>$@
!-V
,RXW>$@
!-V
In the version 2.0 of the ENERGY STAR® program requirement for single voltage external
AC-DC power supplies (see References), the power supplies are divided in two categories:
low-voltage power supplies and standard power supplies with respect to the nameplate
output voltage and current. An external power supply, in order to be considered a lowvoltage power supply, needs to have a nameplate output voltage lower than 6 V and a
nameplate output current greater than or equal to 550 mA.
The tables below show the EPA energy efficiency criteria for AC-DC power supplies in active
mode for standard models and for low voltage models respectively.
Table 10.
Energy efficiency criteria for standard models
Nameplate output power
Minimum average efficiency in active mode
(Pno)
(expressed as a decimal)
0 to = 1 watt
= 0.48*Pno+0.140
> 1 to = 49 watts
= [0.0626 * In (Pno)] + 0.622
> 49 watts
= 0.870
Table 11.
Energy efficiency criteria for low-voltage models
Nameplate output power
Minimum average efficiency in active mode
(Pno)
(expressed as a decimal)
0 to = 1 watt
= 0.497 *Pno+0.067
> 1 to = 49 watts
= [0.075 * In (Pno)] + 0.561
> 49 watts
= 0.860
The criteria are plotted in Figure 22, where the red line is the criteria for the standard model
and the blue line is the criteria for the low-voltage model. The PNO axe is in logarithmic
scale.
18/37
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Burst mode and output voltage ripple
Figure 22. ENERGY STAR® efficiency criteria
The power supply presented is from a standard model and, in order to be compliant with the
ENERGY STAR® requirements, needs to have efficiency higher than 71.6%. If the selfsupply is excluded, the efficiency results (seeTable 9) are higher than the recommended
value within the whole input voltage range.
6.2
Light-load performance
The input power of the converter has been measured in no-load condition for different input
voltages and the results are given in Table 12.
Table 12.
No-load input power
PIN (mW)
VIN_AC (VRMS)
Without
With
self-supply
self-supply
90
21
88
115
22
110
150
25
146
180
26
175
230
29
224
265
32
258
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Burst mode and output voltage ripple
AN3028
In version 2.0 of the ENERGY STAR® program the power consumption of the power supply
when it is not loaded is also considered. The criteria for compliance are given in the table
below:
Table 13.
Energy consumption criteria for no load
Nameplate output power (Pno)
Maximum power in no load for AC-DC EPS
0 to = 50 watt
< 0.3 watts
> 50 watts < 250 watts
< 0.5 watts
The performance of the presented board (when the self-supply function is not used) is much
better than required, the power consumption is about ten times lower than the ENERGY
STAR® limit. Even if the performance seems to be disproportionally better than the
requirements, it is worth noting that often the AC-DC adapter or battery charger
manufacturers have very strict requirements about no-load consumption and when the
converter is used as an auxiliary power supply, the line filter is often the main line filter of the
entire power supply that considerably increases standby consumption.
Even if the ENERGY STAR® program does not have other requirements regarding light-load
performance, in order to give complete information we also show the input power and
efficiency of the demonstration board in two other low-load cases. Table 14 and 15 show the
performance when the output load is 25 mW and 50 mW respectively.
Table 14.
Low-load performance, POUT = 25 mW
PIN (mW)
VIN_AC
20/37
POUT (mW)
efficiency (%)
Without
With
Without
With
self-supply
self-supply
self-supply
self-supply
90
25
56.00
124
44.64
20.16
115
25
58.46
149
42.76
16.78
150
25
62.23
185
40.17
13.51
180
25
62.77
213
39.83
11.72
230
25
65.63
262
38.09
9.56
265
25
67.51
296
37.03
8.44
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Burst mode and output voltage ripple
Table 15.
Low-load performance, POUT = 50 mW
PIN (mW)
VIN_AC
POUT (mW)
efficiency (%)
Without
With
Without
With
self-supply
self-supply
self-supply
self-supply
90
50
91
161
54.55
31.09
115
50
94
187
52.98
26.74
150
50
100
224
50.00
22.30
180
50
100
252
50.00
19.84
230
50
102
300
48.88
16.67
265
50
105
335
47.62
14.95
The input power vs. input voltage for no-load and low-load condition (Table 12, 14 and 15)
are shown in the figures below.
Figure 23. PIN vs. VIN at POUT = 0; 25 mW; 50 mW
a) without self-supply (J2 selected)
b) with self-supply (J and J2 not selected)
P:
3LQ>P:@
3LQ>P:@
P:
9LQ>9@
P:
P:
!-V
9LQ>9@
!-V
Depending on the equipment supplied, we can have several criteria to measure the standby
or light-load performance of a converter. One criterion is the measure of the output power
when the input power is equal to one watt. In Table 16 the output power needed to have 1 W
of input power in different line conditions is given. Figure 24 shows the output power
corresponding to PIN = 1 W for different values of the input voltage.
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Burst mode and output voltage ripple
Table 16.
AN3028
POUT at PIN = 1 W
POUT (W)
VIN_AC
PIN (W)
efficiency (%)
Without
With
Without
With
self-supply
self-supply
self-supply
self-supply
90
1
0.786
0,629
78.66
62,88
115
1
0.786
0,613
78.56
61,27
150
1
0.722
0,566
72,27
56,52
180
1
0.722
0,471
72,27
47,10
230
1
0.675
0,464
67,51
46,40
265
1
0.677
0,410
67,68
41,03
Figure 24. POUT at PIN = 1 W
b) with self-supply (J and J2 not selected)
HII>@
HII>@
a) without self-supply (J2 selected)
22/37
9LQ>9@
!-V
Doc ID 16135 Rev 1
9LQ>9@
!-V
AN3028
IC features
7
IC features
7.1
Soft-start
At startup the current limitation value reaches IDLIM after an internally set time, tSS, whose
typical value is 8.5 msec. This time is divided into 16 time intervals, each corresponding to a
current limitation step progressively increasing. In this way the drain current is limited during
the output voltage increase, thus reducing the stress on the secondary diode.
The soft-start phase is shown in Figure 25.
Figure 25. Soft-start
a) soft-start at startup
7.2
b) soft-start at startup (zoom)
Overload protection
In case of overload or short-circuit (see Figure 26 a), the drain current reaches the IDLIM
value (or the one set by the user through the RLIM resistor). Every cycle that this condition is
met, a counter is incremented. If it is maintained continuously for the time tOVL (50 msec
typical, set internally), the overload protection is tripped, the power section is turned off, and
the converter is disabled for a tRESTART time (1 sec typical). After this time has elapsed, the
IC resumes switching and, if the short is still present, the protection occurs indefinitely in the
same way (Figure 26 b). This ensures restart attempts of the converter with low repetition
rate, so that it works safely with extremely low-power throughput and avoids overheating the
IC in case of repeated overload events.
Moreover, every time the protection is tripped, the internal soft-start function is invoked
(Figure 27a), in order to reduce the stress on the secondary diode.
After the short removal, the IC resumes working normally. If the short is removed during tSS
or tOVL, i.e. before the protection tripping, the counter is decremented on a cycle-by-cycle
basis down to zero and the protection is not tripped.
If the short-circuit is removed during tRESTART, the IC waits for the tRESTART period to elapse
before resuming switching (Figure 27b).
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IC features
AN3028
Figure 26. Output short applied and OLP in steady-state
a) short-circuit applied: OLP tripping
b) short-circuit maintained: OLP auto-restart and
tRESTART
Output is shorted here
Normal
operation
tRESTART
Figure 27. OLP in steady-state and output short removed
a) short-circuit maintained: soft-start and tOVL
tSS
b) short-circuit removed: OLP auto-restart
tOVL
tRESTART
Output short is
removed here
24/37
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Normal
operation
AN3028
Guidelines for feedback loop calculation
8
Guidelines for feedback loop calculation
8.1
Transfer function
The set PWM modulator + power stage is referred to as the “power plant” and is indicated by
G1(f), while C(f) is the “controller”, i.e. the network which is in charge of ensuring the stability
of the system.
Figure 28. Control loop block diagram
The mathematical expression of the power plant G1(f) is the following:
Equation 2
ΔVO
G 1(f) =
=
ΔIpk
j⋅2⋅π⋅f
j⋅f
)
Vo ⋅ (1 +
)
z
fz
=
j⋅2⋅π⋅f
j⋅f
Ipkp(fsw, Vdc) ⋅ (1 +
) Ipkp(fsw, Vdc) ⋅ (1 +
)
p
fp
Vo ⋅ (1 +
where fp is the pole due to the output load and fz the zero due to the ESR of the output
capacitor:
Equation 3
fp =
1
π ⋅ COUT ·(ROUT + 2ESR)
Equation 4
fz =
1
2 ⋅ π ⋅ COUT ·ESR
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Guidelines for feedback loop calculation
AN3028
The mathematical expression of the compensator C(f) is:
Equation 5
f⋅j
fZc
C(f ) =
=
⋅
f⋅j ⎞
ΔVo HCOMP
⎛
2 ⋅ π ⋅ f ⋅ j ⋅ ⎜1 +
⎟
fPc ⎠
⎝
ΔIpk
1+
C0
where:
Equation 6
Co = −
Gm
R5
⋅
C7 + C8 R5 + R6
Equation 7
fZc =
1
2 ⋅ π ⋅ R7 ⋅ C8
Equation 8
fPc =
C7 + C8
2 ⋅ π ⋅ R7 ⋅ C7 ⋅ C8
are chosen in order to ensure the stability of the overall system.
Gm = 2 mA/V (typical) is the VIPer16LN transconductance.
8.2
Compensation procedure
The first step is to choose the pole and zero of the compensator and the crossing frequency,
for instance:
fZc = fp/2
fPc = fz
fcross = 4kHz = fsw/10
G1(cross) can be calculated from Equation 2 and since by definition it is
|C(fcross)*G1(fcross)|= 1, C0 can be calculated as follows:
Equation 9
2 ⋅ π ⋅ fcross ⋅ j ⋅ 1 +
C0 =
1+
fcross ⋅ j
fPc
fcross ⋅ j
fZc
⋅
HID
G1(fcross)
At this point the Bode diagram of G1(f)*C(f) can be plotted in order to check the phase
margin for the stability.
26/37
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Guidelines for feedback loop calculation
If the margin is not high enough, another choice should be done for fZc, fPc and fcross, and
the procedure repeated.
When the stability is ensured, the next step is to find the values of the schematic
components, which can be calculated using the formulas below, as follows:
Equation 10
R5 =
R6
Vout
−1
3 .3
Equation 11
C7 =
fZc Gm
R5
⋅
⋅
fPc C0 R5 + R6
Equation 12
⎛ fPc ⎞
C8 = C7 ⋅ ⎜
− 1⎟
⎝ fZc
⎠
Equation 13
R7 =
C7 + C8
2 ⋅ π ⋅ fPc ⋅ C7 ⋅ C8
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Thermal measurements
9
AN3028
Thermal measurements
A thermal analysis of the board has been performed using an IR camera for the 115 VAC
mains input, full-load condition, both with and without the self-supply function. The results
are shown in Figure 29 and 30 and summarized inTable 17.
It is worth noting that when the self-supply function is used, the VIPer16LN temperature is
higher, due to the power dissipated by the HV startup generator.
Figure 29. Thermal measurements at 115Vac,
no self-supply
Figure 30.
Thermal measurements at 115Vac,
self-supply
74.7
°C
53.0°C
A
25.6°C
A
62.2
62.2
24.4°C
56.0
B
44.8°C
D
74.7
°C
68.5
63.5°C
68.5
B
D
56.0
45.0°C
49.7
49.7
41.7°C
43.4
42.5°C C
Table 17.
43.4
C
37.2
37.2
30.9
30.9
24.6
24.6
Temperature of key components at 115 Vac full load
Temperature [°C]
Point
28/37
Reference
Without self-supply
With self-supply
A
44.8
45.8
Transformer
B
42.5
41.7
Output diode
C
53.0
63.5
VIPer16LN
D
25.6
24.4
Ambient temperature
Doc ID 16135 Rev 1
AN3028
10
EMI measurements
EMI measurements
Pre-compliance tests to EN55022 (Class B) European normative have been performed
using an EMC analyzer and an LISN.
The quasi-peak and average EMC measurements at 230 Vac full load have been performed
and the results are shown in Figure 31 and Figure 32 respectively.
Figure 31. Quasi-peak measurement at 230Vac, full load
Figure 32. Average measurement at 230Vac, full load
TBD
Doc ID 16135 Rev 1
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Board layout
11
AN3028
Board layout
Figure 33. Bottom layer
30/37
Doc ID 16135 Rev 1
AN3028
12
Conclusions
Conclusions
The VIPer16LN allows a simple design of a non-isolated converter with few external
components. In this document a non-isolated flyback has been described and
characterized. Special attention has been given to low-load performance and the bench
results were good with very low input power in light-load condition. The efficiency has been
compared to the requirements of the ENERGY STAR® program (version 2.0) for an external
AC/DC adapter with very good results in that the measured active mode efficiency is always
higher with respect to the minimum required.
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Test equipment and measurement of efficiency and low-load performance
Appendix A
AN3028
Test equipment and measurement of
efficiency and low-load performance
The converter input power has been measured using a wattmeter. The wattmeter measures
simultaneously the converter input current (using its internal ammeter) and voltage (using its
internal voltmeter). The wattmeter is a digital instrument so it samples the current and
voltage and converts them to digital forms. The digital samples are then multiplied giving the
instantaneous measured power. The sampling frequency is in the range of 20 kHz (or higher
depending on the instrument used). The display provides the average measured power,
averaging the instantaneous measured power in a short period of time (1 sec typ.).
Figure 34 shows how the wattmeter is connected to the UUT (Unit Under Test) and to the
AC source and the wattmeter internal block diagram.
An electronic load has been connected to the output of the power converter (UUT), allowing
to set and measure the converter’s load current, while the output voltage has been
measured by a voltmeter. The output power is the product between load current and output
voltage.
The ratio between the output power, calculated as previously stated, and the input power,
measured by the wattmeter, is the converter’s efficiency which has been measured in
different input/output conditions.
A.1
Measuring input power
With reference to Figure 34, the UUT input current causes a voltage drop across the
ammeter’s internal shunt resistance (the ammeter is not ideal as it has an internal
resistance higher than zero) and across the cables connecting the wattmeter to the UUT.
If the switch in Figure 34 is in position 1 (see also the simplified scheme of Figure 35), this
voltage drop causes an input measured voltage higher than the input voltage at the UUT
input that, of course, affects the measured power. The voltage drop is generally negligible if
the UUT input current is low (for example when we are measuring the input power of UUT in
low-load condition). In case of high UUT input current, the voltage drop can be relevant
(compared to the UUT real input voltage). If this is the case, the switch in Figure 34 can be
changed to position 2 (see simplified scheme of Figure 36) where the UUT input voltage is
measured directly at the UUT input terminal and the input current does not affect the
measured input voltage.
The voltage across the voltmeter causes a leakage current inside the voltmeter itself (which
is not an ideal instrument and doesn’t have infinite input resistance). If the switch of
Figure 34 is in position 2 (see simplified scheme of Figure 36), the voltmeter leakage current
is measured by the ammeter together with the UUT input current, causing a measurement
error. The error is negligible if the UUT input current is much higher than the voltmeter
leakage. If the UUT input current is low and not much higher than the voltmeter leakage
current, it is probably better to set the switch of Figure 34 to position 1.
If we are not sure which measurement scheme has the lesser effect on the result, we can try
with both and register the lower input power value.
As noted in IEC 62301, instantaneous measurements are appropriate when power readings
are stable. The UUT shall be operated at 100% of nameplate output current output for at
32/37
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Test equipment and measurement of efficiency and low-load performance
least 30 minutes (warm-up period) immediately prior to conducting efficiency
measurements.
After this warm-up period, the AC input power shall be monitored for a period of 5 minutes to
assess the stability of the UUT. If the power level does not drift by more than 5% from the
maximum value observed, the UUT can be considered stable and the measurements can
be recorded at the end of the 5-minute period.
If AC input power is not stable over a 5-minute period, the average power or accumulated
energy shall be measured over time for both AC input and DC output.
Some wattmeter models allow integrating the measured input power in a time range and
then measuring the energy absorbed by the UUT during the integration time. The average
input power is calculated by dividing by the integration time itself.
Figure 34. Connections of the UUT to the wattmeter for power measurements
Switch
1
WATT METER
2
U.U.T
(Unit Under test)
Voltmeter
AC
SOURCE
+
V
Multiplier
A
X
Ammeter
INPUT
OUTPUT
AVG
DISPLAY
Doc ID 16135 Rev 1
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Test equipment and measurement of efficiency and low-load performance
AN3028
Figure 35. Switch in position 1 - setting for standby measurements
Wattmeter
Ammeter
AC
SOURCE
A
+
~
U.U.T.
AC
INPUT
V
-
UUT
Voltmeter
Figure 36. Switch in position 2 - setting for efficiency measurements
Wattmeter
Ammeter
A
AC
SOURCE
+
~
V
Voltmeter
34/37
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U.U.T.
AC
INPUT
UUT
AN3028
References
References
1.
ENERGY STAR® program requirements for single voltage external AC/DC adapter
(Version 2.0)
2.
VIPer16 datasheet
Doc ID 16135 Rev 1
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Revision history
AN3028
Revision history
Table 18.
36/37
Document revision history
Date
Revision
01-Aug-2011
1
Changes
Initial release
Doc ID 16135 Rev 1
AN3028
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