M74HC390

M 54HC390 M74HC390 DUAL DECADE COUNTER . . . . . . . . HIGH SPEED fMAX = 84 MHz (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE |IOH| = IOL = 4 mA (MIN.) BALANCED PROPAGATION DELAYS tPLH = tPHL WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V PIN AND FUNCTION COMPATIBLE WITH 54/74LS390 B1R (Plastic Package) F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) ORDER CODES : M54HC390F1R M74HC390M1R M74HC390B1R M74HC390C1R PIN CONNECTIONS (top view) DESCRIPTION The M54/74HC390 is a high speed CMOS DUAL DECADE COUNTER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. This dual decade counter contains two independent ripple carry counters. Each counter is composed of a divide-by-two and divide-by-five counter. The divide-by-two and divide-by-five counters can be cascaded to form dual decade, dual biquinary, or various combinations up to a single divide-by-100 counter. Each 4-bit counter is incremented on the high to low transition (negative edge) of the clock input, and each has an independent clear input. When clear is set low all four bits of each counter are set to low. This enables count truncation and allows the implementation of divide-by-N counter configurations. All inputs are equipped with protection circuits against static discharge and transient excess voltage. February 1993 NC = No Internal Con- 1/13 M54/M74HC390 INPUT AND OUTPUT EQUIVALENT CIRCUIT T RUTH TABLE OUTPUTS COUNT 0 1 2 3 4 5 6 7 8 9 QD L L L L L L L L H H INPUTS CLOCK A X X CLOCK B X X CLEAR H L L QA L BCD COUNT * QC L L L L H H H H L L QB L L H H L L H H L L QA L H L H L H L H L H QA L L L L L H H H H H BI-QUINARY ** QD L L L L H L L L L H QC L L H H L L L H H L QB L H L H L L H L H L OUTPUTS QB L QC L QD L BINARY COUNT UP QUINARY COUNT UP Note: * Output QA is connected to input CLOCK B for BCD count. ** Output QD is connected to input CLOCK A for bi-quinary count. 2/13 M54/M74HC390 B LOCK DIAGRAM LOGIC DIAGRAM 3/13 M54/M74HC390 TIMING CHART (1) BCD COUNT SEQUENCE * (2) BI-QUINARY COUNT SEQUENCE ** *OUTPUT QA IS CONNECTED TO INPUT CLOCK B 4/13 M54/M74HC390 P IN DESCRIPTION PIN No 1, 15 SYMBOL 1 CLOCK A 2 CLOCK B 1 CLEAR 2 CLEAR 1QA to 1QD 1 CLOCK B 2 CLOCK B NAME AND FUNCTION Clock Input Divide by 2 Section (HIGH to LOW Edge-triggered) Asynchronous Master Reset Inputs Flip Flop Outputs Clock Input Divide by 5 Section (HIGH to LOW Edge-triggered) Flip Flop Outputs Ground (0V) Positive Supply Voltage IEC LOGIC SYMBOL 2, 14 3, 5, 6, 7 4, 12 13, 11, 10, 9 2QA to 2QD 8 16 GND VCC ABSOLUTE MAXIMUM RATINGS Symbol VCC VI VO IIK IOK IO ICC or IGND PD Tstg TL Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Source Sink Current Per Output Pin DC VCC or Ground Current Power Dissipation Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 ± 20 ± 20 ± 25 ± 50 500 (*) -65 to +150 300 Unit V V V mA mA mA mA mW o o C C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition isnotimplied. (*) 500 mW: ≅ 65 oC derate to 300 mW by 10mW/oC: 65 oC to 85 oC RECOMMENDED OPERATING CONDITIONS Symbol VCC VI VO Top tr, tf Parameter Supply Voltage Input Voltage Output Voltage Operating Temperature: M54HC Series M74HC Series Input Rise and Fall Time VCC = 2 V VCC = 4.5 V VCC = 6 V Value 2 to 6 0 to VCC 0 to VCC -55 to +125 -40 to +85 0 to 1000 0 to 500 0 to 400 Unit V V V o o C C ns 5/13 M54/M74HC390 D C SPECIFICATIONS Test Conditions Symbol Parameter VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 V OH High Level Output Voltage 2.0 4.5 6.0 4.5 VOL Low Level Output Voltage 6.0 2.0 4.5 6.0 4.5 6.0 II ICC Input Leakage Current Quiescent Supply Current 6.0 6.0 VI = IO=-20 µA VIH or V IL IO=-4.0 mA IO=-5.2 mA VI = IO= 20 µA VIH or V IL IO= 4.0 mA IO= 5.2 mA VI = VCC or GND VI = VCC or GND 1.9 4.4 5.9 4.18 5.68 2.0 4.5 6.0 4.31 5.8 0.0 0.0 0.0 0.17 0.18 0.1 0.1 0.1 0.26 0.26 ±0.1 4 TA = 25 oC 54HC and 74HC Min. Typ. Max. 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 4.13 5.63 0.1 0.1 0.1 0.33 0.33 ±1 40 Value -40 to 85 oC -55 to 125 oC 74HC 54HC Min. Max. Min. Max. 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 4.10 5.60 0.1 0.1 0.1 0.40 0.40 ±1 80 µA µA V V 1.5 3.15 4.2 0.5 1.35 1.8 V V Unit VIH High Level Input Voltage Low Level Input Voltage V IL 6/13 M54/M74HC390 A C ELECTRICAL CHARACTERISTICS (C L = 50 pF, Input t r = tf = 6 ns) Test Conditions Symbol Parameter VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 CIN CPD (*) Input Capacitance Power Dissipation Capacitance 5 84 8.4 42 50 8.4 42 50 QA Connected to CKB TA = 25 oC 54HC and 74HC Min. Typ. Max. 30 8 7 42 14 12 45 15 13 108 36 31 72 24 20 45 15 13 17 65 79 17 67 79 24 6 5 24 6 5 75 15 13 75 15 13 25 5 5 10 75 15 13 120 24 20 120 24 20 280 56 48 185 37 31 125 25 21 6.8 34 40 6.8 34 40 95 19 16 95 19 16 30 6 5 10 Value -40 to 85 oC -55 to 125 oC 74HC 54HC Min. Max. Min. Max. 95 19 16 150 30 26 150 30 26 350 70 60 230 46 39 155 31 26 5.6 28 33 5.6 28 33 110 22 19 110 22 19 35 7 6 10 pF pF ns ns ns ns 110 22 19 180 36 31 180 36 31 420 84 71 280 56 48 190 38 32 ns ns ns ns ns ns Unit tTLH tTHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPHL Output Transition Time Propagation Delay Time (CLOCK A - QA) Propagation Delay Time (CLOCK A - QB, QD) Propagation Delay Time (CLOCK A - QC) Propagation Delay Time (CLOCK B - QC) Propagation Delay Time (CLEAR - Qn Maximum Clock Frequency (CLOCK A - QA) Maximum Clock Frequency (CLOCK B - QB) Minimum Pulse Wisth (CLOCK) Minimum Pulse Wisth (CLEAR) Propagation Delay Time fMAX fMAX ns tW(H) tW(L) t(W)H tREM (*) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD • VCC • fIN + ICC 7/13 M54/M74HC390 TEST CIRCUIT ICC (Opr.) WHEN THE OUTPUTS DRIVE CAPACITIVE LOAD, TOTAL CURRENT CONSUMPTION IS TO BE A SUM OF THE VALUE CALCULATED FROM CPD AND ∆ICC OBTAINED FROM THE FOLLOWING FORMULA. Ca fCK  2Cb Cc Cd  ∆ICC = fCK . VCC . 2 + 2 . VCC .  5 + 5 + 5    Ca – Cd ARE THE CAPACITANCE AT QA ∼ QD OUTPUT. SWITCHING CHARACTERISTICS TEST WAVEFORM 8/13 M54/M74HC390 Plastic DIP16 (0.25) MECHANICAL DATA mm MIN. a1 B b b1 D E e e3 F I L Z 3.3 1.27 8.5 2.54 17.78 7.1 5.1 0.130 0.050 0.51 0.77 0.5 0.25 20 0.335 0.100 0.700 0.280 0.201 1.65 TYP. MAX. MIN. 0.020 0.030 0.020 0.010 0.787 0.065 inch TYP. MAX. DIM. P001C 9/13 M54/M74HC390 Ceramic DIP16/1 MECHANICAL DATA mm MIN. A B D E e3 F G H L M N P Q 7.8 2.29 0.4 1.17 0.22 0.51 0.38 17.78 2.79 0.55 1.52 0.31 1.27 10.3 8.05 5.08 0.307 0.090 0.016 0.046 0.009 0.020 3.3 0.015 0.700 0.110 0.022 0.060 0.012 0.050 0.406 0.317 0.200 TYP. MAX. 20 7 0.130 MIN. inch TYP. MAX. 0.787 0.276 DIM. P053D 10/13 M54/M74HC390 SO16 (Narrow) MECHANICAL DATA DIM. MIN. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 9.8 5.8 1.27 8.89 4.0 5.3 1.27 0.62 8° (max.) 0.149 0.181 0.019 10 6.2 0.35 0.19 0.5 45° (typ.) 0.385 0.228 0.050 0.350 0.157 0.208 0.050 0.024 0.393 0.244 0.1 mm TYP. MAX. 1.75 0.2 1.65 0.46 0.25 0.013 0.007 0.019 0.004 MIN. inch TYP. MAX. 0.068 0.007 0.064 0.018 0.010 P013H 11/13 M54/M74HC390 PLCC20 MECHANICAL DATA mm MIN. A B D d1 d2 E e e3 F G M M1 1.27 1.14 7.37 1.27 5.08 0.38 0.101 0.050 0.045 9.78 8.89 4.2 2.54 0.56 8.38 0.290 0.050 0.200 0.015 0.004 TYP. MAX. 10.03 9.04 4.57 MIN. 0.385 0.350 0.165 0.100 0.022 0.330 inch TYP. MAX. 0.395 0.356 0.180 DIM. P027A 12/13 M54/M74HC390 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use ascritical components in life support devices or systems without express written approval of SGS-THOMSON Microelectonics. © 1994 SGS-THOMSON Microelectronics - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A 13/13