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NE555

NE555

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

  • 描述:

    NE555 - GENERAL PURPOSE SINGLE BIPOLAR TIMERS - STMicroelectronics

  • 数据手册
  • 价格&库存
NE555 数据手册
® NE555 SA555 - SE555 GENERAL PURPOSE SINGLE BIPOLAR TIMERS . . . . . . . . LOW TURN OFF TIME MAXIMUM OPERATING FREQUENCY GREATER THAN 500kHz TIMING FROM MICROSECONDS TO HOURS OPERATES IN BOTH ASTABLE AND MONOSTABLE MODES HIGH OUTPUT CURRENT CAN SOURCE OR SINK 200mA ADJUSTABLE DUTY CYCLE TTL COMPATIBLE TEMPERATURE STABILITY OF 0.005% PERoC N DIP8 (Plastic Package) D SO8 (Plastic Micropackage) DESCRIPTION The NE555 monolithic timing circuit is a highly stable controller capableof producing accuratetime delays or oscillation. In the time delay mode of operation, the time is precisely controlled by one external resistor and capacitor.For a stableoperation as an oscillator, the free running frequency and the duty cycle are both accurately controlled with two external resistors and one capacitor. The circuit may be triggered and reset on falling waveforms, and the output structure can source or sink up to 200mA. The NE555 is available in plastic and ceramic minidip package and in a 8-lead micropackage and in metal can package version. PIN CONNECTIONS (top view) ORDER CODES Part Number NE555 SA555 SE555 Temperature Range 0oC, 70oC –40 C, 105 C –55 C, 125 C o o o o Package N • • • D • • • 1 2 3 4 8 7 6 5 1 2 3 4 5 6 7 8 - GND - Trigger - Output - Reset - Control voltage - Threshold - Discharge - VCC July 1998 1/10 NE555/SA555/SE555 BLOCK DIAGRAM VCC+ 5k Ω COMP THRESHOLD CONTROL VOLTAGE R FLIP-FLOP 5k Ω COMP TRIGGER DISCHARGE Q OUT S INHIBIT/ RESET 5k Ω RESET S S - 808 6 SCHEMATIC DIAGRAM CONTROL VOLTAGE THRESHOLD COMPARATOR 5 R1 4.7kΩ R2 830 Ω R3 4.7kΩ OUTPUT VCC R4 R8 1kΩ 5kΩ R12 6.8kΩ Q21 Q19 Q20 Q22 Q5 Q6 Q7 Q8 Q9 Ρ13 R11 5kΩ THRESHOLD Q1 Q2 Q3 Q11 Q12 TRIGGER 2 Q10 Q4 3.9kΩ 3 R17 4.7kΩ Q23 D1 R9 5kΩ Q13 Q16 D2 R14 220Ω Q24 Q18 R16 100 Ω R15 4.7kΩ RES ET DISCHARGE 4 7 Q14 1 Q15 Q17 R5 10kΩ R6 100kΩ R7 100kΩ R10 5kΩ G ND TRIGGER COMPARATOR FLIP FLOP ABSOLUTE MAXIMUM RATINGS Symbol Vcc Toper Supply Voltage Operating Free Air Temperature Range for NE555 for SA555 for SE555 Parameter Value 18 0 to 70 –40 to 105 –55 to 125 150 –65 to 150 Unit V o C Tj Tstg Junction Temperature Storage Temperature Range o o C C 2/10 NE555/SA555/SE555 OPERATING CONDITIONS Symbol VCC Vth, Vtrig, Vcl, Vreset Supply Voltage Maximum Input Voltage Parameter SE555 4.5 to 18 VCC NE555 - SA555 4.5 to 18 VCC Unit V V ELECTRICAL CHARACTERISTICS T amb = +25oC, VCC = +5V to +15V (unless otherwise specified) Symbol ICC Parameter Supply Current (RL ∞) (- note 1) Low State VCC = +5V VCC = +15V High State VCC = 5V Timing Error (monostable) (RA = 2k to 100kΩ, C = 0.1µF) Initial Accuracy - (note 2) Drift with Temperature Drift with Supply Voltage Timing Error (astable) (RA, RB = 1kΩ to 100kΩ, C = 0.1µF, VCC = +15V) Initial Accuracy - (note 2) Drift with Temperature Drift with Supply Voltage VCL Control Voltage level VCC = +15V VCC = +5V Threshold Voltage VCC = +15V VCC = +5V Threshold Current - (note 3) Trigger Voltage VCC = +15V VCC = +5V Trigger Current (Vtrig = 0V) Reset Voltage - (note 4) Reset Current Vreset = +0.4V Vreset = 0V VOL Low Level Output Voltage VCC = +15V, IO(sink) = 10mA IO(sink) = 50mA IO(sink) = 100mA IO(sink) = 200mA VCC = +5V, IO(sink) = 8mA IO(sink) = 5mA High Level Output Voltage VCC = +15V, IO(source) = 200mA IO(source) = 100mA VCC = +5V, IO(source) = 100mA 0.1 0.4 0.1 0.4 2 2.5 0.1 0.05 12.5 13.3 3.3 0.4 1 0.15 0.5 2.2 0.25 0.2 0.1 0.4 0.1 0.4 2 2.5 0.3 0.25 12.5 13.3 3.3 0.4 1.5 V 0.25 0.75 2.5 0.4 0.35 V 13 3 12.75 2.75 0.4 4.8 1.45 9.6 2.9 9.4 2.7 SE555 Min. Typ. 3 10 2 Max. 5 12 NE555 - SA555 Min. Typ. 3 10 2 Max. 6 15 Unit mA 0.5 30 0.05 2 100 0.2 1 50 0.1 3 0.5 % ppm/°C %/V 1.5 90 0.15 10 3.33 10 3.33 0.1 5 1.67 0.5 0.7 10.4 3.8 10.6 4 0.25 5.2 1.9 0.9 1 0.4 4.5 1.1 9 2.6 8.8 2.4 2.25 150 0.3 10 3.33 10 3.33 0.1 5 1.67 0.5 0.7 11 4 % ppm/°C %/V V Vth V 11.2 4.2 0.25 5.6 2.2 2.0 1 µA V mA µA V Ith Vtrig Itrig Vreset Ireset VOH Notes : 1. Supply current when output is high is typically 1mA less. 2. Tested at VCC = +5V and VCC = +15V. 3. This will determine the maximum value of RA + RB for +15V operation the max total is R = 20MΩ and for 5V operation the max total R = 3.5MΩ. 3/10 NE555/SA555/SE555 ELECTRICAL CHARACTERISTICS (continued) Symbol Idis (off) Vdis(sat) Parameter Discharge Pin Leakage Current (output high) (Vdis = 10V) Discharge pin Saturation Voltage (output low) - (note 5) VCC = +15V, Idis = 15mA VCC = +5V, Idis = 4.5mA Output Rise Time Output Fall Time Turn off Time - (note 6) (Vreset = VCC) SE555 Min. Typ. 20 Max. 100 NE555 - SA555 Min. Typ. 20 Max. 100 Unit nA mV 180 80 100 100 0.5 480 200 200 200 180 80 100 100 0.5 480 200 300 300 ns µs tr tf toff Notes : 5. No protection against excessive Pin 7 current is necessary, providing the package dissipation rating will not be exceeded. 6. Time mesaured from a positive going input pulse from 0 to 0.8x VCC into the threshold to the drop from high to low of the output trigger is tied to treshold. Figure 1 : Minimum Pulse Width Required for Trigering Figure 2 : Supply Current versus Supply Voltage Figure 3 : Delay Time versus Temperature Figure 4 : Low Output Voltage versus Output Sink Current 4/10 NE555/SA555/SE555 Figure 5 : Low Output Voltage versus Output Sink Current Figure 6 : Low Output Voltage versus Output Sink Current Figure 7 : High Output Voltage Drop versus Output Figure 8 : Delay Time versus Supply Voltage Figure 9 : Propagation Delay versus Voltage Level of Trigger Value 5/10 NE555/SA555/SE555 APPLICATION INFORMATION MONOSTABLE OPERATION In the monostable mode, the timer functions as a one-shot. Referring to figure 10 the external capacitor is initially held discharged by a transistor inside the timer. Figure 10 VCC = 5 to 15V Figure 11 t = 0.1 ms / div INPUT = 2.0V/div OUTPUT VOLTAGE = 5.0V/div Reset R1 4 Trigger 2 8 7 NE555 Output 6 C1 CAPACITOR VOLTAGE = 2.0V/div 3 1 5 Control Voltage 0.01 µF R1 = 9.1kΩ, C1 = 0.01µF, RL = 1kΩ Figure 12 The circuit triggers on a negative-going input signal when the level reaches 1/3 Vcc. Once triggered, the circuit remains in this state until the set time has elapsed, even if it is triggered again during this interval.The duration of the output HIGH stateis given by t = 1.1 R1C1 and is easily determined by figure 12. Notice that since the charge rate and the threshold level of the comparator are both directly proportional to supply voltage, the timing interval is independent of supply. Applying a negativepulse simultaneously to the reset terminal (pin 4) and the trigger terminal (pin 2) during the timing cycle discharges the external capacitor and causes the cycle to start over. The timing cycle now starts on the positive edge of the reset pulse. During the time the reset pulse in applied, the output is driven to its LOW state. When a negativetrigger pulse is applied to pin 2, the flip-flop is set, releasing the short circuit across the external capacitor and driving the output HIGH. The voltage across the capacitor increases exponentially with the time constant τ = R1C1. When the voltage across the capacitor equals 2/3 Vcc, the comparatorresets the flip-flop which then discharge the capacitor rapidly and drivers the output to its LOW state. Figure 11 shows the actual waveforms generatedin this mode of operation. When Reset is not used, it should be tied high to avoid any possibly or false triggering. 6/10 C (µF) 10 1k Ω 10 k 1.0 0.1 0.01 0.001 10 µs Ω 10 0k 1M Ω 10 ms R 1= Ω 100 ms 100 µs 1.0 ms 10 M 10 s Ω (t d ) ASTABLE OPERATION When the circuit is connected as shown in figure 13 (pin 2 and 6 connected)it triggers itself and free runs as a multivibrator. The external capacitor charges through R1 and R2 and discharges through R2 only. Thus the duty cycle may be precisely set by the ratio of these two resistors. In the astable mode of operation, C1 charges and discharges between 1/3 Vcc and 2/3 Vcc. As in the triggeredmode, the chargeand discharge times and therefore frequency are independent of the supply voltage. NE555/SA555/SE555 Figure 13 VCC = 5 to 15V Figure 15 : Free Running Frequency versus R1, R2 and C1 R1 4 Output 3 8 7 C (µF) 10 1.0 0.1 NE555 Control Voltage 0.01 µF 5 1 2 6 R2 R1 + R2 1M 10 = Ω 0k Ω 1k Ω 10 kΩ C1 0.01 0.001 0.1 10 M Ω 100 1k 10k f o (Hz) Figure 14 shows actual waveforms generatedin this mode of operation. The charge time (output HIGH) is given by : t1 = 0.693 (R1 + R2) C1 and the discharge time (output LOW) by : t2 = 0.693 (R2) C1 Thus the total period T is given by : T = t1 + t2 = 0.693 (R1 + 2R2) C1 The frequency ofoscillation is them : 1 1.44 f= = T (R1 + 2R2) C1 and may be easily found by figure 15. The duty cycle is given by : R2 D= R1 + 2R2 1 10 PULSE WIDTH MODULATOR When the timer is connected in the monostable mode and triggered with a continuous pulse train, the output pulse width can be modulated by a signal applied to pin 5. Figure 16 shows the circuit. Figure 16 : Pulse Width Modulator. VCC RA 4 8 7 Figure 14 t = 0.5 ms / div Trigger 2 NE555 OUTPUT VOLTAGE = 5.0V/div Output 3 1 6 Modulation Input 5 C CAPACITOR VOLTAGE = 1.0V/div R1 = R2 = 4.8kΩ, C1= 0.1µF, RL = 1kΩ 7/10 NE555/SA555/SE555 LINEAR RAMP When the pullup resistor, RA, in the monostable circuit is replaced by a constant current source, a linear ramp is generated. Figure 17 shows a circuit configuration that will perform this function. Figure 17. 50% DUTY CYCLE OSCILLATOR For a 50% duty cycle the resistors RA and RE may beconnected as in figure19. The time preriod for the output high is the same as previous, t1 = 0.693 RA C. For the output low it is t2 =  RB − 2RA  [(RARB) ⁄ (RA + RB)] CLn    2RB − RA  t1 + t2 Note that this circuit will not oscillate if RB is greater Figure 19 : 50% Duty Cycle Oscillator. 2N4250 or equiv. 6 C Output 3 1 5 VCC RE 4 Trigger 2 Thus the frequency of oscillation is f = 1 R1 8 7 NE555 VCC VCC 0.01µF R2 4 2 RA 51kΩ 8 RB 7 22kΩ NE55 Figure 18 shows waveforms generator by the linear ramp. The time interval is given by : (2/3 VCC RE (R1+ R2) C T= VBE = 0.6V R1 VCC − VBE (R1+ R2) Figure 18 : Linear Ramp. Out 3 1 6 5 0.01µF C 0.01µF than 1/2 RA because the junction of RA and RB cannot bring pin 2 down to 1/3 VCC and trigger the lower comparator. ADDITIONAL INFORMATION Adequate power supply bypassing is necessary to protect associated circuitry. Minimum recommended is 0.1µF in parallel with 1µF electrolytic. VCC = 5V Time = 20µs/DIV R 1 = 47kΩ R 2 = 100kΩ R E = 2.7kΩ C = 0.01µF Top trace : input 3V/DIV Middle trace : output 5V/DIV Bottom trace : output 5V/DIV Bottom trace : capacitor voltage 1V/DIV 8/10 NE555/SA555/SE555 PACKAGE MECHANICAL DATA 8 PINS - PLASTIC DIP Dimensions A a1 B b b1 D E e e3 e4 F i L Z Min. 0.51 1.15 0.356 0.204 7.95 Millimeters Typ. 3.32 Max. Min. 0.020 0.045 0.014 0.008 0.313 Inches Typ. 0.131 Max. 1.65 0.55 0.304 10.92 9.75 2.54 7.62 7.62 6.6 5.08 3.81 1.52 0.065 0.022 0.012 0.430 0.384 0.100 0.300 0.300 0260 0.200 0.150 0.060 9/10 DIP8.TBL 3.18 0.125 PM-DIP8.EPS NE555/SA555/SE555 PACKAGE MECHANICAL DATA 8 PINS - PLASTIC MICROPACKAGE (SO) Dimensions A a1 a2 a3 b b1 C c1 D E e e3 F L M S Min. 0.1 0.65 0.35 0.19 0.25 4.8 5.8 Millimeters Typ. Max. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 5.0 6.2 o Min. 0.004 0.026 0.014 0.007 0.010 0.189 0.228 Inches Typ. Max. 0.069 0.010 0.065 0.033 0.019 0.010 0.020 0.197 0.244 1.27 3.81 3.8 0.4 4.0 1.27 0.6 8 (max.) o 0.050 0.150 0.150 0.016 0.157 0.050 0.024 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this pub lication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST log o is a trademark of STMicroelectronics © 1998 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdo m - U.S.A. ORDER CODE : 10/10 SO8.TBL PM-SO8.EPS
NE555 价格&库存

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